LD7591

3/4/2010

Transition-Mode PFC Controller with Fault Condition Protection

REV. 00

General Description Features

The LD7591 is a voltage mode PFC controller operating on z Transition mode of PFC pre-regulator
transition mode, with several integrated functions of z Voltage mode control
protection, such as OVP, OCP, and Brown-in protection. It z Programmable max. on-time
reduces the components counts and is available in a z Low Startup Current (<30μA)
SOP-8 or DIP-8 package. Those make it an ideal design z UVLO (Under Voltage Lockout)
for low cost applications. z LEB (Leading-Edge Blanking) on CS Pin
z Open-Feedback Protection and Disable Function
It provides functions of low startup current, over voltage
z OVP (Over Voltage Protection)
protection, open feedback protection, disable function,
z OCP (Cycle by cycle current limiting)
over current protection, under voltage lockout and
z 800/-1200mA Driving Capability
integrated LEB of current sensing. Unlike the traditional
z Internal OTP function
current mode PFC controller, LD7591 is free from extra
rectified AC line voltage information to minimize the power Applications
loss.
z Adaptor of Output above 65W.
The LD7591 will be disabled if INV pin voltage falls below z Open Frame Switching Power Supply
0.45V and the operating current rises over 65μA z LCD TV Power Supply
z LED Power Supply

Typical Application for Boost PFC

AC EMI
Input Filter

7
GATE
8 VCC

CS 4

LD7591
5 ZCD
INV 1

3 RAMP COMP 2
GND
6

1
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Typical Application for LED (Flyback PFC)

2
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Pin Configuration
SOP-8 & DIP-8 (TOP VIEW)

GND
VCC

OUT

ZCD
8 7 6 5

TOP MARK YY: Year code (D:2004, E:2005…)

WW: Week code
YYWWPP
PP: Production code

1 2 3 4
INV

COMP

RAMP

CS

Ordering Information
Part number Package Top Mark Shipping

LD7591 GS SOP-8 Green package LD7591GS 2500 /tape & reel

LD7591 GN DIP-8 Green package LD7591GN 3600 /tube /Carton

Pin Descriptions
Pin NAME FUNCTION

1 INV Output voltage feed back control

2 COMP Output of the error amplifier for voltage loop compensation to achieve stable
3 RAMP Ramp generator, connecting a resistor to GND pin to set the saw tooth signal
4 CS Current sense pin, connect to sense the MOSFET current for OCP
5 ZCD Detecting zero crossing of input signal
6 GND Ground
7 OUT Gate drive output to drive the external MOSFET
8 VCC Power source VCC pin

Recommended Operating Conditions

Item Min. Max. Unit
Vcc pin capacitor 22 47 μF
Comp pin capacitor 0.1 4.7 μF
RAMP pin resistor 4.7k 100k Ω

3
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Block Diagram

4
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Absolute Maximum Ratings
Supply Voltage VCC -0.3 ~26V
OUT -0.3 ~VCC +0.3V
COMP, INV, CS, RAMP, ZCD -0.3 ~7V
Maximum Junction Temperature 150°C
Operating Junction Temperature Range -40°C to 125°C
Operating Ambient Temperature Range -40°C to 85°C
Storage Temperature Range -65°C to 150°C
Package Thermal Resistance (SO-8, θJA) 160°C/W
Package Thermal Resistance (DIP-8, θJA) 100°C/W
Power Dissipation (SOT-8, at Ambient Temperature = 85°C) 400mW
Power Dissipation (DIP-8, at Ambient Temperature = 85°C) 650mW
Lead temperature (Soldering, 10sec) 260°C
ESD Voltage Protection, Human Body Model 2.5 KV
ESD Voltage Protection, Machine Model 250 V
Gate Output Current 800mA/-1200mA

Caution:
Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied.

5
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Electrical Characteristics
(VCC=14.0V, TA = 25°C unless otherwise specified.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage (VCC Pin)
Startup Current VCC<UVLO ON 20 30 μA
VCOMP=0V 2.0 mA
Operating Current VCOMP=3V 2.5 mA
(with 1nF load on OUT pin) VCC OVP 0.45 mA
VINV=0V 65 95 μA
UVLO (off) 7.5 8.5 9.5 V
UVLO (on) 11.0 12.0 13.0 V
VCC OVP Level 19.5 21 22.5 V
Error Amplifier (Comp Pin)
Feedback Input Voltage, VREF 2.465 2.500 2.535 V
Input Bias Current VINV=1V~4V -0.5 0.5 μA
Transconductance 140 μmho
Output Sink Current VINV= VREF +0.1V 14 μA
Output Source Current VINV= VREF -0.1V -14 μA
Output Source Current VINV= VREF -0.5V -200 μA
Output Upper Clamp Voltage VINV= VREF -0.1V 5.4 5.9 6.4 V
Burst Mode COMP pin Threshold 0.95 V
voltage Hysteresis 50 mV
INV pin
2.62 2.675 2.73 V
OVP Trip Level
OVP Hysteresis 0.175 V
0.4 0.45 0.5 V
Enable Threshold Voltage
Enable Hysteresis 0.1 V
Current Sensing (CS Pin)
Current Sense Input Threshold Voltage 0.75 0.8 0.85 V
Input bias current VCS=0V~1V 0 1.0 μA
LEB time 250 ns
Zero Current Detector (ZCD Pin)
Upper Clamp Voltage IDET=100μA 6.0 V
Lower Clamp Voltage IDET=100μA -0.7 V
0.05 0.1 0.15 V
Input Voltage Threshold
Hysteresis 0.1 V
Input bias current VZCD=1V~4V, OUT=OFF 0.0 1.0 μA
Maximum Delay from ZCD to Output 250 ns

6
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
PARAMETER CONDITIONS MIN TYP MAX UNITS
Maximum ON-Time, Ton-max (Ramp Pin)
Maximum On Time Voltage RRAMP=40.5K 2.784 2.900V 3.016 V

Maximum On Time Programming RRAMP =40.5K 19 24 29 μs

Maximum On Time RRAMP ≥ 100K 40 μs
Minimum OFF-Time
Minimum OFF-Time 1 μs
Ton-
Minimum OFF-Time Programming 0.10
max
Gate Drive Output (OUT Pin)
Output Low Level VCC=12V, ISINK=20mA 0.5 V
Output High Level VCC=12V, ISOURCE=20mA 9 12 V
Output High Clamp Level VCC=18V 13 V
Rising Time VCC =12V, CL=1000pF 75 150 ns
Falling Time VCC =12V, CL=1000pF 25 100 ns
Starter
Start Timer Period 50 150 300 μs
OTP (Over Temp. Protection)
OTP Trip level 140 °C
OTP Hysteresis 30 °C

7
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Typical Performance Characteristics
13.5 10

13.0 9.5
UVLO (on) (V)

UVLO (off) (V)

12.5 9.0

12.0 8.5

11.5 8.0

7.5
11.0
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (°C) Temperature (°C)
Fig. 1 UVLO (on) vs. Temperature Fig. 2 UVLO (off ) vs. Temperature

30 35

28
30

26
VCC OVP (V)
Istartup (μA)

25
24

20
22

15
20

18 10
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (°C) Temperature (°C)
Fig. 3 Startup Current vs. Temperature Fig. 4 VCC OVP vs. Temperature

2.54 2.75

2.52 2.7
INV OVP (V)

2.50 2.65
Vref (V)

2.48 2.6

2.46 2.55

2.44 2.5
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (°C) Temperature (°C)
Fig. 5 Vref vs. Temperature Fig. 6 INV OVP vs. Temperature

8
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
0.55
0.83

0.5
0.82
Enable Voltage (V)

VCS (off) (V)

0.45
0.81

0.4
0.80

0.35
0.79

0.3
0.78
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (°C)
Temperature (°C)
Fig. 7 Enable Voltage vs. Temperature Fig. 8 VCS (off) vs. Temperature
2.96 26
Maximum On-Time Voltage (V)

2.94 25
Maximum On-Time (μs)

2.92 24

2.9 23

2.88 22

2.86 21
-40 0 40 80 120 125 -40 0 40 80 120 125
Temperature (°C) Temperature (°C)
Fig. 9 Maximum On-Time Voltage vs. Temperature Fig. 10 Maximum On-Time vs. Temperature

165

160
Start Timer Period (μs)

155

150

145

140
-40 0 40 80 120 125
Temperature (°C)
Fig. 11 Start Timer Period vs. Temperature

9
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Application Information
Operation Overview Vcc voltage is high enough to turn on the LD7591 and
further to deliver the gate drive signal, the supply current
The LD7591 is an excellent voltage mode PFC controller.
is provided from the auxiliary winding of the PFC choke.
It meets the IEC61000-3-2 requirement and is intended
Lower startup current requirement on the PFC controller
for the use in those pre-regulator that demand low power
will help to increase the value of R1 and then reduce the
harmonics distortion. It integrated more functions to
power consumption on R1. By using CMOS process and
reduce the external components counts and the size. Its
the special circuit design, the maximum startup current of
major features are described as below.
LD7591 is only 30μA. If a higher resistance value of R1 is
chosen, it usually takes more time to start up. To carefully
Under Voltage Lockout (UVLO)
select the value of R1 and C1 will optimize the power
An UVLO comparator is implemented in it to detect the consumption and startup time.
voltage on the VCC pin. It would assure the supply
voltage enough to turn on the LD7591 PFC controllers
and further to drive the power MOSFET. As shown in
Fig. 12, a hysteresis is built in to prevent the shutdown
from the voltage dip during start up. The turn-on and
turn-off threshold level are set at 12.0V and 8.5V,
respectively.
Vcc

UVLO(on)
Fig. 13
UVLO(off)
Output Voltage Setting

The LD7591 monitors the output voltage signal at INV pin

t
through a resistor divider pair Ra and Rb. A
I(Vcc) operating current
(~ mA) transconductance amplifier is used instead of the
conventional voltage amplifier. The transconductance
startup current amplifier (voltage controlled current source) aids the
(~uA)

t implementation of OVP and disables function. The output

Fig. 12 current of the amplifier changes according to the voltage

difference of the inverting and non-inverting input of the
Startup Current and Startup Circuit
amplifier. The output voltage of the amplifier is compared
The typical startup circuit to generate the LD7591 Vcc is
with the internal ramp signal to generate the turn-off
shown in Fig. 13. During the startup transient, the Vcc is
signal. The output voltage is determined by the following
lower than the UVLO threshold thus there is no gate pulse
relationship.
produced from LD7591 to drive power MOSFET. Ra
VOUT = 2.5 V(1 + )
Therefore, the current through R1 will provide the startup Rb

current and to charge the capacitor C1. Whenever the

10
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Where Ra and Rb are top and bottom feedback resistor
values (as shown in the Fig. 14).

Fig. 15

Fig. 14
Zero Current Detection (ZCD)
OVP and Disable on INV pin Fig. 16 shows typical ZCD-block. The Zero Current
Detection block will switch on the external MOSFET as
To prevent the over voltage on the output capacitor from
the current through the boost inductor drops to zero in
the fault condition, LD7591 is implemented with an OVP
using an auxiliary winding coupled with the inductor. This
function on INV pin. Whenever the INV voltage is higher
feature allows transition-mode operation. If the voltage of
than the OVP threshold voltage 2.675V, the output gate
the ZCD pin goes higher than 0.2V, the ZCD comparator
drive circuit will be shutdown simultaneously thus to stop
waits until the voltage rises above 0.1V. If the voltage
the switching of the power MOSFET until the INV pin
goes below 0.1V, the zero current detector will turn on the
down to 2.5V. The OVP function in LD7591 is an
MOSFET. The ZCD pin is protected internally by two
auto-recovery type protection. The Fig. 15 shows its
clamps, 6.0V-high clamp and -0.7V-low clamp. The
operation. On the other hand, if the OVP condition is
150μs timer generates a MOSFET turn on signal if the
removed, the Vcc level will get back to normal level and
driver output has been low for more than 150μs from the
the output will automatically return to the normal
falling edge of the driver output.
operation.

The disable comparator disables the operation of the

LD7591 when the voltage of the inverting input is lower
than 0.35V and there is 100mV hysteresis. An external
small signal MOSFET can be used to disable the IC,
referring to Fig. 14. The IC operating current decreases
below 65μA to reduce power consumption if the IC is Fig. 16
disabled.

11
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Fig. 17 shows typical ZCD-related waveforms. Rz1 will
produce some delay because of the capacitance carried
by ZCD pin, it therefore delay the turn-on time accordingly.
The switch will be turned on when the inductor current
reaches zero; because of the structure of the ZCD delay,
it will be turned on after some delay time. During this
Fig. 18
delay time, the stored charge of the COSS (MOSFET
output capacitor) will be discharged through the path Ramp Generator Block
indicated in Fig. 18. This charge is transferred into a small
The output of the gm error amplifier and the output of the
filter capacitor CIN1, which is connected to the bridge
ramp generator block are compared to determine the
diode. Therefore, there is no current flowing from the
MOSFET on time, as shown in Fig. 19. The slope of the
input side. That is, the input current IIN is zero during this
ramp is determined by an external resistor connected to
period. In order to reduce the negative current flowing to
the RAMP pin. The voltage of the RAMP pin is 2.9V and
the internal diode, a larger resistance of RZ1 over 47kΩ is
the slope is proportional to the current flowing out of the
recommended.
RAMP pin. The internal ramp signal has a 1V offset;
therefore, the drive output will be shut down if the voltage
of the COMP pin is lower than 0.95V. The programmed
on-time will be at its maximum when the COMP pin is
open. The COMP pin open voltage is about 5.4~6.6V.
According to the slope of the internal ramp, the maximum
on-time can be programmed. The necessary maximum
on-time will be achieved depending on the boost inductor,
lowest AC line voltage, and maximum output power. The
resistor value should be designed properly. The
maximum on-time can be obtained from below
RRAMP
TON− Time(MAX ) =
1.58 ⋅ 109

Fig. 19
Fig. 17

12
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Output Drive Stage and PCB layout. It is strongly recommended to adopt a
smaller R-C filter for higher power application to avoid the
An output stage of a CMOS buffer, with typical
CS pin being damaged by the negative turn-on spike.
800mA/-1200mA driving capability, is incorporated to
drive a power MOSFET directly. The output voltage is
clamped at 13V to protect the MOSFET gate even when
the VCC voltage is higher than 13V.

Current Sensing and Leading-edge

Blanking

The typical voltage mode of PFC controller feedbacks the

voltage signals to close the control loop and achieve
regulation. The LD7591 detects the primary MOSFET
Fig. 20
current from the CS pin, which is for the pulse-by-pulse
current limit. The maximum voltage threshold of the Fault Protection
current sensing pin is set at 0.8V. From above, the There are several critical protections integrated in the
MOSFET peak current can be obtained from below. LD7591 to prevent the power supply or adapter from
0.8 V
IPEAK(MAX) = being damaged. Those damages usually come from open
RS
or short condition on the pins of LD7591.
A 250ns leading-edge blanking (LEB) time is included in
Under the conditions listed below, the gate output will turn
the input of CS pin to prevent the false-trigger from the
off immediately to protect the power circuit ---
current spike. The R-C filter may be eliminated in some
1. Ramp pin short to ground
low power applications, such as the pulse width of the
2. Ramp pin floating
turn-on spikes is below 250ns and the negative spike on
3. CS pin floating
the CS pin is below -0.3V.
However, the pulse width of the turn-on spike is
determined according to the output power, circuit design

13
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Reference Application Circuit --- 400V/100W (90~264VAC)

14
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
BOM

P/N Component Value Note P/N Component Value Note

Fuse 250V,T2A C1 0.1μF,X-cap
NTC 3A,5Ω C2 0.22μF,X-cap
R1 24 kΩ, 0805 C3 2200pF,Y1-cap
R2 620 kΩ, 0805 C4 2200pF,Y1-cap
R3 330 kΩ, 1206 CY1 NC
R3B 330 kΩ, 1206 C5 0.47μF,400V MPF
R4 270 Ω, 1206 C5B 0.47μF,400V MPF
R5 110 kΩ, 0805 C6 33μF, 50V Electrolytic Capacitor
R6 24 Ω, 0805 C61 100nF, 25V ,0805
R61 24 Ω, 0805 C7 100nF, 50V, 0805
R7 0.18 Ω 1/2W C8 220nF, 25V, 0805
R8 10 kΩ, 0805 C9 100μF, 450V Electrolytic Capacitor
R9 22 kΩ, 1206 C91 1000pF, 1kV, 1206
R10 2 MΩ, 1206 C10 10nF, 100V, 1206
R10B 2 MΩ, 1206 C11 NC
R11 27 kΩ, 0805 C12 100pF/ 16V, 0805
R12 360 kΩ, 0805 C13 330pF/ 1kV/1206
R13 1 MΩ, 1206 C14 100pF/ 1kV/1206
RZ2 11 kΩ, 0805 CB2 100pF/16V, 0805
RZ3 0 Ω, 0805 D1 LL4148 SOD-80
RB4 200 Ω, 0805 D2 ER206 600V/ 2A, DO-15
RZ3 0 Ω, 0805 D3 LL4148 SOD-80
RB4 200 Ω, 0805 DB UF206G 600V/2A, DO-15
ZD1 GLZ18C, 18V Zener SOD-80
BD SBU4J or GBU4J 600V/4A
L1 Leadtrend’s Design 220uH
LF1 Leadtrend’s Design
LF2 Leadtrend’s Design
Q1 FQP13N50C 500V, 13A, TO-220
IC1 LD7591 SOP-8
V1 NC Varistor
T1 400uH EI30, 44/6

15
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Reference Application Circuit --- LED -42V/350mA (90~264VAC)

16
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
BOM
P/N Component Value Note P/N Component Value Note
Fuse 2A/250V C1 0.1μF / 275VAC X-cap
NTC 0Ω, 1206 C2 4.7nF/1kV,1206
V1 Varisitor 471 C5 0.047μF / 400V MPF 塑膠電容
R1 27kΩ, 0805 C5B 0.1μF / 400V MPF 塑膠電容
R2 300kΩ, 0805 C6 22uF/ 50V Electrolytic Capacitor
R3 110kΩ, 1206 C61 104pF/25V/0805
R3B 110kΩ, 1206 C62 33uF/ 50V
R4 39Ω, 1206 C9 330μF, 50V Electrolytic Capacitor
R5 100kΩ, 0805 C9A 330μF, 50V Electrolytic Capacitor
R5B 10kΩ, 0805 C11 NC, 0805
R6 51Ω, 0805 C12 10pF, 0805
R61 0Ω, 0805 C13 470pF/500V, 1206
R7 0.75Ω 1/2W C14 0.47μF/ 16V, 0805
R9 20kΩ, 0805 C15 2200pF, Y 電容
R12 0.68Ω, 2W C16 NC /1kV,1206
R12B NC,1206 C101 2.2uF/ 50V
R13 100Ω, 1206 C102 4.7μF/10V/0805
R14 1kΩ, 0805 C103 0.1μF/ 25V, 0805
R15 7.5MEGΩ, 0805 C104 1μF/ 25V, 0805
R15B 620kΩ, 0805 C105 473pF/25V/0805
R16 100kΩ, 1206 CB2 220pF/16V, 0805
R17 100kΩ, 1206 D1 BAV103
RB4 200Ω, 0805 D2 ER502 200V/ 5A,
R101 NC, 0805 D3 LL4148 SOD-80
R102 8.2V Zener D4 LL4148 SOD-80
R103 91k D5 1N4007 1000V/1A
R104 0Ω, 0805 D6 LL4148 SOD-80
R104B 10kΩ, 0805 D7 LL4148 SOD-80
R105 20kΩ, 0805 DZ1 NC
R106 75kΩ, 0805 DZ2 NC
R107 5.6kΩ, 0805 DZ3 P6KE200A DO-15
R108 39kΩ, 0805 BD DI106 600V/1A
R109 10kΩ, 0805 T1 EF20, 1150uH 106/32/13
R110 100kΩ, 0805 LF1 UU9.8
R111 15kΩ LF2 1000uH
R112 4.7kΩ, 0805 Q1 FQPF5N60C 600V, 4.5A, TO-220
R113 NC, 0805 Q2 330R, 0805
R114 0Ω, 0805
IC1 LD7591 SOP-8
IC2 PC817
IC3

17
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Package Information
SOP-8

Dimensions in Millimeters Dimensions in Inch

Symbols
MIN MAX MIN MAX

A 4.801 5.004 0.189 0.197

B 3.810 3.988 0.150 0.157

C 1.346 1.753 0.053 0.069

D 0.330 0.508 0.013 0.020

F 1.194 1.346 0.047 0.053

H 0.178 0.229 0.007 0.009
I 0.102 0.254 0.004 0.010
J 5.791 6.198 0.228 0.244
M 0.406 1.270 0.016 0.050
θ 0° 8° 0° 8°

18
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Package Information
DIP-8

Dimension in Millimeters Dimensions in Inches

Symbol
Min Max Min Max
A 9.017 10.160 0.355 0.400
B 6.096 7.112 0.240 0.280
C ----- 5.334 ------ 0.210
D 0.356 0.584 0.014 0.023
E 1.143 1.778 0.045 0.070
F 2.337 2.743 0.092 0.108
I 2.921 3.556 0.115 0.140
J 7.366 8.255 0.29 0.325
L 0.381 ------ 0.015 --------

Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers
should verify the datasheets are current and complete before placing order.

19
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010
 LD7591
Revision History

Rev. Date Change Notice

00 3/4/2010 Original Specification

20
Leadtrend Technology Corporation [Link]
LD7591-DS-00 March 2010