o Introduction

o Voltage Source Inverters

 Performance Parameters
 Single-Phase Inverters
 Three-Phase Inverters
o Voltage Control Of Inverters
Single Pulse Width Modulation
Multiple Pulse Width Modulation
Sinusoidal Pulse Width Modulation
Modified Sinusoidal Pulse Width Modulation
o Current Source Inverters
o Conclusion
DC to AC converters are known as inverters. The function of an inverter is to
change a dc input voltage to a symmetric ac output voltage. The output
voltage waveforms of ideal inverters should be sinusoidal. For such outputs
the magnitude, frequency and phase should be controllable.

Vo

DC AC

t
Inverter Symbol
However, the waveforms of practical inverters are non sinusoidal and
contain certain harmonics (e.g. a variable speed drive draws high harmonic
currents of orders 5, 7, 11, 13).

For low and medium power applications, square-wave voltages may be

acceptable but for high power applications low distorted sinusoidal
waveforms are required.

With the availability of high speed power semiconductor devices and

advanced switching techniques the harmonic contents of output voltage can
be minimized or reduced significantly.
Inverters are widely used in industrial applications such as
stand by power supplies and uninterruptible power supplies,
induction heating and adjustable speed drives which are the
most popular applications of inverters.

ASD

Vs, Is Vo, Io

AC mains Load

Rectifier DC link Inverter

The input of an inverter may be a battery, fuel cell, solar cell or
other dc source. While the typical single-phase outputs are 120
V (60 Hz), 220 V (50 Hz), 115 V (400 Hz). For high power three-
phase systems, typical outputs are 220 to 380 V (50 Hz), 120 to
280 V (60 Hz) and 115 to 200 V (400 Hz).

A - Generator
B - Inverter
C - Electricity meter for injection
D - House connection point
E - Public electricity network
F - Electricity meter for consumption
G - Consumer load
How to choose an inverter for such solar system in the previous slide? The
choice may differ due to the power your house will consume. Let’s say 300
watts are needed for household appliances, TVs (up to 27"), VCR, desktop
computers, other mobile office equipment then an inverter with such
features shown below may be suggested.

Power (W) 300

Input voltage (V) 12-24
Output voltage (V) 110, 220, 230, 240
THD <3%
Power factor 0,97
Operational Environment Temp.(C) -10 to 40

Operational Environment Humidity 15-95%

Inverters can be classified into two types, single-phase
inverters and three-phase inverters. Each type can use
controlled switching devices such as BJTs, MOSFETs, IGBTs,
MCTs and GTOs. Inverters generally use PWM control signals
for producing an ac output voltage. An inverter is called voltage
source inverter (VSI) if the input voltage remains constant, a
current source inverter (CSI) if the input current is maintained
constant.
The output of practical inverters contains harmonics and the quality of an
inverter is normally evaluated in terms of the following performance
parameters.
Harmonic factor of nth harmonic (HFn): The harmonic factor which is a
measure of individual harmonic contribution is defined as,
𝑽𝒐𝒏
𝑯𝑭𝒏 = for n>1
𝑽𝒐𝟏

Where V₁ is the rms of the fundamental component and Von is the rms of
the nth harmonic component.

Total harmonic distortion (THD): The total harmonic distortion which is a

measure of closeness in shape between a waveform and its fundamental
component is defined as, ∞ 𝟏
𝟐
𝟏
𝑻𝑯𝑫 = 𝑽𝒐𝒏 𝟐
𝑽𝟎𝟏
𝒏=𝟐,𝟑,…
Distortion factor (DF): THD gives the total harmonic content but it doesn’t
indicate the level of each harmonic component.
If a filter is used at the output of inverters, the higher order harmonics
would be attenuated more effectively. Therefore a knowledge of both the
freq. and magnitude of each harmonic is important.
The DF indicates the amount of HD that remains in a particular waveform
after the harmonics of the waveform have been subjected to a second-order
attenuation.
Thus DF is measure of effectiveness in reducing unwanted harmonics
without having to specify the values of a second-order load filter and is
defined as,
∞ 𝟏
𝟐 𝟐
𝟏 𝑽𝒐𝒏
𝑫𝑭 =
𝑽𝟎𝟏 𝒏𝟐
𝒏=𝟐,𝟑,..
The DF of an individual (or nth) harmonic component is defined as,

𝑽𝒐𝒏
𝑫𝑭𝒏 = 𝒇𝒐𝒓 𝒏 > 𝟏
𝑽𝒐𝟏 𝒏𝟐

Lowest order harmonic (LOH): The LOH is that harmonic component whose
frequency is closest to the fundemantal one and its amplitude is greater
than or equal to 3% of the fundamental component.
The principle of single phase inverters can be explained with figure shown
here. The inverter circuit consists of two choppers.
When only transistor Q₁ is turned on for a time T₀/2 the instantaneous
voltage across the load V₀ is Vs/2.
If transistor Q₂ is turned on for a time T₀/2, -Vs/2 appears across the load.
The logic circuit should be designed such that Q₁ and Q₂ are not ON at the
same time. This is inverter is known as a half bridge inverter.

Vs/2 Q1
C1 D1
R Io
i1
Vs 0
a i2
Vao = Vo

Q2
C2 D2
Vs/2
 The rms output voltage can be found from:
𝟏
𝑻𝟎 𝟐 𝟐
𝟐 𝟐 𝑽𝒔 𝑽𝒔
𝑽𝒐 = 𝒅𝒕 =
𝑻𝟎 𝟎 𝟒 𝟐

And the instantaneous output voltage comes out as:

∞
𝟐𝑽𝒔
𝒗𝟎 = 𝒔𝒊𝒏𝒏𝝎𝒕
𝒏𝝅
𝒏=𝟏,𝟑,𝟓…

= 𝟎 𝒇𝒐𝒓 𝒏 = 𝟐, 𝟒, …

Where w is the frequency of output voltage in rads per sec. Due to the
quarter wave symmetry of the output voltage along the x-axis, the even
harmonics are absent. For n = 1, the eq. above gives the rms value of
fundemental components as,
𝟐𝑽𝒔
𝑽𝒐𝟏 = = 𝟎. 𝟒𝟓𝑽𝒔
√𝟐𝝅
For an inductive load, the load current can’t change
immediately with the output voltage.
If Q₁ is turned off at t = T₀/2, the load current would continue
to flow through D₂, load and lower half of the dc source until
the current falls to zero.
Similarly, when is turned off at t = T₀, the load current flows
through D₁, load and upper half of dc source.
When diode D₁ or D₂ conducts, energy is fed back to the dc
source and these diodes are known as freewheeling diodes.
Figure shows the load current Vao=Vo
and conduction intervals for a Vs/2

purely inductive load. 0 To/2 To

t
Vs/2 Q1
C1 D1
If toff is the turn-off time of a R
-Vs/2
i1
Io i1
device, there must be a min Vs 0 Vs/2R
a i2
delay time of td between the Vao = Vo 0 To/2 To t
outgoing device and triggering Vs/2
C2 D2
Q2
Vs/2R
i2

of the next incoming device.

0 To/2 To t
Other-wise short circuit (a) Circuit (b) Waveforms with resistive load
conditions may occur. Io
Therefore, the max conduction
time of a device would be ton = Vs/4fL

T₀/2–td. t

For succesful operation of

inverters the logic circuit should
take these into account. D1
on
Q1
on
D2
on
Q2
on
D1
on
(c ) Load Current with highly inductive load
For an RL load, the Vao=Vo
Vs/2
instantaneous load current Io
can be found by diving the 0 To/2 To
t
Vs/2 Q1
instantaneous output voltage C1
R
D1 -Vs/2
i1
by the load impedance Vs 0
Io i1
Vs/2R
Z = R + jnwL. Thus, we get Vao = Vo
a i2
0 t
To/2 To
Q2 i2
∞ C2 D2
Vs/2 Vs/2R
𝟐𝑽𝒔
𝒊𝟎 = 𝐬𝐢𝐧⁡
(𝒏𝝎𝒕 − 𝜽𝒏 )
𝒏𝝅 𝑹𝟐 + (𝝎𝑳)𝟐 0 To/2 To t
𝒏=𝟏,𝟑,𝟓…
(a) Circuit (b) Waveforms with resistive load
Io
where . If I₀₁ is
the rms fundamental load Vs/4fL
current, the fundamental t
output power (for n = 1) is,

D1 Q1 D2 Q2 D1
on on on on on
(c ) Load Current with highly inductive load
Note: In most applications (e.g. Vao=Vo
Vs/2
motor drives) the output power
0 t
due to fundamental current is Vs/2 Q1
To/2 To
C1 D1 -Vs/2
generally the useful power and R i1
Io i1
the power due to harmonicVs 0
a
Vs/2R
i2
currents is dissipated as heat Vao = Vo 0 To/2 To t
Q2 i2
C2 D2
and increases the load Vs/2 Vs/2R

temperature. 0 To/2 To t
(a) Circuit (b) Waveforms with resistive load
Io
Assuming a lossless inverter,
the avg. power absorbed by the Vs/4fL
load must be equal to the t
average power supplied by the
dc source. Thus we can write,
D1 Q1 D2 Q2 D1
on on on on on
(c ) Load Current with highly inductive load
For an inductive load and a relatively high switching freq., the
load current Io is nearly sinusoidal; therefore, only the
fundamental component of the ac output voltage provides
power to the load. Because the dc supply voltage remains
constant Vs(t) = Vs, we can write

where V₀₁ is the fundemantal rms output voltage; I₀ is the rms

load current; θ₁ is the load angle at the fundamental frequency.
Thus the dc supply current Is can be simplified to,
The single-phase half-bridge inverter in Figure x.1a has a resistive
load of R=2.4 and the dc input voltage is Vs=48 V. Determine
(a) the rms output voltage at the fundamental frequency Vo1,
(b) the output power Po,
(c) the average and peak currents of each transistors,
(d) the peak reverse blocking voltage VBR of each transistor,
(e) the THD,
(f) the DF, and
(g) the HF and DF of the LOH.
A single phase full-bridge voltage source inverter (VSI) is shown
in figure below. It consists of four choppers.
• When transistors Q₁ and Q₂ are turned on simultaneously,
the input voltage Vs appears across the load.
• If transistors Q₃ and Q₄ are turned on at the same time, the
voltage across the load is reversed and is –Vs.

C1
Vs/2 Q1 D1 D3 Q3

+ Vo -
Vs 0 Load
a b
C2 io
Vs/2 Q4 D4 Q2
D2
Following table shows the four switching states. If two switches, one upper
and one lower conduct at the same time such that the output voltage is ±Vs.
Vao
Vs/2
State Vao Vbo Vo 0 t
To/2 To
Vs/2 Vbo
Q1, Q2 are ON, Q4, Q3 are OFF Vs/2 -Vs/2 Vs
0 t
To/2 To
Q4, Q3 are ON, Q1, Q2 are OFF -Vs/2 Vs/2 -Vs
Vab

Q1, Q3 are ON, Q4, Q2 are OFF Vs/2 Vs/2 0 Vs

0 t
Q4, Q2 are ON, Q1, Q3 are OFF -Vs/2 -Vs/2 0 To/2 To
The rms output voltage can be found from:

And the instantaneous output voltage comes out as:

And for n = 1, the rms value of fundamental component as:

The instantaneous load current Io for an RL load becomes ,

where
When diodes D₁ and D₂ conduct, the C1
Q3
Vs/2 Q1 D1 D3
energy is fed back to the dc source; thus, + Vo -
they are known as freewheeling diodes. Vs 0 a
Load
b
Figure shows the waveform of load Vs/2
C2
Q4 D4
io
Q2
D2
current for an inductive load.
Neglecting any losses, the instantaneous power balance
gives,

For inductive load and relatively high-switching frequencies the load

current I₀ and the output voltage may be assumed sinusoidal.
Because the voltage remains constant we get,

which can be simplified to find the dc supply current as,

The single-phase full-bridge inverter has a resistive load of
R=2.4 and the dc input voltage is Vs=48 V. Determine
(a) the rms output voltage at the fundamental frequency Vo1,
(b) the output power Po,
(c) the average and peak currents of each transistors,
(d) the peak reverse blocking voltage VBR of each transistor,
(e) the THD,
(f) the DF, and
(g) the HF and DF of the LOH.
A single phase full-bridge inverter is supplies from a 220 V dc source and
switched at five pulses per half cycle each of 30ᵒ.
a) What is the rms voltage of the load?
b) If the dc supply increases by 20%, what is the required pulse width to
maintain the same load power?
• Three phase inverters are normally used for high power applications.
• A three-phase output can be obtained from a configuration of six
transistors and six diodes in figure below.
• Two types of control signals can be applied to the transistors: 180
conduction or 120 conduction.
• The 180 conduction has better utilization of the switches and is the
preferred method.

Q1 Q3 Q5
C1 g1 g3
Vs/2 D1 D3 D5
g5
ia ib ic
Vs 0 a b c

Q4 Q6 Q2
C2 Vs/2 D4 D6 D2
g4 g6
g2
• Each transistor conducts for 180 degrees. Three transistors remain on at any
instant of time.
• When transistor Q₁ is switched on, terminal a is connected to the positive
terminal of the dc input voltage.
• When transistor Q₄ is switched on, terminal a is brought to the negative
terminal of the dc source.
• There are six modes of operation in a cycle and the duration of each mode is
60 degrees.
• Three square-wave gating signals g₁, g₃ and g₅ are generated at an output
frequency fo and a 50% duty cycle.
• Signals g₄, g₆, g₂ should be logic invert signals of g₁, g₃ and g₅.
• Each gating signals is shifted from the other by 60 degrees to obtain three-
phase balanced voltages.
 Q1 Q3 Q5
C1 g1 g3
Vs/2 D1 D3 D5
g5
ia ib ic
Vs 0 a b c

Q4 Q6 Q2
C2 Vs/2 D4 D6 D2
g4 g6
g2

Table shows eight valid switch states:

Switch States for Three-Phase Voltage-Source Inverter(VSI)

State State no Switch States Vab Vbc Vca

S5,S6,S1 ON, Others OFF 1 101 Vs -Vs 0

S6,S1,S2 ON, Others OFF 2 100 Vs 0 -Vs
S1,S2,S3 ON, Others OFF 3 110 0 Vs -Vs
S2,S3,S4 ON, Others OFF 4 010 -Vs Vs 0
S3,S4,S5 ON, Others OFF 5 011 -Vs 0 Vs
S4,S5,S6 ON, Others OFF 6 001 0 -Vs Vs
S1,S3,S5 ON, Others OFF 7 111 0 0 0
S2,S4,S6 ON, Others OFF 8 000 0 0 0
• For a delta-connected load, the phase currents can be obtained directly
from the line-to-line voltages.
• Once the phase currents are known, the line currents can be determined.
• For a Y-connected load, the line-to-neutral voltages must be determined to
find the line (or phase) currents.
• There are three modes of operation in a half-cycle and the equivalent
circuits are shown below.

R R
a R a
b
i1 i3
Vs R R R
Vs Vs
n n n
c c b

b R i2 a c R
R

Mode 1 Mode 2 Mode 3

During mode 1 for 0 ≤ wt ≤ π/3 transistors Q₁, Q₅ and Q₆ conduct,
During mode 2 for π/3 ≤ wt ≤ 2π/3 transistors Q₁, Q₂ and Q₆ conduct,
During mode 3 for 2π/3 ≤ wt ≤ π transistors Q₁, Q₂ and Q₃ conduct,
The instantaneous line-to-line voltage Vab
recognizing that it is phase shifted by 30˚ and
the even harmonics are zero, gives the
instantaneous line-to-line voltage Vab as,

Both Vbc and Vca can be found from previous

equation by phase shifting Vab by 120˚ and
240˚respectively,
 The line-to-line rms voltage can be found
from,

The rms nth component of the line voltage

is

which for n = 1, gives the rms fundamental

line voltage

the rms value of line-to-neutral voltages,

• With resistive loads, the diodes across the transistors have no functions.
• If the load is inductive, the current in each arm of the inverter would be
delayed to its voltage as shown in this waveform.
• When transistor Q₄ is off, the only path for the negative line current ia is
through D₁.
• Hence, the load terminal a is connected to the dc source through D₁ until the
load current reverses its polarity at t = t₁.
• During the period for 0 ≤ t ≤ t₁, transistor Q₁ can’t conduct. Similar case is
repeated for transistor Q₄.
İa

Teta angle

t
t2

Q1

D1 D4 Q4
• In this type of control, each
transistor conducts for 120ᵒ.
• Only two transistors remain on any
instant of time.
• The gating signals are shown in
figure.
• The conduction sequence of
transistors is 61, 12, 23, 34, 45, 56,61.

Figure: Gating signals for 120ᵒ conduction.

• There are three modes of operation in one half-cycle and the equivalent
circuits for a Y-connected load.

İ1 a R İ2 a R a R

Vs
b R b R İ3 b R
n Vs n n

Vs
c R c R c R

(a) Mode 1 (b) Mode 2 (c) Mode 3

 İ1 a R İ2 a R a R

Vs
b R b R İ3 b R
n Vs n n

Vs
c R c R c R

(a) Mode 1 (b) Mode 2 (c) Mode 3

During mode 1 for 0 ≤ wt ≤ π/3 transistors Q1 and Q6 conduct:

 İ1 a R İ2 a R a R

Vs
b R b R İ3 b R
n Vs n n

Vs
c R c R c R

(a) Mode 1 (b) Mode 2 (c) Mode 3

During mode 2 for π/3 ≤ wt ≤ 2π/3 transistors Q1 and Q2 conduct:

 İ1 a R İ2 a R a R

Vs
b R b R İ3 b R
n Vs n n

Vs
c R c R c R

(a) Mode 1 (b) Mode 2 (c) Mode 3

During mode 3 for 2π/3 ≤ wt ≤ π transistors Q2 and Q3 conduct:

The line-to-neutral voltages that
are shown in Figure can be
expresed as in Fourier series as
The line a-to-b voltage is
With a phase advance of 30ᵒ.
Therefore, the instantaneous line-
to-line voltages (for a Y-connected
load) are
• There is a delay of π/6 between the turning off Q1 and turning on Q4.
• Thus, there should be no short circuit of the dc supply through one upper and
one lower transistors.
• At any time, two load terminals are connected to the dc supply and the third
one remains open.
• The potential of this open terminal depends on the load characteristics and
would be unpredictable.
• Because one transistor conducts for 120ᵒ, the transistors are less utlized as
compared with those of 180ᵒ conduction for the same load condition.
• Thus, the 180ᵒ conduction is preferred and it is generally used in three-phase
inverters.
The output voltage properties for both 120° and 180° conduction are summarized in the Table.

Conduction Fundamental Voltage Characteristics

Period Peak Rms Total rms Distortion THD
Factor

𝑽𝒔 𝑽𝒔 𝑽𝒓𝒎𝒔 𝝁 thd

𝟏𝟖𝟎° (V) (V) (V)

Phase Voltage 𝟐 √𝟐 √𝟐 𝟑
𝑽 𝑽 𝑽 𝝅𝟐
𝑽𝑳,𝑵 𝝅 𝒔 𝝅 𝒔 𝟑 𝒔 𝝅 −𝟏
𝟗
= 𝟎. 𝟔𝟑𝟕𝑽𝒔 = 𝟎. 𝟒𝟓𝟎𝑽𝒔 = 𝟎. 𝟒𝟕𝟏𝑽𝒔 =0.955
=0.311

Line Voltage 𝟐√𝟑 √𝟔 𝟑

𝑽𝒔 𝑽 𝟐 𝝅𝟐
𝝅 𝝅 𝒔 𝑽 𝝅 −𝟏
𝑽𝑳,𝑳 𝟑 𝒔 𝟗
= 𝟏. 𝟏𝟎𝑽𝒔 = 𝟎. 𝟕𝟖𝑽𝒔 = 𝟎. 𝟗𝟓𝟓
= 𝟎. 𝟖𝟏𝟔𝑽𝒔 =0.311

120° (V) (V) (V)

Phase Voltage √𝟑 √𝟔 𝟏 𝟑
𝑽 𝑽 𝑽𝒔 𝝅𝟐
𝑽𝑳,𝑵 𝝅 𝒔 𝟐𝝅 𝒔 √𝟔 𝝅 −𝟏
𝟗
= 𝟎. 𝟓𝟓𝟏𝑽𝒔 = 𝟎. 𝟑𝟗𝟎𝑽𝒔 = 𝟎. 𝟒𝟎𝟖𝑽𝒔 = 𝟎. 𝟗𝟓𝟓
=0.311

Line Voltage 𝟑 𝟑 𝟏 𝟑
𝑽 𝑽𝒔 𝑽𝒔 𝝅𝟐
𝑽𝑳,𝑳 𝝅 𝒔 √𝟐𝝅 √𝟐 𝝅 −𝟏
𝟗
= 𝟎. 𝟗𝟓𝟓𝑽𝒔 = 𝟎. 𝟔𝟕𝟑𝑽𝒔 = 𝟎. 𝟕𝟎𝟕𝑽𝒔 = 𝟎. 𝟗𝟓𝟓
=0.311
In many industrial applications, to control of the output voltage of
inverters is often necessary:

(1) to cope with the variations of dc input voltage,

(2) to regulate voltage of inverters, and
(3) to satisfy the constant volts and frequency control requirement.
The commonly used techniques are:

oSingle-pulse-width modulation
oMultiple-pulse-width modulation
oSinusoidal-pulse-width modulation
oModified sinusoidal pulse-width modulation
 e

Carrier Signal
• In single-pulse-width modulation Ac
Ac
Reference Signal
control, there is only one pulse per half Ar
Ar
cycle and the width of the pulse is
0 ωt
varied to control the inverter output α1 α2

voltage.
• Figure shows the generation of gating
signals and output voltage of single-
phase full-bridge inverters. g1 δ Gate signal for transistor Q1
• The gating signals are generated by ωt
π/2-δ/2 π/2 π/2+δ/2 π 2π
comparing a rectangular reference g4
Gate signal for transistor Q4
signal of amplitude Ar with a ωt
triangular carrier wave of amplitude Vs
Vo
δ
Ac. ωt
π/2-δ/2 π/2 π/2+δ/2 π 3π/2 2π

-Vs
 e

Carrier Signal
• The frequency of the reference signal Ac
Ac
Reference Signal
determines the fundamental frequency Ar
Ar
of output voltage.
ωt
• The instantaneous output voltage is 0
α1 α2

vo=Vs(g1-g4). The ratio of Ar to Ac is the

control variable and defined as the
amplitude modulation index.
• The amplitude modulation index, or g1 δ Gate signal for transistor Q1

simply modulation index π/2-δ/2 π/2 π/2+δ/2 π

ωt
2π
g4
Gate signal for transistor Q4
ωt
Vo
Vs
δ

ωt
π/2-δ/2 π/2 π/2+δ/2 π 3π/2 2π

-Vs
 e

Carrier Signal
Ac
The rms output voltage can be found Ac
Reference Signal
from Ar
Ar

0 ωt
α1 α2

By varying Ar from 0 to Ac, the pulse

width δ can be modified from 0ᵒ to
180ᵒ and the rms output voltage Vo,
g1 δ Gate signal for transistor Q1
from 0 to Vs.
ωt
The Fourier series of output voltage π/2-δ/2 π/2 π/2+δ/2 π 2π
g4
yields Gate signal for transistor Q4
ωt
Vo
Vs
δ

ωt
π/2-δ/2 π/2 π/2+δ/2 π 3π/2 2π

-Vs
• Figure shows the harmonic profile with the variation
of modulation index M. The dominant harmonic is
third, and the DF increases significantly at a low
output voltage.
• The time and angles of intersections can be found
from

which gives the pulse width d(or pulse angle δ) as

where Ts=T/2.
The output voltage of a single phase full bridge inverter is controlled by PWM
with one pulse per half cycle. Determine the required pulse width so that the
fundamental component is 70% of the dc input voltage.
The output voltage of a dc/ac single phase full bridge inverter is controlled by
PWM with one pulse per half cycle.
a) Determine the required pulse width δ1 so that the fundamental rms
component of output voltage is 63.67% of the dc input voltage Vs.
b) What is the total harmonic distortion? ( )
• The harmonic content can be reduced
by using several pulses in each half-
cycle of output voltage.
• The generation of gating signals in
Figure b for turning on and off of
transistors is shown in Figure a by
comparing a reference signal with a
triangular carrier wave.
• The gate signals are shown in Figure.b.
The frequency of reference signal sets
the output frequency , and the carrier
frequency fc determines the number
of pulses per half-cycle p.
• The modulation index controls the
output voltage. This type of
modulation is also known as uniform
pulse-width modulation (UPWM).
The number of pulses per half-cycle is found
from

Where is defined as the frequency

modulation ratio.
The instantaneous output voltage

vo=Vs(g1-g4).

If δ is the width of each pulse, the rms

output voltage can be found from
The variation of the modulation index M from 0 to 1 varies the pulse width d from 0 to T/2p (0 to
π/p) and the rms output voltage Vo from 0 to Vs. The general form of a Fourier series for the
instantaneous output voltage is

If the positive pulse of mth pair starts at ωt =αm and ends at ωt=αm+δ, the Fourier coefficient for a
pair of pulses is

The coefficient Bn can be found by adding the effects of all pulses,

Due to the symmetry of the output voltage along the x-axis, An=0 and the even harmonics (for
n=2,4,6,…) are absent.
• Figure shows the harmonic profile
against the variation of modulation
index for five pulses per half-cycle.
The order of harmonics is the same
as that of single-pulse modulation.
• The distortion factor is reduced
significantly compared with that of
single pulse width modulation.
• With larger values of p, the
amplitudes of LOH would be lower,
but the amplitudes of some higher
order harmonics would increase.
• However, such higher order
harmonics produce negligible ripple
or can easily be filtered out.
The mth time tm and angle αm of intersection
can be determined from

Because all widths are the same, we get the

pulse width d(or pulse angle δ) as

Where Ts=T/2p.
The algorithm for generating the gating
signals is the same as that for single-pulse
modulation, except the switching period Ts
of the triangular carrier signal is T/2p instead
of T/2.
• Instead of maintaining the width of all
pulses the same as in the case of
multiple-pulse modulation, the width of
each pulse is varied in proportion to the
amplitude of a sine wave evaluated at the
centre of the same pulse.
• The DF and LOH are reduced significantly.
The gating signals as shown in Figure a
are generated by comparing a sinusoidal
reference signal with a triangular carrier
wave of frequency fc.
• The frequency of reference signal fr
determines the inverter output
frequency; and its peak amplitude Ar
controls the modulation index M, and
then in turn the rms output voltage Vo.
If δm is the width of mth pulse, the rms
output voltage

The instantaneous output voltage is

 C1
Vs/2 Q1 D1 D3 Q3

Vs 0 Load
a b
• In inverter circuits the sinusoidal Vs/2
C2
io

Q2
Q4 D4 D2
PWM is used to minimize the output
harmonic content.
• The basic principle employed in a
one-phase half-bridge converter
with bipolar voltage switching is
demonstrated in figure.
• The switches work with an internal
frequency, which is much higher
than the output frequency.
 C1
Vs/2 Q1 D1 D3 Q3

• The on and off state of the switches is Vs 0

C2
a
Load
io b

determined by the crossover points of Vs/2 Q4 D4 D2 Q2

the triangular comparison signal

Vcarrier and the sinusoidal control
signal Vref.
• The sinusoidal control signal causes
constant changes in the duty ratio of
the switches during the half-period of
the output so that the harmonic
content of the output is minimized.
• The output voltage or current can be
changed by varying Vref.
The operating principles for sinusoidal
PWM with unipolar voltage switching for
a full-bridge inverter can be seen in Fig.
The two legs of the inverter are not
switched simultaneously, and are
controlled separately. For this reason,
two control signals, Vref and −Vref are
used. The advantage of this method is
that of “effectively” doubling the
switching frequency, which results from
the cancellation of certain harmonic
components.
In three phase inverters, the generations of gating signals with SPWM are shown in
following waveforms. There are three sinusoidal waves (Vra, Vrb and Vrc) each shifted by
120˚. A carrier wave is compared with the reference signal corresponding to a phase to
generate the gating signals for that phase. Comparing the carrier signal Vcr with the
reference phases Vra, Vrb and Vrc produces g₁, g₃, g₅ respectively.
 The normalized carrier frequency mf should be odd multiple
of three. Thus, all phase-voltage (Van, Vbn, Vcn) are identical
but 120˚ out of phase without even harmonics; moreover,
harmonics at frequencies multiple of three are identical in
amplitude and phase in all phases. For instance, if the ninth
harmonic voltage in phase a is,

the corresponding ninth harmonic in phase b will be,

Thus, the ac output line voltage Vab = Van – Vbn doesn’t

contain the ninth harmonic.
 Therefore, for odd multiples of three times the normalized carrier
frequency mf, the harmonics in the ac output voltage appear at
normalized frequencies fh centered around mf and its multiples, at

where j = 1,3,5,.. for k = 2,4,6,…; and j = 2,4,… for k = 1,5,7,… such

that n is not a multiple of three. Therefore, the harmonics are at mf ±
2, mf ± 4,…, 2mf ± 1, 2mf ± 5,…., 3mf ± 2, 3mf ± 4….. 4mf ± 1, 4mf ±
5,….. For nearly sinusoidal ac load current, the harmonics in the dc
link current are at frequencies given by,

where j = 0,2,4,…for k = 1,5,7,…and j = 1,3,5,… for k = 2,4,6 such

that is positive and not a multiple of three.
A single – phase bridge inverter has the output voltage waveform as shown in Figure.

a) Determine the rms voltage levels of fundamental and all harmonic components including
the 13th.
b) What is the total harmonic distortion of the waveform?

For SPWM:
SPWM technique can be modified so
that the carrier wave is applied during
the first and last 60ᵒ intervals per half-
cycle (e.g., 0ᵒ to 60ᵒ and 120ᵒ to 180ᵒ).
This modified sinusoidal pulse-width
modulation (MSPWM) is shown in
Figure. The fundamental component is
increased and its harmonic
characteristics are improved. It reduces
the number of switching of power
devices and so also reduces switching
losses.

Figure : Modified sinusoidal pulse-width modulation

The mth time tm and angle αm of
intersection can be determined from

Where tx can be solved from

The time intersections during the last

60ᵒ intervals can be found from

Where Ts=T/6(p+1).

Figure : Modified sinusoidal pulse-width modulation

The instantaneous output voltage is
vo=Vs=(g1-g4). The algorithm for
generating signals is similar to that for
sinusoidal PWM, except the reference
signal is a sine wave from 60ᵒ to 120ᵒ
only.

Figure : Modified sinusoidal pulse-width modulation

 IL

In a current-source inverter(CSI), the Q

Le L
Q1 Q3
input behaves as a current source. The +Vs

D1 D3

output current is maintained constant Vs Dm Ce

io
Load

irrespective of load on the inverter and Q4 Q4

the output voltage is forced to change. D4 D2

The circuit diagram of a single-phase Variable dc voltage

(a) Transistor CSI

transistorized inverter is shown in g1

Figure a. Because there must be a ωt

π
continous current flow from the g2
2π 3π

source, two switches must always

ωt

conduct - one from the upper and one g3

from the lower switches. The

ωt

conduction sequence is 12,23,34, and g4

41 as shown in Figure b. The output

ωt
current waveform is shown in Figure c. io (b) Gate signals

The diodes in series with the

ωt

transistors are required to block the Fundamental Current

π 2π 3π

reverse voltages on the transistors. (c ) Load Current

Figure : Single-phase current source inverter

 IL
Le L
Q
Q1 Q3
+Vs

D1 D3
io
Vs Dm Ce Load

Q4 Q4

D4 D2

Variable dc voltage
(a) Transistor CSI
g1

ωt
π 2π 3π
g2

ωt
g3

The load current can be expressed as: ωt

g4

ωt
io (b) Gate signals

ωt
π 2π 3π

Fundamental Current

(c ) Load Current

Figure : Single-phase current source inverter

The CSI is a dual of VSI. The line-to-line voltage is similar in shape to the line
current of a CSI. The advantages of the CSI are[1]:

o Since the input dc current is controlled and limited, misfiring of switching

devices, or a short circuit, would not be serious problems
o The peak current of power devices is limited;
o The commutation circuits for thyristors are simpler; and
o It has the ability to handle reactive or regenerative load without
freewheeling diodes.
Inverters can provide single-phase and three-phase ac voltages from a fixed
or variable dc voltage. There are various voltage control techniques and
they produce a range of harmonics on the output voltage. The SPWM is
effective control method in reducing the LOH.
82