Scribd
Upload
126 views3 pages

8-Bit Register Design in Computer Architecture

The document discusses the design and functionality of an 8-bit register and a register file, which consists of multiple registers that can be accessed for reading and writing data. It outlines the necessary components for a register file, including input/output ports, control bits, and clock signals, emphasizing the convenience of having multiple read and write ports for MIPS architecture. Additionally, it highlights the need for proper selection mechanisms, such as multiplexors and decoders, to manage data flow within the register file.

Uploaded by

mughees zia
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
126 views3 pages

8-Bit Register Design in Computer Architecture

The document discusses the design and functionality of an 8-bit register and a register file, which consists of multiple registers that can be accessed for reading and writing data. It outlines the necessary components for a register file, including input/output ports, control bits, and clock signals, emphasizing the convenience of having multiple read and write ports for MIPS architecture. Additionally, it highlights the need for proper selection mechanisms, such as multiplexors and decoders, to manage data flow within the register file.

Uploaded by

mughees zia
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

8-Bit Register Registers 1

Built using D flip-flops:

Clock input controls when input is "written" to the individual flip-flops.

However, the design above isn’t quite what we want…

QTP What’s wrong with this?


How can we fix it?

CS@VT September 2009 Computer Organization I ©2006-09 McQuain, Feng & Ribbens
Register File Registers 2

A register file is a collection of k registers (a sequential logic block) that can be read and
written by specifying a register number that determines which register is to be accessed.

The interface should minimally include:


- an n-bit input to import data for writing (a write port)
- an n-bit output to export read data (a read port)
- a log(k)-bit input to specify the register number
- control bit(s) to enable/disable read/write operations
- a control bit to clear all the registers, asynchronously
- a clock signal

Some designs may provide multiple read or write ports, and additional features.

For MIPS, it is convenient to have two read ports and one write port. Why?

CS@VT September 2009 Computer Organization I ©2006-09 McQuain, Feng & Ribbens
A File of 8-Bit Registers Registers 3

Aggregating a collection of 4-bit registers, and providing the appropriate register selection
and data input/output interface:

8-bit registers

multiplexor to
select read
register
decoder to
select write
register

CS@VT September 2009 Computer Organization I ©2006-09 McQuain, Feng & Ribbens

You might also like