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LTSpice Logic Gate Verification

The document summarizes the verification of basic logic gates and arithmetic circuits in LTSpice. It includes: 1) Truth tables and Boolean expressions for AND, OR, NAND, NOR, XOR, XNOR, and NOT gates. 2) Truth tables and Boolean expressions for half adder, full adder, half subtractor, and full subtractor circuits. 3) An experiment was done in LTSpice to plot the output graphs of each logic gate and circuit, which verified that the Boolean expressions matched the plotted results.

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Ananya Panda
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18 views14 pages

LTSpice Logic Gate Verification

The document summarizes the verification of basic logic gates and arithmetic circuits in LTSpice. It includes: 1) Truth tables and Boolean expressions for AND, OR, NAND, NOR, XOR, XNOR, and NOT gates. 2) Truth tables and Boolean expressions for half adder, full adder, half subtractor, and full subtractor circuits. 3) An experiment was done in LTSpice to plot the output graphs of each logic gate and circuit, which verified that the Boolean expressions matched the plotted results.

Uploaded by

Ananya Panda
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Task : 1 Basic Gate and Arithmetic circuits

NAME-Ananya Panda

REG. NO.-20BEC0205

TASK 1-DIGITAL LOGIC DESIGN

Aim 1: To verify the AND, OR, XOR Gate

Procedure:

1. Select the type of Gate and voltage source from the components section of
LTSpice.
2. Connect the components through the wire and ground the various voltage
sources.
3. Then give the circuit the command and plot the graph
4. Write down the truth table and verify the values through the graph plotted in
LTSpice.

AND and NAND Gate


Boolean Function for AND Gate: F=A.B

Truth Table for AND Gate:

A B F=A.B
0 0 0
0 1 0
1 0 0
1 1 1

Boolean Function for NAND Gate: F=(A.B)’

Truth Table for NAND Gate:

A B F=(A.B)’
0 0 1
0 1 1
1 0 1
1 1 0
OR and NOR Gate

Boolean Function for OR Gate: F=A+B

Truth Table for OR Gate:


A B F=A+B
0 0 0
0 1 1
1 0 1
1 1 1

Boolean Function for NOR Gate: F= (A+B)’

Truth Table for NOR Gate:

A B F=(A+B)’
0 0 1
0 1 0
1 0 0
1 1 0

XOR and XNOR Gate


Boolean Function for XOR Gate: F=AB+A’B’

Truth Table for XOR Gate:

A B F= AB+A’B’
0 0 0
0 1 1
1 0 1
1 1 0

Boolean Function for XNOR Gate: F=A’B+AB’

Truth Table for XNOR Gate:

A B F= A’B+AB’
0 0 1
0 1 0
1 0 0
1 1 1
NOT Gate

Boolean Function for NOT Gate: F=A’

Truth Table for NOT Gate:

A F=A’
0 1
1 0
Aim 2: To verify the half adder, full adder, half subtractor, and full subtractor
circuits.

Procedure:

1. Select the type of Gate and voltage source from the components section of
LTSpice.
2. Connect the components through the wire and ground the various voltage
sources.
3. Then give the circuit the command and plot the graph
4. Write down the truth table and verify the values through the graph plotted in
LTSpice.

HALF ADDER
Boolean Expressions: S=A’B+AB’ ; C=AB

Truth Table:

A B S=A’B+AB’ C=AB
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
FULL ADDER
Boolean Function: S=A’B’CIN+A’B’CIN’+AB’CIN’+ABCIN=A ⊕B ⊕CIN; COUT=AB+BC+AC

A B CIN S=A’B’CIN+A’B’CIN’+AB’CIN’+ABCIN COUT=AB+BC+AC


=A ⊕B ⊕CIN
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
HALF SUBTRACTOR
Boolean Functions: D=A’B+AB’; B0=A’B

Truth Table:

A B D=A’B+AB’ B0=A’B
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

FULL SUBTRACTOR
Boolean Function:

Diff=A’B’CIN+A’B’CIN’+AB’CIN’+ABCIN=A ⊕B ⊕CIN

Borrow Out= A’B+A’CIN+BCIN

Truth Table:

A B CIN Borrow Out= Diff=A’B’CIN+A’B’CIN’+AB’CIN’+ABCIN


A’B+A’CIN+BCIN =A ⊕B ⊕CIN
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 1 0
1 0 0 0 1
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

Inference: So from the above experiments, we can conclude that the Boolean
expressions of each logic gate correspond to the graph plotted on LT spice.

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