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PRODUCT SPECIFICATION

ϭ Tentative Specification
ϭ Preliminary Specification
Ϯ Approval Specification

MODEL NO.: V390HJ1

SUFFIX: P03
39”FHD_60Hz_Open Cell

Source Board + Control Board + FFC Cable

Customer:

APPROVED BY SIGNATURE

Name / Title
Note

ΗPlease return 1 copy for your confirmation with your

signature and comments.
ΗRefer to "V390" Incoming Inspection Spec

Approved By Ch˸cked By Prepared By

Chao-Chun Chung Roger Huang WJ Chang

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CONTENTS

REVISION HISTORY.........................................................................................................................................................4

1. GENERAL DESCRIPTION............................................................................................................................................5
1.1 OVERVIEW ..........................................................................................................................................................5
1.2 FEATURES...........................................................................................................................................................5
1.3 MECHANICAL SPECIFICATIONS .......................................................................................................................5

2. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................6

2.1 ABSOLUTE RATINGS OF ENVIRONMENT........................................................................................................6
2.2 PACKAGE STORAGE..........................................................................................................................................7
2.3 ELECTRICAL ABSOLUTE RATINGS ..................................................................................................................7

3. ELECTRICAL CHARACTERISTICS .............................................................................................................................8

3.1 TFT LCD MODULE ..............................................................................................................................................8

4. BLOCK DIAGRAM OF INTERFACE ........................................................................................................................... 11

4.1 TFT LCD OPEN CELL ....................................................................................................................................... 11

5. INPUT TERMINAL PIN ASSIGNMENT .......................................................................................................................12

5.1 TFT LCD Module Input.......................................................................................................................................12
5.2 LVDS INTERFACE .............................................................................................................................................15
5.3 COLOR DATA INPUT ASSIGNMENT ................................................................................................................16
5.4 FLICKER (V-com/Gamma) ADJUSTMENT........................................................................................................17

6. INTERFACE TIMING...................................................................................................................................................18
6.1 INPUT SIGNAL TIMING SPECIFICATIONS ......................................................................................................18
6.2 POWER ON/OFF SEQUENCE..........................................................................................................................21

7. OPTICAL CHARACTERISTICS ..................................................................................................................................22

7.1 TEST CONDITIONS...........................................................................................................................................22
7.2 OPTICAL SPECIFICATIONS .............................................................................................................................23

8. PRECAUTIONS...........................................................................................................................................................23
8.1 ASSEMBLY AND HANDLING PRECAUTIONS .................................................................................................26
8.2 SAFETY PRECAUTIONS ..................................................................................................................................26

9. DEFINITION OF LABELS............................................................................................................................................28
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9.1 CMI OPEN CELL LABEL ...................................................................................................................................28

9.2 CARTON LABEL ................................................................................................................................................28

10. PACKAGING..............................................................................................................................................................29
10.1 PACKAGING SPECIFICATIONS .....................................................................................................................29
10.2 PACKAGING METHOD....................................................................................................................................29

11. MECHANICAL CHARACTERISTIC...........................................................................................................................31

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REVISION HISTORY
Version Date Page(New) Section Description
Ver. 2.0 May. 10, 2012 All All The Approval Specification was first issued.

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1. GENERAL DESCRIPTION
1.1 OVERVIEW
V390HJ1-P03 is a 39” TFT Liquid Crystal Display product with driver ICs and 2ch-LVDS interface. This module
supports 1920 x 1080 Full HDTV format and can display 16.7M colors (8-bit). The backlight unit is not built in.

1.2 FEATURES
CHARACTERISTICS ITEMS SPECIFICATIONS
Screen Diagonal [in] 39
Pixels [lines] 1920 × 1080
Active Area [mm] 853.92(H) x 480.33(V) (38.5” diagonal)
Sub-Pixel Pitch [mm] 0.14825 (H) x 0.44475 (V)
Pixel Arrangement RGB vertical stripe
Weight [g] TYP. 1260g(Not Include Control Board and FFC Cable)
Physical Size [mm] 881.00 (H) × 522.53(V) × 1.8(D) Typ.
Display Mode Transmissive mode / Normally black
Contrast Ratio 5000:1 Typ.
(Typical value measure at CMI’s module)
Glass thickness (Array / CF) [mm] 0.5 / 0.5
Viewing Angle (CR>20) +88/-88(H), +88/-88(V) Typ. (CRЊ20)
(Typical value measure at CMI’s module)
Color Chromaticity R = (0.656, 0.323)
G = (0.266, 0.576)
B = (0.135, 0.104)
W= (0.302, 0.344)
* Please refer to “color chromaticity” on p.23
Cell Transparency [%] 5.5%
Polarizer Surface Treatment Anti-Glare coating (Haze 3.5%), Hardness 3H

1.3 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note
Weight --- 1260 --- g -
The mounting inclination of the connector makes the
I/F connector mounting position 37/37 (1)(2)
screen center within ± 0.5mm as the horizontal.
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Note (2) Connector mounting position

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Value
Item Symbol Unit Note
Min. Max.

Storage Temperature TST -20 +60 ºC (1)

Operating Ambient Temperature TOP 0 50 ºC (1), (2)

Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.

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2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time, It is highly recommended to
store the module with temperature from 0 to 35 к at normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.

2.3 ELECTRICAL ABSOLUTE RATINGS

Value
Item Symbol Unit Note
Min. Max.

Power Supply Voltage VCC -0.3 13.5 V

(1)
Logic Input Voltage VIN -0.3 3.6 V

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation
should be restricted to the conditions described under Normal Operating Conditions.

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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
(Ta = 25 ± 2 ºC)

Value
Parameter Symbol Unit Note
Min. Typ. Max.

Power Supply Voltage VCC 10.8 12 13.2 V (1)

Rush Current IRUSH Ё Ё 2.457 A (2)

White Pattern Ё Ё 0.228 0.312 A

Power Supply Current Horizontal Stripe Ё Ё 0.48 0.637 A (3)

Black Pattern Ё Ё 0.24 0.321 A

Differential Input High
VLVTH +100 Ё Ё mV
Threshold Voltage
Differential Input Low
VLVTL Ё Ё -100 mV
Threshold Voltage
LVDS
Common Input Voltage VCM 1.0 1.2 1.4 V (4)
interface
Differential input voltage |VID| 200 Ё 600 mV

Terminating Resistor RT Ё 100 Ё ohm

Input High Threshold Voltage VIH 2.7 Ё 3.3 V

CMOS
interface
Input Low Threshold Voltage VIL 0 Ё 0.7 V

Note (1) The module should be always operated within the above ranges.
Note (2) Measurement condition:

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Vcc rising time is 470us

Vcc

0.9Vcc

0.1Vcc

GND
470us

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Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60 Hz,
whereas a power dissipation check pattern below is displayed.

a. White Pattern b. Black Pattern

Active Area Active Area

Note (4) The LVDS input characteristics are as follows:

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4. BLOCK DIAGRAM OF INTERFACE

4.1 TFT LCD OPEN CELL

TFT LCD PANEL

(1920x3x1080)

X(R) Board X(L) Board

C Board

INPUT CONNECTOR
(FI-RE51S-HF-CM-R1500, JAE Taiwan (‫؀‬᨜౰़ሽ՗))

SELLVDS VCC
ORX0 (+/-) ERX0 (+/-)
SCL GND
ORX1 (+/-) ERX1(+/-)
ORX2 (+/-) ERX2 (+/-) SDA
ORX3 (+/-) ERX3 (+/-)
WP
OCLK (+/-) ECLK (+/-)

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5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD Module Input
CNF1 Connector Part No.: JAE Taiwan (‫؀‬᨜౰़ሽ՗) FI-RE51S-HF-CM-R1500
Pin Name Description Note
1 VCC +12V power supply
2 VCC +12V power supply
3 VCC +12V power supply
4 VCC +12V power supply
5 VCC +12V power supply
6 N.C. No Connection (3)
7 GND Ground
8 GND Ground ʳ
9 GND Ground ʳ
10 ORX0- Odd pixel Negative LVDS differential data input. Channel 0
11 ORX0+ Odd pixel Positive LVDS differential data input. Channel 0
12 ORX1- Odd pixel Negative LVDS differential data input. Channel 1
ʳ (1)
13 ORX1+ Odd pixel Positive LVDS differential data input. Channel 1
14 ORX2- Odd pixel Negative LVDS differential data input. Channel 2
15 ORX2+ Odd pixel Positive LVDS differential data input. Channel 2
16 GND Ground ʳ
17 OCLK- Odd pixel Negative LVDS differential clock input
ʳ (1)
18 OCLK+ Odd pixel Positive LVDS differential clock input.
19 GND Ground ʳ
20 ORX3- Odd pixel Negative LVDS differential data input. Channel 3
(1)
21 ORX3+ Odd pixel Positive LVDS differential data input. Channel 3
22 N.C. No Connection
ʳ (3)
23 N.C. No Connection
24 GND Ground ʳ
25 ERX0- Even pixel Negative LVDS differential data input. Channel 0
26 ERX0+ Even pixel Positive LVDS differential data input. Channel 0
27 ERX1- Even pixel Negative LVDS differential data input. Channel 1
ʳ (1)
28 ERX1+ Even pixel Positive LVDS differential data input. Channel 1
29 ERX2- Even pixel Negative LVDS differential data input. Channel 2
30 ERX2+ Even pixel Positive LVDS differential data input. Channel 2
31 GND Ground ʳ
32 ECLK- Even pixel Negative LVDS differential clock input.
ʳ (1)
33 ECLK+ Even pixel Positive LVDS differential clock input.
34 GND Ground ʳ
35 ERX3- Even pixel Negative LVDS differential data input. Channel 3
(1)
36 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
37 N.C. No Connection
(3)
38 N.C. No Connection
39 GND Ground ʳ
40 SCL EEPROM Serial Clock
41 N.C. No Connection (3)ʳ

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42 N.C. No Connection (3)

43 WP EEPROM Write Protection
44 SDA EEPROM Serial Data
45 SELLVDS LVDS data format selection ʳ (4)(5)
46 N.C. No Connection
47 N.C. No Connection
48 N.C. No Connection ʳ
ʳ (3)
49 N.C. No Connection ʳ
50 N.C. No Connection
51 N.C. No Connection

Note (1) Two pixel data send into the module for every clock cycle. The first pixel of the frame is odd pixel and the
second pixel is even pixel
Note (2) LVDS connector pin order defined as follows

Note (3) Reserved for internal use. Please leave it open.

Note (4)Low = Open or connect to GND: JEIDA Format, High = Connect to +3.3V: VESA Format.
Note (5) Interface optional pin has internal scheme as following diagram. Customer should keep the interface
voltage level requirement as below.

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System Board Panel Board

1K ohm IC

Interface Voltage Level >20K ohm

VH > 3.0V
VL < 0.7V

Note (6) The screw hole which is distant from the connector is merged with Ground

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5.2 LVDS INTERFACE

JEIDA FormatΚSELLVDS=L or Open

RXCLK̈́

ORX0̈́ G2 R7 R6 R5 R4 R3 R2

ORX1̈́ B3 B2 G7 G6 G5 G4 G3

ORX2̈́ DE VS HS B7 B6 B5 B4

ORX3̈́ RSVD B1 B0 G1 G0 R1 R0

ERX0̈́ G2 R7 R6 R5 R4 R3 R2

ERX1̈́ B3 B2 G7 G6 G5 G4 G3

ERX2̈́ DE VS HS B7 B6 B5 B4

ERX3̈́ RSVD B1 B0 G1 G0 R1 R0

VESA FormatΚSELLVDS=H

Current F\FOH

RXCLK̈́

ORX0̈́ G0 R5 R4 R3 R2 R1 R0

ORX1̈́ B1 B0 G5 G4 G3 G2 G1

ORX2̈́ DE VS HS B5 B4 B3 B2

ORX3̈́ RSVD B7 B6 G7 G6 R7 R6

ERX0̈́ G0 R5 R4 R3 R2 R1 R0

ERX1̈́ B1 B0 G5 G4 G3 G2 G1

ERX2̈́ DE VS HS B5 B4 B3 B2

ERX3̈́ RSVD B7 B6 G7 G6 R7 R6

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R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE: Data enable signal
DCLK: Data clock signal
Notes (1) RSVD (reserved) pins on the transmitter shall be “H” or “L”.

5.3 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color.
The higher the binary input, the brighter the color. The table below provides the assignment of the color versus
data input.
Data Signal
Color Red Green Blue
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Basic Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Colors Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Red (0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (1) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (2) 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Red (253) 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red
Red (254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red (255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green (1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Green (2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Green (253) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0
Green
Green (254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
Green (255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Blue (0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue (1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Blue (2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Blue (253) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1
Blue
Blue (254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0
Blue (255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Note (1) 0: Low Level Voltage, 1: High Level Voltage

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5.4 FLICKER (V-com/Gamma) ADJUSTMENT

(1) Adjustment Pattern:
Sub-pixel on/off pattern was shown as below. If customer need below pattern, please directly contact with
Account FAE. (bright sub-pixelΚG128 ; dark sub-pixelΚG0)

(2) Adjustment method: (Digital V-com)

Programmable memory IC is used for Digital V-com adjustment in this model. CMI provide Auto Vcom tools
to adjust Digital V-com. The detail connection and setting instruction, please directly contact with Account
FAE or refer CMI Auto V-com adjustment OI. Below items is suggested to be ready before Digital V-com
adjustment in customer LCM line.

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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
(Ta = 25 ± 2 ºC)
The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

Fclkin
Frequency 60 74.25 80 MHz
(=1/TC)
Input cycle to
LVDS Trcl Ё Ё 200 ps (3)
cycle jitter
Receiver Spread spectrum
Clock Fclkin_mod Fclkin-2% Ё Fclkin+2% MHz
modulation range
(4)
Spread spectrum
FSSM Ё Ё 200 KHz
modulation frequency
LVDS
Receiver Skew
Receiver TRSKM -400 Ё 400 ps (5)
Margin
Data
Fr5 Ё 50 Ё Hz
Frame Rate
Fr6 Ё 60 Ё Hz
Vertical
Active Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display
Term Display Tvd 1080 1080 1080 Th Ё

Blank Tvb 35 45 55 Th Ё

Total Th 1030 1100 1325 Tc Th=Thd+Thb

Horizontal
Active
Display Thd 960 960 960 Tc Ё
Display
Term
Blank Thb 70 140 365 Tc Ё

Note (1) Please make sure the range of pixel clock has follow the below equationΚ
Fclkin(max) Њ Fr6 Ѽ Tv Ѽ Th
Fr5 Ѽ Tv Ѽ Th Њ Fclkin(min)
Note (2) This module is operated in DE only mode and please follow the input signal timing diagram belowΚ

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Tv
Tvd
Tvb

DE
Th

DCLK

Tc
Thd
Thb
DE

DATA Valid display data ( 960 clocks)

Note (3) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T1 – TI

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Note (4) The SSCG (Spread spectrum clock generator) is defined as below figures.

Note (5) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.

LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

RXCLK+/-

RXn+/-

TRSKM

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6.2 POWER ON/OFF SEQUENCE

(Ta = 25 ± 2 ºC)
To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram
below.

0.1VCC 0.1Vcc
0V

0.5ЉT1Љ10ms T1 T3
0ЉT2Љ50ms
0ЉT3Љ50ms
500ms ЉT4 T2 T4

VALID
LVDS Signals 0V
Power On Power Off

0ЉT7ЉT2
0ЉT8ЉT3
T7 T8

Option Signals
(SELLVDS)

Backlight (Recommended) 50% 50%

500msЉT5
100msЉT6

T5 T6

Power ON/OFF Sequence

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance. If
T2<0,that maybe cause electrical overstress failure.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
o
Ambient Temperature Ta 25r2 C
Ambient Humidity Ha 50r10 %RH
Supply Voltage VCC 12 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during
measuring in a windless room.

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7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown as below. The following items
should be measured under the test conditions described in 7.1 and stable environment shown in 7.1.
Item Symbol Condition Min. Typ. Max. Unit Note

Rcx 0.656 -
Red
Rcy 0.323 -

Gcx 0.266 -
Green Tx=0q, TY =0q
Gcy Typ. 0.576 Typ -
Color Viewing Angle at Normal - + (0)
Chromaticity Bcx Direction -
0.03 0.135 0.03
Blue Standard light source “C”
Bcy 0.104 -

Wcx 0.302 -
White
Wcy 0.344 -

Center Transmittance T% Tx=0q, TY =0q - 5.5 - % (1),(6)

Contrast Ratio CR with CMI module 3500 5000 - - (1),(3)

Gray to Tx=0q, TY =0q
Response Time - 9.0 18 ms (1),(4)
gray with CMI Module
Tx=0q, TY =0q
White Variation GW - - 1.3 - (1),(5)
with CMI module
Tx+ 80 88 -
Horizontal
Viewing Tx- 80 88 -
With CMI module Deg. (1),(2)
Angle
TY+ 80 88 -
Vertical
TY- 80 88 -

Note (0) Light source is the standard light source ”C” which is defined by CIE and driving voltage are based on
suitable gamma voltages. The calculating method is as following:
1. Measure Module’s W,R,G,B spectrum and BLU’s spectrum. Which BLU (for V390HK1-LS5) is
supplied by CMI.
2. Calculate cell’s spectrum.
3. Calculate cell’s chromaticity by using the spectrum of standard light source “C”.

Note (1) Light source is the BLU which supplied by CMI and driving voltage are based on suitable gamma
voltages.

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Note (2) Definition of Viewing Angle (Tx, Ty):

Viewing angles are measured by Autronic Conoscope Cono-80 ( or Eldim EZ-Contrast 160R )

Normal
Tx = Ty = 0º

Ty- Ty

TX- = 90º x- 12 o’clock direction

y+
Tx Ty+ = 90º
Tx

6 o’clock
y- x+ TX+ = 90º
Ty- = 90º

Note (3) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.
Surface Luminance of L255
Contrast Ratio (CR) =
Surface Luminance of L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (6).

Note (4) Definition of Gray-to-Gray Switching Time:

100%
90%

Optical
Response
10%
0%

Time
Gray to gray Gray to gray
switching time switching time

The driving signal means the signal of gray level 0, 31, 63, 95, 127, 159, 191, 223 and 255.
Gray to gray average time means the average switching time of gray level 0, 31, 63, 95, 127, 159, 191,
223 and 255 to each other.
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Note (5) Definition of White Variation (GW):

Measure the luminance of gray level 255 at 5 points
GW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

Horizontal Line

D/4 D/2 3D/4

W/4 1 2
Vertical Line

W W/2 5 X : Test Point

X=1 to 5

3W/4 3 4

Active Area

Note (6) Definition of Transmittance (T%) :

Measure the luminance of gray level 255 at center point of LCD module.
Luminance of LCD module
Transmittance (T%) = u 100%
Luminance of backligh unit

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8. PRECAUTIONS
8.1 ASSEMBLY AND HANDLING PRECAUTIONS
[1] Do not apply rough force such as bending or twisting to the module during assembly.
[2] It is recommended to assemble or to install a module into the user’s system in clean working areas. The
dust and oil may cause electrical short or worsen the polarizer.
[3] Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight.
[4] Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
[5] The distance between COF edge and rib of BLU must bigger than 5mm. This can prevent the damage of
COF when assemble the module.
[6] Do not design sharp-pointed structure / parting line / tooling gate on the COF position of plastic parts,
because the burr will scrape the COF.
[7] If COF would bended to assemble in the module. Do not put the IC location on the bending corner of COF.
[8] The gap between COF IC and any structure of BLU must bigger than 2mm. This can prevent the damage of
COF IC
[9] Bezel opening must have no burr. Burr will scrape the panel surface.
[ 10 ] Bezel of module and bezel of set can not press or touch the panel surface. It will make light leakage or
scrape.
[ 11 ] When module used FFC / FPC, but no FFC / FPC to be attached in the open cell. Customer can refer the
FFC / FPC drawing and buy it by self.
[ 12 ] The gap between Panel and any structure of Bezel must bigger than 2mm. This can prevent the damage of
Panel.
[ 13 ] Do not plug in or pull out the I/F connector while the module is in operation.
[ 14 ] Do not disassemble the module.
[ 15 ] Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily
scratched.
[ 16 ] Moisture can easily penetrate into LCD module and may cause the damage during operation.
[ 17 ] When storing modules as spares for a long time, the following precaution is necessary.
[ 17.1 ] Do not leave the module in high temperature, and high humidity for a long time. It is highly
recommended to store the module with temperature from 0 to 35кat normal humidity without
condensation.
[ 17.2 ] The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or
fluorescent light.
[ 18 ] When ambient temperature is lower than 10ºC, the display quality might be reduced.

8.2 SAFETY PRECAUTIONS

[1] The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while
assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit.
[2] If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of
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contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
[3] After the module’s end of life, it is not harmful in case of normal operation and storage.

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9. DEFINITION OF LABELS
9.1 CMI OPEN CELL LABEL
The barcode nameplate is pasted on each open cell as illustration for CMI internal control.

V390HJ1 – P03 Rev. XX

XXXXXXXYMDLNNNN
Made In XXXXXX

9.2 CARTON LABEL

The barcode nameplate is pasted on each box as illustration, and its definitions are as following explanation

PO. NO. Made in XXXXXX

Parts ID. Quantities 13

Model Name

Carton ID. RoHS

XXXXXXXXXXXXXX

(a) Model Name: V390HJ1– P03

(b) Carton ID: CMI internal control
(c) Quantities: 13

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10. PACKAGING
10.1 PACKAGING SPECIFICATIONS
(1) 13 LCD TV Panels / 1 Box
(2) Box dimensions : 1110 (L) X 810 (W) X99 (H)mm
(3) Weight : approximately 26Kg ( 13 panels per box)
(4) 156 LCD TV Panels / 1 Group

10.2 PACKAGING METHOD

Figures 10-1 and 10-2 are the packing method

Figure.10-1 packing method

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Figure.10-2 packing method

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11. MECHANICAL CHARACTERISTIC

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