Case Study On

Microprocessor & Assembly Language

Submitted By
Name: Tanzim Yn Afrin
Roll: 3317
Batch: 52A

Submitted To
Shamsun Nahar
Lecturer
Department of Computer Science & Engineering

Submission Date: 17 July 2021

Answer to the Question No.1
First Generation Processor

The first generation of processors represents the series of chips from Intel that were found in the
first PCs. IBM, as the architect of the PC at the time, chose Intel processors and support chips to
build the PC motherboard, setting a standard that would hold for many subsequent processor
generations to come.

The 8086 was one of the first 16-bit processor chips on the market; at the time, virtually all other
processors were 8-bit designs. The 8086 had 16-bit internal registers and could run a new class
of software using 16-bit instructions. It also had a 16-bit external data path, so it could transfer
data to memory 16 bits at a time.

Second Generation Processor

The second generation processor family are 64-bit, multi-core processors built on 32nm process
technology. Intel is worth mentioning here. The processors are designed for a two-chip platform.
The two-chip platform consists of a processor and a Platform Controller Hub (PCH) and enables
higher performance, lower cost, easier validation, and improved x-y footprint. The processors
include Integrated Display Engine, Processor Graphics, and an Integrated Memory Controller.
These processors are designed for desktop or mobile platforms. The Intel 2nd Gen Core
Processor Family utilizes 32nm micro-architecture technology. Its smaller transistors and new
architectural design result in higher performance at lower power.

Third Generation Processor

The third generation processors typically belong to the Intel Core family. It comes with far better
features that enhance its performance significantly. The processor is built using the innovative 22
nm (nanometer) process technology. The features of this processor will surely appeal to you as it
has several consumers as well as software developers. There have been significant enhancements
made in the design of the graphics system of this processor. The shader, which is normally
programmable, now has the power to execute dual-issue instructions. With all these innovative
features included and the improvements made in its micro-architecture, the 3rd Generation Core
Processor comes with better and more media and graphics processing capabilities.

Fourth Generation Processor

The fourth generation processors are those chips in the Intel Core processor family that deliver
maximum performance with each watt of power consumed. This applies irrespective of its usage.
This means that, whether you use it for your desktop or laptop computer, any mobile devices or
embedded products, it will offer the same higher level of performance. The fourth generation
processors or Haswell have an architecture that utilizes two specific technologies,
  The Fin-Fet technology and the
 The 22 nm process technology.

Both these technologies ensure low power consumption and a reduced leakage. The 20x
improvement of this fourth generation processor as compared to the other previous generations
of processors ensure that the power consumption in its idle state is significantly lowered.

Answer to the Question No.2

The size of the instruction queue in 8086 is 6 byte and the maximum chip length is 33 mm². On
the 8086 port of such code, this memory could reside anywhere in the 1 MB address space.
People often talk of the 640 KB limit. That comes from the IBM PC architecture. On the CPU
the limit is 1MB.

Answer to the Question No.3

Explain briefly the TRAP input for 8085,

 The TRAP input is sensitive to both edge and level.

 The pulse width for this signal should be in excess as compared to the normal noise
width.
 A second TRAP will never be able to respond for the second time as it requires the first
TRAP to go through a high to low transition.
 The pulse widths are wider than normal widths so as to prevent unwanted false triggers.

Answer to the Question NO.4

Difference between the HLT and the Hold States

- The Hold is a hardware input, whereas HLT is a software instruction.

- When the HLT state is executed, the processor simply stops and the buses are driven to
the tri state. No form of acknowledgement signal is given out by the processor.
- In the case of Hold the processor goes into the Hold state, but the buses are not driven to
the tri state.
- When the processor goes into the Hold state, it gives out an HLDA signal. This signal can
be made to use by other devices.

Answer to the Question No.5

High Level Language

The high level language is abbreviated as HLL. High level languages are similar to the human
language. High level languages are programmers friendly, easy to code, debug and maintain.
High level language provides a higher level of abstraction from machine language. They do not
interact directly with the hardware. We can compile the source code written in a high level
language to multiple machine languages. Thus, they are machine-independent language.

Advantages of high level language,

 High level programming results in better programming productivity.

 Less error prone, easy to find and debug errors. They are easy to write, debug and
maintain.
 It provides a higher level of abstraction from machine languages.

Assembly language

Assembly Language is a low-level programming language. It helps in understanding the

programming language to machine code. Assembly language is designed to understand the
instruction and provide it to machine language for further processing. It mainly depends on the
architecture of the system, whether it is the operating system or computer architecture. Assembly
Language mainly consists of mnemonic processor instructions or data and other statements or
instructions.

Primary advantages of Assembly Language,

 It allows complex jobs to run in a simpler way.

  It is memory efficient as it requires less memory.
 It is faster in speed as its execution time is less.
 It is used for critical jobs.
 It is not required to keep track of memory locations.
 It is a low-level embedded system.

Answer to the Question No.6

Explain briefly the steps involved in a Fetch Cycle

Fetch cycle is the time required to fetch an opcode from a particular location in memory.

 General Fetch Cycles consist of 3T states.

 The first-T state involves the sending of the memory address stored in the Program
Counter to the memory.
 During the second-T state, the contents of the addressed memory are read (this generally
is the opcode at the specified location)
 In the third T state the opcode is sent to the Instruction register through the data bus for
execution.
 For slower memories, the processors have the provision to get in to the WAIT cycles as
well.

Answer to the Question No.7

The INTR is a maskable interrupt for the 8085. It has the lowest priority and is also non-
vectored. When this INTR signal goes into the high state, the following things occur/take place,

 For every instruction that is executed, the 8085 checks the status of this interrupt.
 Till an instruction is completed, the signal of INTR will remain high. Once an instruction
is completed, the processor sends an acknowledgement signal INTA.
 As soon as the INTA signal goes low, a new opcode is placed on the data bus for transfer.
 Once the new instruction is received, the processor saves the address of the new
instruction into the STACK and an interrupt service subroutine begins.
 Answer to the Question No.8

The process Control Block is a data structure that contains information of the process related to
it. The process control block is also known as a task control block, entry of the process table, etc.
The process control stores many data items that are needed for efficient process management.
There are instructions to store bytes (8 bits), half-words (16 bits), and double-words (64 bits).

The following are the data items,

 Process State

This specifies the process state, i.e., new, ready, running, waiting or terminated.

 Process Number

This shows the number of the particular process.

 Program Counter

This contains the address of the next instruction that needs to be executed in the process.

 Registers

This specifies the registers that are used by the process. They may include accumulators, index
registers, stack pointers, general purpose registers etc.

 List of Open Files

These are the different files that are associated with the process.