®

INA
134
INA
213
INA134
4
INA
134
INA
213
4
INA2134

AUDIO DIFFERENTIAL LINE RECEIVERS

0dB (G = 1)
FEATURES APPLICATIONS
● SINGLE AND DUAL VERSIONS ● AUDIO DIFFERENTIAL LINE RECEIVER
● LOW DISTORTION: 0.0005% at f = 1kHz ● SUMMING AMPLIFIER
● HIGH SLEW RATE: 14V/µs ● UNITY-GAIN INVERTING AMPLIFIER
● FAST SETTLING TIME: 3µs to 0.01% ● PSUEDOGROUND GENERATOR
● WIDE SUPPLY RANGE: ±4V to ±18V ● INSTRUMENTATION BUILDING BLOCK
● LOW QUIESCENT CURRENT: 2.9mA max ● CURRENT SHUNT MONITOR
● HIGH CMRR: 90dB ● VOLTAGE-CONTROLLED CURRENT
● FIXED GAIN = 0dB (1V/V) SOURCE
● PACKAGES—SINGLE: 8-PIN DIP, SO-8 ● GROUND LOOP ELIMINATOR
V+
DUAL: 14-PIN DIP, SO-14
7

DESCRIPTION 25kΩ 25kΩ

2 5
–In Sense
The INA134 and INA2134 are differential line receiv-
ers consisting of high performance op amps with on-
chip precision resistors. They are fully specified for 6
Output
high performance audio applications and have excel-
lent ac specifications, including low distortion 3
25kΩ 25kΩ
1
+In Ref
(0.0005% at 1kHz) and high slew rate (14V/µs), assur-
ing good dynamic response. In addition, wide output INA134 V+

voltage swing and high output drive capability allow 4

11
use in a wide variety of demanding applications. The V–
25kΩ 25kΩ
dual version features completely independent circuitry –In A
2 12
Sense A
for lowest crosstalk and freedom from interaction,
even when overdriven or overloaded.
13
A Out A
The INA134 and INA2134 on-chip resistors are laser
trimmed for accurate gain and optimum 25kΩ 25kΩ
3 14
common-mode rejection. Furthermore, excellent TCR +In A Ref A

tracking of the resistors maintains gain accuracy and

25kΩ 25kΩ
common-mode rejection over temperature. Operation 6 10
–In B Sense B
is guaranteed from ±4V to ±18V (8V to 36V total
supply). 9
B Out B
The INA134 is available in 8-pin DIP and SO-8
surface-mount packages. The INA2134 comes in 25kΩ 25kΩ
5 8
14-pin DIP and SO-14 surface-mount packages. Both +In B Ref B

are specified for operation over the extended industrial INA2134

temperature range, –40°C to +85°C. 4

V–

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: [Link] • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

©1997 Burr-Brown Corporation PDS-1390A Printed in U.S.A. July, 1997

SBOS071
SPECIFICATIONS: VS = ±18V
At TA = +25°C, VS = ±18V, RL = 2kΩ, and Ref Pin connected to Ground, unless otherwise noted.

INA134PA, UA
INA2134PA, UA
PARAMETER CONDITIONS MIN TYP MAX UNITS

AUDIO PERFORMANCE
Total Harmonic Distortion + Noise, f = 1kHz VIN = 10Vrms 0.0005 %
Noise Floor(1) 20kHz BW –100 dBu
Headroom(1) THD+N < 1% +23 dBu
FREQUENCY RESPONSE
Small-Signal Bandwidth 3.1 MHz
Slew Rate 14 V/µs
Settling Time: 0.1% 10V Step, CL = 100pF 2 µs
0.01% 10V Step, CL = 100pF 3 µs
Overload Recovery Time 50% Overdrive 3 µs
Channel Separation (dual), f = 1kHz 117 dB
OUTPUT NOISE VOLTAGE(2)
f = 20Hz to 20kHz 7 µVrms
f = 1kHz 52 nV/√HZ
OFFSET VOLTAGE(3)
Input Offset Voltage VCM = 0V ±100 ±1000 µV
vs Temperature Specified Temperature Range ±2 µV/°C
vs Power Supply VS = ±4V to ±18V ±5 ±60 µV/V
INPUT
Common-Mode Voltage Range: Positive VO = 0V 2(V+)–5 2(V+)–4 V
Negative VO = 0V 2(V–)+5 2(V–)+2 V
Differential Voltage Range See Typical Curve
Common-Mode Rejection VCM = ±31V, RS = 0Ω 74 90 dB
Impedance(4)
Differential 50 kΩ
Common-Mode 50 kΩ
GAIN
Initial 1 V/V
Error VO = –16V to 16V ±0.02 ±0.1 %
vs Temperature ±1 ±10 ppm/°C
Nonlinearity VO = –16V to 16V 0.0001 %
OUTPUT
Voltage Output, Positive (V+)–2 (V+)–1.8 V
Negative (V–)+2 (V–)+1.6 V
Current Limit, Continuous to Common ±60 mA
Capacitive Load (Stable Operation) 500 pF
POWER SUPPLY
Rated Voltage ±18 V
Voltage Range ±4 ±18 V
Quiescent Current (per Amplifier) IO = 0 ±2.4 ±2.9 mA
TEMPERATURE RANGE
Specification Range –40 85 °C
Operation Range –55 125 °C
Storage Range –55 125 °C
Thermal Resistance, θJA
8-Pin DIP 100 °C/W
SO-8 Surface-Mount 150 °C/W
14-Pin DIP 80 °C/W
SO-14 Surface-Mount 100 °C/W

NOTES: (1) dBu = 20log (Vrms /0.7746). (2) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network.
(3) Includes effects of amplifier’s input bias and offset currents. (4) 25kΩ resistors are ratio matched but have ±25% absolute value.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

INA134/2134 2
PIN CONFIGURATIONS
Top View 8-Pin DIP/SO-8 Top View 14-Pin DIP/SO-14

Ref 1 8 NC NC 1 14 Ref A

–In 2 7 V+ –In A 2 13 Out A

A

+In 3 6 Output +In A 3 12 Sense A

V– 4 5 Sense V– 4 11 V+

+In B 5 10 Sense B
NC = No Connection B

–In B 6 9 Out B

ABSOLUTE MAXIMUM RATINGS(1) NC 7 8 Ref B

Supply Voltage, V+ to V– .................................................................... 40V

Input Voltage Range .......................................................................... ±80V
Output Short-Circuit (to ground)(2) ........................................... Continuous
Operating Temperature ................................................. –55°C to +125°C NC = No Connection
Storage Temperature ..................................................... –55°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C

NOTE: (1) Stresses above these ratings may cause permanent damage.
(2) One channel per package.
ELECTROSTATIC
DISCHARGE SENSITIVITY
PACKAGE/ORDERING INFORMATION
This integrated circuit can be damaged by ESD. Burr-Brown
PACKAGE SPECIFICATION recommends that all integrated circuits be handled with ap-
DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER(1) RANGE propriate precautions. Failure to observe proper handling and
Single
installation procedures can cause damage.
INA134PA 8-Pin DIP 006 –40°C to +85°C ESD damage can range from subtle performance degradation
INA134UA SO-8 Surface-Mount 182 –40°C to +85°C
to complete device failure. Precision integrated circuits may
Dual
INA2134PA 14-Pin DIP 010 –40°C to +85°C
be more susceptible to damage because very small parametric
INA2134UA SO-14 Surface-Mount 235 –40°C to +85°C changes could cause the device not to meet its published
NOTE: (1) For detailed drawing and dimension table, please see end of data
specifications.
sheet, or Appendix C of Burr-Brown IC Data Book.

3 INA134/2134
 TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±18V, unless otherwise noted.

TOTAL HARMONIC DISTORTION+NOISE DIM INTERMODULATION DISTORTION

vs FREQUENCY vs OUTPUT AMPLITUDE
1 5
BW = 100kHz
VO = 10Vrms
0.1 1
THD+Noise (%)

DIM (%)
0.010 0.1 RL = 2kΩ, 600Ω
RL = 100kΩ

RL = 2kΩ
0.001 0.010

RL = 600Ω
0.0001 0.001
20 100 1k 10k 20k –10 –5 0 5 10 15 20 25
Frequency (Hz) Output Amplitude (dBu)

HEADROOM - TOTAL HARMONIC DISTORTION+NOISE HARMONIC DISTORTION PRODUCTS

vs OUTPUT AMPLITUDE vs FREQUENCY
1 0.01

f = 1kHz
Amplitude (% of Fundamental)

0.1 0.001 RL = 600Ω, RL = 600Ω,

2nd Harmonic RL = 2kΩ, 3rd Harmonic
THD+Noise (%)

2nd Harmonic
0.010 0.0001
RL = 600Ω

( noise limited)
RL = 2kΩ,
0.001 0.00001 3rd Harmonic
RL = 2kΩ,
100kΩ
VO = 1Vrms
0.0001 0.000001
0 5 10 15 20 25 30 20 100 1k 10k 20k
Output Amplitude (dBu) Frequency (Hz)

OUTPUT VOLTAGE NOISE SPECTRAL DENSITY OUTPUT NOISE VOLTAGE

vs FREQUENCY vs NOISE BANDWIDTH
10k 100
Voltage Noise (nV/√Hz)

Noise Voltage (µVrms)

1k 10

100 1

10 0.1
1 10 100 1k 10k 100k 1M 1 10 100 1k 10k 100k
Frequency (Hz) Frequency (Hz)

INA134/2134 4
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±18V, unless otherwise noted.

GAIN vs FREQUENCY COMMON-MODE REJECTION vs FREQUENCY

10 100

Common-Mode Rejection (dB)

80
0
Voltage Gain (dB)

60
–10
40

–20
20

–30 0
1k 10k 100k 1M 10M 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)

POWER SUPPLY REJECTION vs FREQUENCY CHANNEL SEPARATION vs FREQUENCY

120 130

RL = 100kΩ
100
Power Supply Rejection (dB)

Channel Separation (dB)

120
80
–PSR
RL = 2kΩ
60 110

40
100
+PSR
20

0 90
100 1k 10k 100k 1M 20 100 1k 10k 20k
Frequency (Hz) Frequency (Hz)

INPUT COMMON-MODE VOLTAGE RANGE

MAXIMUM OUTPUT VOLTAGE vs FREQUENCY vs OUTPUT VOLTAGE
40 40
VS = ±18V
30
Common-Mode Voltage (V)

20
30
Output Voltage (Vp-p)

10

0
20
–10
–20
10 –30
VREF = 0V
–40
RL = 2kΩ
0 –50
100 1k 10k 100k 1M 10M –20 –15 –10 –5 0 5 10 15 20
Frequency (Hz) Output Voltage (V)

5 INA134/2134
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±18V, unless otherwise noted.

QUIESCENT CURRENT vs TEMPERATURE SLEW RATE vs TEMPERATURE

4 16

–SR
14
Quiescent Current (mA)

3
+SR

Slew Rate (V/µs)

2 12

1 10

0 8
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

SHORT-CIRCUIT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs SUPPLY VOLTAGE

80 3

60
Short-Circuit Current (mA)

40
Quiescent Current (mA)

+ISC
2
20

–20
–ISC 1
–40

–60

–80 0
–75 –50 –25 0 25 50 75 100 125 ±4 ±6 ±8 ±10 ±12 ±14 ±16 ±18
Temperature (°C) Supply Voltage (V)

OFFSET VOLTAGE OFFSET VOLTAGE DRIFT

PRODUCTION DISTRIBUTION PRODUCTION DISTRIBUTION
25 25
Typical Production
Distribution of Typical Production Distribution
Packaged Units. of Packaged Units.
20 20
Percent of Amplifiers (%)

Percent of Amplifiers (%)

15 15

10 10

5 5

0 0
–1000
–900
–800
–700
–600
–500
–400
–300
–200
–100
0
100
200
300
400
500
600
700
800
900
1000

0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5
10
10.5
11
11.5
12

Offset Voltage (µV) Offset Voltage Drift (µV/°C)

INA134/2134 6
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±18V, unless otherwise noted.

SMALL-SIGNAL OVERSHOOT
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT vs LOAD CAPACITANCE
17 70
16 –55°C
60
15
Output Voltage Swing (V)

25°C
14 50
125°C
13

Overshoot (%)
85°C 40
12
–12 30
85°C
–13 125°C
–14 20

–15 RL = 2kΩ
25°C 10
–55°C 100mV Step
–16
–17 0
0 ±20 ±40 ±60 ±80 ±100 0 400 800 1200 1600 2000
Output Current (mA) Load Capacitance (pF)

LARGE-SIGNAL STEP RESPONSE

CL = 500pF
SMALL-SIGNAL STEP RESPONSE

CL = 100pF
50mV/div

5V/div

CL = 500pF

1µs/div 1µs/div

7 INA134/2134
APPLICATIONS INFORMATION
V– V+
Figure 1 shows the basic connections required for operation
of the INA134. Decoupling capacitors are strongly recom- 1µF 1µF

mended in applications with noisy or high impedance power

supplies. The capacitors should be placed close to the device 4 7
INA134
pins as shown in Figure 1. All circuitry is completely
R1 R2
independent in the dual version assuring lowest crosstalk 25kΩ 25kΩ
–In
and normal behavior when one amplifier is overdriven or 2 5
V2
short-circuited.
As shown in Figure 1, the differential input signal is con-
6
nected to pins 2 and 3. The source impedances connected to
the inputs must be nearly equal to assure good common- VOUT = V3 – V2
mode rejection. A 10Ω mismatch in source impedance will R3 R4
25kΩ 25kΩ
degrade the common-mode rejection of a typical device to +In
3 1
V3
approximately 74dB. If the source has a known impedance
mismatch, an additional resistor in series with the opposite
input can be used to preserve good common-mode rejection.
Do not interchange pins 1 and 3 or pins 2 and 5, even though
nominal resistor values are equal. These resistors are laser FIGURE 1. Precision Difference Amplifier (Basic Power
trimmed for precise resistor ratios to achieve accurate gain Supply and Signal Connections).
and highest CMR. Interchanging these pins would not pro-
vide specified performance.
INA134
AUDIO PERFORMANCE
R1 R2
2 5
The INA134 and INA2134 were designed for enhanced ac V2
performance. Very low distortion, low noise, and wide band-
width provide superior performance in high quality audio
applications. Laser-trimmed matched resistors provide opti- 6
VO
mum common-mode rejection (typically 90dB), especially
when compared to circuits implemented with an op amp and 10Ω R3
discrete precision resistors. In addition, high slew rate 3
V3
(14V/µs) and fast settling time (3µs to 0.01%) ensure good
dynamic performance. R4
The INA134 and INA2134 have excellent distortion charac- +15V
teristics. THD+Noise is below 0.002% throughout the audio
1
frequency range. Up to approximately 10kHz distortion is VO = V3 – V2 499kΩ
Offset Adjustment 100kΩ
below the measurement limit of commonly used test equip- Range = ±300µV
ment. Furthermore, distortion remains relatively flat over its 10Ω
wide output voltage swing range (approximately 1.7V from
–15V
either supply).

OFFSET VOLTAGE TRIM FIGURE 2. Offset Adjustment.

The INA134 and INA2134 are laser trimmed for low offset
voltage and drift. Most applications require no external offset
adjustment. Figure 2 shows an optional circuit for trimming
the output offset voltage. The output is referred to the output
reference terminal (pin 1), which is normally grounded. A
voltage applied to the Ref terminal will be summed with the
output signal. This can be used to null offset voltage as
shown in Figure 2. The source impedance of a signal applied
to the Ref terminal should be less than 10Ω to maintain good
common-mode rejection.

INA134/2134 8
 INA134
2 5

INA134
V1
6 1/2
V0 = V1 + V2 –In 2 5
1 OPA2134
V1

R2
V2
3

6
R1
V0
R2
FIGURE 3. Precision Summing Amplifier. 0utput

1/2 3 1
V2 OPA2134

INA134 +In
2 5
–In
VO = (1 + 2R2/R1) (V2 –V1)

6 3 6
BUF634 VO

FIGURE 5. High Input Impedance Instrumentation Amplifier.

3 1
+In

FIGURE 4. Boosting Output Current.

The difference amplifier is a highly versatile building • Precision Summing Instrumentation Amplifier
block that is useful in a wide variety of applications. See • Precision Absolute Value Buffer
the INA105 data sheet for additional applications ideas,
• Precision Voltage-to-Current Converter with Differential
including:
Inputs
• Current Receiver with Compliance to Rails • Differential Input Voltage-to-Current Converter for Low
• Precision Unity-Gain Inverting Amplifier IOUT
• ±10V Precision Voltage Reference • Isolating Current Source
• ±5V Precision Voltage Reference • Differential Output Difference Amplifier
• Precision Unity-Gain Buffer • Isolating Current Source with Buffering Amplifier for
• Precision Average Value Amplifier Greater Accuracy
• Precision G = 2 Amplifier • Window Comparator with Window Span and Window
Center Inputs
• Precision Summing Amplifier
• Precision Voltage-Controlled Current Source with Buff-
• Precision G = 1/2 Amplifier
ered Differential Inputs and Gain
• Precision Bipolar Offsetting
• Digitally Controlled Gain of ±1 Amplifier
• Precision Summing Amplifier with Gain
• Instrumentation Amplifier Guard Drive Generator

9 INA134/2134
 PACKAGE OPTION ADDENDUM

[Link] 10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

INA134PA ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type INA134PA

INA134UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA
134UA
INA134UA/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA
134UA
INA134UA/2K5E4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA
134UA
INA134UAE4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA
134UA
INA2134PA ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type INA2134PA

INA2134UA ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA2134UA

INA2134UA/2K5 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA2134UA

INA2134UA/2K5E4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA2134UA

INA2134UA/2K5G4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA2134UA

INA2134UAE4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 INA2134UA

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

[Link] 10-Dec-2020

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF INA2134 :

• Enhanced Product: INA2134-EP

NOTE: Qualified Version Definitions:

• Enhanced Product - Supports Defense, Aerospace and Medical Applications

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

[Link] 30-Dec-2020

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA134UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
INA2134UA/2K5 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

[Link] 30-Dec-2020

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA134UA/2K5 SOIC D 8 2500 853.0 449.0 35.0
INA2134UA/2K5 SOIC D 14 2500 853.0 449.0 35.0

Pack Materials-Page 2
 PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

[Link]
 EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

[Link]
 EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

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