PD - 94632

AUTOMOTIVE MOSFET
IRF3710Z
HEXFET® Power MOSFET
Features D
O Advanced Process Technology VDSS = 100V
O Ultra Low On-Resistance
O Dynamic dv/dt Rating
O 175°C Operating Temperature RDS(on) = 18mΩ
G
O Fast Switching
O Repetitive Avalanche Allowed up to Tjmax ID = 59A
S

Description
Specifically designed for Automotive applications, this HEXFET® Power
MOSFET utilizes the latest processing techniques to achieve extremely
low on-resistance per silicon area. Additional features of this design are
a 175°C junction operating temperature, fast switching speed and
improved repetitive avalanche rating . These features combine to make
this design an extremely efficient and reliable device for use in Automo-
tive applications and a wide variety of other applications.
TO-220AB

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 59 A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9) 42
IDM Pulsed Drain Current c 240
PD @TC = 25°C Maximum Power Dissipation 160 W
Linear Derating Factor 1.1 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited) d 170 mJ
EAS (tested) Single Pulse Avalanche Energy Tested Value i 200
IAR Avalanche Current c See Fig.12a,12b,15,16 A
EAR Repetitive Avalanche Energy h mJ
TJ Operating Junction and -55 to + 175 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.92 °C/W
RθCS Case-to-Sink, Flat, Greased Surface 0.50 –––
RθJA Junction-to-Ambient ––– 62
HEXFET(R) is a registered trademark of International Rectifier.
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03/11/03
IRF3710Z
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.10 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 14 18 mΩ VGS = 10V, ID = 35A f
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 35 ––– ––– S VDS = 50V, ID = 35A
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 100V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 82 120 nC ID = 35A
Qgs Gate-to-Source Charge ––– 19 28 VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– 27 40 VGS = 10V f
td(on) Turn-On Delay Time ––– 17 ––– ns VDD = 50V
tr Rise Time ––– 77 ––– ID = 35A
td(off) Turn-Off Delay Time ––– 41 ––– RG = 6.8Ω
tf Fall Time ––– 56 ––– VGS = 10V f
LD Internal Drain Inductance ––– 4.5 ––– nH Between lead, D

6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package G

and center of die contact S

Ciss Input Capacitance ––– 2900 ––– pF VGS = 0V

Coss Output Capacitance ––– 290 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 150 ––– ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 1130 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 170 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 280 ––– VGS = 0V, VDS = 0V to 80V

Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 59 MOSFET symbol D

(Body Diode) A showing the

ISM Pulsed Source Current ––– ––– 240 integral reverse G

(Body Diode) c p-n junction diode.

f
S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 35A, VGS = 0V

f
trr Reverse Recovery Time ––– 50 75 ns TJ = 25°C, IF = 35A, VDD = 25V
Qrr Reverse Recovery Charge ––– 100 160 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11). … Coss eff. is a fixed capacitance that gives the same charging time
‚ Limited by TJmax, starting TJ = 25°C, L = 0.27mH, as Coss while VDS is rising from 0 to 80% VDSS .
RG = 25Ω, IAS = 35A, VGS =10V. Part not † Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
recommended for use above this value. avalanche performance.
ƒ ISD ≤ 35A, di/dt ≤ 380A/µs, VDD ≤ V(BR)DSS, ‡ This value determined from sample failure population. 100%
TJ ≤ 175°C. tested to this value in production.
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 IRF3710Z

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

100 8.0V 8.0V

7.0V 7.0V
6.0V 6.0V
5.5V 100 5.5V
5.0V 5.0V
10
BOTTOM 4.5V BOTTOM 4.5V

1
4.5V 10 4.5V

0.1
20µs PULSE WIDTH 20µs PULSE WIDTH
Tj = 25°C Tj = 175°C
0.01 1
0.1 1 10 100 0.1 1 10 100

V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 120
GFS , Forward Transconductance (S)
ID, Drain-to-Source Current (Α)

100 TJ = 25°C
100 T J = 175°C

80
T J = 175°C
10 60

40
T J = 25°C
1

20
VDS = 25V VDS = 15V
20µs PULSE WIDTH 20µs PULSE WIDTH
0
0
2 4 6 8 10
0 10 20 30 40 50 60 70
VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

vs. Drain Current
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 IRF3710Z

100000 12.0
VGS = 0V, f = 1 MHZ
C =C + C , C SHORTED
ID= 35A
iss gs gd ds V DS= 80V
C rss = Cgd 10.0

V GS, Gate-to-Source Voltage (V)

C oss = Cds + C gd
V DS= 50V
10000
V DS= 20V
C, Capacitance(pF)

8.0
Ciss

1000 6.0
Coss

Crss 4.0
100

2.0

10
0.0
1 10 100
0 20 40 60 80 100
V DS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.00 1000
OPERATION IN THIS AREA
LIMITED BY RDS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)

100.00 100
TJ = 175°C

100µsec
10.00 10

TJ = 25°C
1 1msec
1.00
Tc = 25°C
Tj = 175°C 10msec
V GS = 0V Single Pulse
0.10 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1 10 100 1000

V SD, Source-to-Drain Voltage (V) V DS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRF3710Z

60 3.0
ID = 59A

RDS(on) , Drain-to-Source On Resistance

50 2.5 V GS = 10V
ID, Drain Current (A)

40 2.0

(Normalized)
30 1.5

20 1.0

10 0.5

0 0.0
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

TC , Case Temperature (°C) TJ , Junction Temperature (°C)

Fig 9. Maximum Drain Current vs. Fig 10. Normalized On-Resistance

Case Temperature vs. Temperature

10
Thermal Response ( Z thJC )

1
D = 0.50

0.20
0.1 0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )

0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF3710Z

300
15V

EAS , Single Pulse Avalanche Energy (mJ)

ID

250 TOP 15A

L DRIVER 25A
VDS
BOTTOM 35A
200
RG D.U.T +
V
- DD
IAS A 150
20V
VGS
tp 0.01Ω

100
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
50
tp

0
25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

I AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
QG

10 V
QGS QGD 5.0
V GS(th) Gate threshold Voltage (V)

VG
4.0

Charge
Fig 13a. Basic Gate Charge Waveform 3.0 ID = 250µA
Current Regulator
Same Type as D.U.T.

50KΩ 2.0
12V .2µF
.3µF

+
V
D.U.T. - DS
1.0
VGS -75 -50 -25 0 25 50 75 100 125 150 175 200

3mA TJ , Temperature ( °C )

IG ID
Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage vs. Temperature
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 IRF3710Z

1000
Duty Cycle = Single Pulse

100
Allowed avalanche Current vs
Avalanche Current (A)

avalanche pulsewidth, tav

0.01
assuming ∆ Tj = 25°C due to
avalanche losses
10
0.05
0.10

0.1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current [Link]

200 Notes on Repetitive Avalanche Curves , Figures 15, 16:

TOP Single Pulse (For further info, see AN-1005 at [Link])
BOTTOM 10% Duty Cycle 1. Avalanche failures assumption:
ID = 35A Purely a thermal phenomenon and failure occurs at a
EAR , Avalanche Energy (mJ)

150 temperature far in excess of T jmax. This is validated for

every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
100
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
50 voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
Starting TJ , Junction Temperature (°C)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Fig 16. Maximum Avalanche Energy Iav = 2DT/ [1.3·BV·Zth]
vs. Temperature EAS (AR) = PD (ave)·tav
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IRF3710Z

Driver Gate Drive

D.U.T Period D=
P.W.
Period
+ P.W.

ƒ
*
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
‚ Reverse
Recovery Body Diode Forward
- „ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

RD
V DS

VGS
D.U.T.
RG
+
-VDD

10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

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 IRF3710Z
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415) 3.78 (.149) -B-
2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045) LEAD ASSIGNMENTS
MIN 1 - GATE
1 2 3 2 - DRAIN
3 - SOURCE
4 - DRAIN
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)

3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

EXAMPLE: T HIS IS AN IRF1010 PART NUMBE R
LOT CODE 1789 INT ERNAT IONAL
AS S EMBLED ON WW 19, 1997 RECT IFIER
LOGO
IN T HE AS S E MBLY LINE "C"
DAT E CODE
YE AR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

TO-220AB package is not recommended for Surface Mount Application.

Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at [Link] for sales contact information. 03/03
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