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Embedded Systems Model Exam Paper

This document contains a model exam question paper for an Embedded Systems subject with 5 parts: Part B contains 10 short answer questions worth 2 marks each requiring students to recall, understand, apply and evaluate concepts. Part C contains 5 long answer questions worth 12 marks each requiring students to understand, apply, evaluate and create related to embedded systems development lifecycles, processor architecture, memory components, bus interfacing, real-time operating systems and data sharing. The document also includes a Bloom's Taxonomy assessment table categorizing the cognitive difficulty of the questions.

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293 views3 pages

Embedded Systems Model Exam Paper

This document contains a model exam question paper for an Embedded Systems subject with 5 parts: Part B contains 10 short answer questions worth 2 marks each requiring students to recall, understand, apply and evaluate concepts. Part C contains 5 long answer questions worth 12 marks each requiring students to understand, apply, evaluate and create related to embedded systems development lifecycles, processor architecture, memory components, bus interfacing, real-time operating systems and data sharing. The document also includes a Bloom's Taxonomy assessment table categorizing the cognitive difficulty of the questions.

Uploaded by

veerakumars
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd

Ac.

BANNARI AMMAN INSTITUTE OF TECHNOLOGY


SATHYAMANGALAM - 638401
DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING
QUESTION PAPER FOR MODEL EXAM

Semester & Branch: S6 ECE A &B Date : 26/10/2013


Subject Name: Embedded System Max Marks: 80
Subject Code: 11L504 Max Time: 3 Hrs

Answer ALL the Questions


Part – B (10 x 2 = 20 Marks)

21. Compare the embedded systems and RTOS with examples.(R)


22. What is the metrics of simulators and emulators in Embedded systems? (R)
23. Justify with one difference on how interrupts are handled in processors based on
system set and reset timer.(E)
24. Differentiate RISC and CISC processor.(R)
25. What is need for Bus Communication with handshaking period in an Ethernet?
(Ap)
26. Explain with applications examples serial and parallel bus interfacing.(E)
27. Draw the Ethernet bus architecture.(U)
28. Define CAN bus protocols.(R)
29. Write the steps followed in carrying out interrupt using ISR. (U)
30. Give any five real time examples of ROTS systems. (C)

Part – C (5 x 12 = 60 Marks)
31.a What are the various phases of an Embedded Product development 12
life cycle? (E)
Or
31.b Discuss in detail a case study in the design of an embedded chocolate 12
vending machine (or) Embedded automatic washing machine.(E)
32.a Draw the VLIW processors and explain its function (U) 12
Or
32.b What is need for interrupts and Interrupt Service Routines (ISR) in 12
common processors? (U)
33.a Discuss in detail the various memory components of embedded 12
system. (R)
Or
33.b Explain the Wired Ethernet architecture and its accessing method 12
with help of bus topology. (R)

34.a Write a program using I2C bus to control an operation of a particular 12


movement in an automobile. (E)
Or
34.b Explain the Hardware- Software tradeoffs in hardware –software 12
portioning (E)

35.a Discuss about the ROTS with real time examples. (Ap) 12
Or
35.b How does sharing data among RTOS tasks carried out? Discuss the 12
problems associated with shared data? (Ap)

Prepared by Verified by Approved by

[Link] Dr. [Link] Babu [Link]


Prof – ECE, Prof & Head - ECE

Form No: Ex 10a Rev No: 02 Effective Date: 27.08.2010

Bloom’s Taxonomy: Level - based


Assessment Table
Bloom’s Taxonomy Marks
allotted
1 Remember (R) 20
2 Understand (U) 16
3 Apply (Ap) 14
4 Analyze (An) -
5 Evaluate ( E) 28
6 Create (C) 2
Total marks 100* 80

Form No: Ex 10a Rev No: 02 Effective Date: 27.08.2010

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