FLOWCHART OF DYNAMIC RAM
START
RAS’=0, CAS’=1, CS=1
WE’=0, input data WRITE
WE’=0(write) WE’=1(read) Address bits
placed on the data ENABLE
Row is already (WE’)
line, CAS’=0, RAS’=0
CS=1 selected writing data
Row address buffer
into column. (Page mode)
Address bits Row Decoder
Column address buffer Select a
particular row
Column Decoder
Entire row of cell
value latched into
WE’=1, so that no longer
sense amplifier
data is accepted.
Select a particular column, OE’=0 CAS’=0, RAS’=0
and value is loaded into that column.
Column address bits into
column address buffer then
into column decoder.
Selects a particular column from
where data is to be read and then
gives it to data buffer.
RAS’=1,CAS’=1
WE’=1,read
and write OE’=0, data is made available
completed to I/O lines until CAS’=1
END