Analog Multiplier

Kamal M. Captain, EcED, SVNIT, Surat

May 7, 2020

1 Introduction
• Nonlinear operations on continuous-valued analog signals are often re-
quired in instrumentation, communication and control system design.
• The operations include
1. Modulation
2. Demodulation
3. Frequency translation
4. Multiplication
• In analog-signal processing the need often arises for a circuit that takes
two analog inputs and produces an output proportional to their product.
Such circuits are termed as analog multipliers.

• It is one of the fundamental building blocks in analog circuit design.

• Types of multipliers
1. One-Quadrant Multiplier
2. Two-Quadrant Multiplier
3. Four-Quadrant Multiplier
• In the following sections, we examine several analog multipliers that de-
pend on the exponential transfer function of bipolar transistors.

Figure 1: Block Diagram of a Multiplier

1
 Figure 2: Simple Emitter Coupled Circuit

2 Simple Multiplier Using An Emitter Coupled

Transistor Pair
The basic equation for the emitter coupled circuit (ECC) is

Vi1 − VBE1 = Vi2 − VBE2 , (1)

We assume that the collector currents are selected such that the transistors do
not operate in saturation. In active region, the collector current of the NPN
transistor is given by
VBE
IC = Io e VT
, (2)
where, Io is the reverse saturation current and VT is the thermal voltage. Using
Eq. (2), we can write  
IC
VBE = VT ln . (3)
Io
Therefore, the differential input voltage (Vid ) can be obtained as
   
IC1 IC2
Vid = Vi1 − Vi2 = VT ln − VT ln . (4)
I01 I02
For identical transistor, we have I01 = I02 . Using this, we have
 
IC1
Vid = VT ln . (5)
IC2

2
 Figure 3

Therefore,
IC1 Vid
= e VT . (6)
IC2
Assuming high β,
IC1 + IC2 = IEE (7)
Using Eq. (6) and (7), we have
Vid
IC1 = (IEE − IC1 ) e VT
 Vid
 Vid
=⇒ IC1 1 + e VT = IEE × e VT

IEE
=⇒ IC1 = V (8)
− Vid
1+e T

Similarly, we can derive IC2 as

IEE
IC2 = Vid (9)
1 + e VT
For emitter coupled pairs, the relation of collector currents of two transistors
with the differential input voltage is given by Eq. (8) and (9).
Using Eq. (8) and (9), the output current ∆IC = IC1 − IC2 can be obtained
as follows
Iout = ∆IC = IC1 − IC2
!
1 1
= IEE V − Vid
− Vid
1+e T 1 + e VT
 
Vid
= IEE × tanh . (10)
2VT

3
 Figure 4: Plot of output current

The tanh (x) function can be well approximated with x for very small values
of x, i.e., tanh (x) = x, f or x << 1. Using this property of tanh function, for
very small values of differential input voltage Vid , we can approximate output
current as
 
Vid
Iout ≈ IEE
2VT
≈ K × Vid × IEE . (11)
where, K is the constant of proportionality given as
1
K= V −1 . (12)
2VT
Therefore, Eq. (11) suggests that the circuit can operate as a multiplier with
two inputs Vid and IEE .
The current IEE is actually the bias current for for the emitter coupled pair.
With the use of additional circuitry, we can make IEE proportional to a second
input signal. Such modified configuration is shown in figure 5. For this circuit,
IEE is

IEE ≈ K0 Vi2 − VBE(on) (13)
Using this, the differential output current of the emitter coupled pair can be
calculated to give


K0 Vid Vi2 − VBE(on)
Iout = ∆IC ≈ (14)
2VT
Disadvantages of the ECC as the multiplier
• The circuits operates as 2- quadrant multiplier ( Vid may be positive or
negative but IEE must be positive)

4
 Figure 5: Modified Emitter Coupled Multiplier

• For figure 2, the two inputs of the multiplier are not the same type ( one
of the inputs is voltage Vid and the another is current)
• The circuits operates as 2- quadrant multiplier under the restriction: |Vid | <<
VT .
• The circuit in figure 5 works under the assumption that Vid is small and
that Vi2 is greater than VBE(on) .

3 Gilbert Multiplier Set

• The Gilbert multiplier is a modification of the emitter-coupled cell, which
allows four quadrant multiplication.

• It is also known as four quadrant multiplier cell.

• It is used to overcome the disadvantages of the ECC.
• It is the basis for most integrated circuit balanced multiplier systems.

This circuit consists of three different stages with each stage having pair of
transistors. Each stage is an emitter coupled transistor pair with crossed coupled
stage one and stage two in series with stage three. The collector currents for

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 Figure 6: Gilbert Multiplier

transistors in stage 1 (Q1 and Q2) and stage 2 (Q3 and Q4) can be given as
IC5
IC1 = V (1)
− VX
1+e T

IC5
IC2 = VX (2)
1 + e VT
IC6
IC3 = VX (3)
1 + e VT
IC6
IC4 = VX (4)
−
1 + e VT
Next we derive the collector current for transistors in stage 3 (Q5 and Q6),
IEE
IC5 = V (5)
− VY
1+e T

IEE
IC6 = VY (6)
1 + e VT
Substituting Eq. (5) and (6) into Eq. (1)-(4) gives
IEE
IC1 =  V
 V
 (7)
− VX − VY
1+e T 1+e T

6
 I
IC2 =  VX
EE
 V
 (8)
− Y
1+e VT
1 + e VT

IEE
IC3 =  VX
 VY
 (9)
1 + e VT 1 + e VT

IEE
IC4 =  V
 VY
 (10)
− VX
1+e T 1 + e VT

The differential output current of the Gilbert cell is defined as

Iout = IC13 − IC24 = (IC1 + IC3 ) − (IC2 + IC4 ) (11)

The output current can be written as

Iout = (IC1 − IC2 ) + (IC3 − IC4 ) (12)

Substitute Eq. (7)-(10), in Eq. (12)

 
IEE I
EE
 
Iout = 
 V
 VY
− VX
 VY

− VX − −

1+e T 1 + e VT 1 + e VT 1 + e VT
 
 IEE IEE 
+
 VX
 VY
− VX
 VY
 (13)
−

1+e VT
1 + e VT 1 + e VT 1 + e VT

By simplifying Eq. (13), we get

   
VX VY
Iout = IEE tanh tanh , (14)
2VT 2VT

For |VX | & |VY | << VT , we can approximate Eq. (14) as

  
VX VY
Iout ≈ IEE , (15)
2VT 2VT

Finally, we can write Iout as

Iout ≈ K (VX × VY ) . (16)

Therefore, Gilbert cell operates as 4-quadrant multiplier because VX and VY

IEE
can take positive and negative values, where K = (2V )2
mA/V 2 .
T

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 Figure 7: Gilbert Multiplier with Voltage Output

3.1 Gilbert Cell as a 4-quadrant Multiplier with Output

Voltage
The output of the Gilbert Multiplier is a current, and if it is required to have
an output voltage, a differential current to a voltage converter is needed. This
can be realized by using the two resistors connected to Vcc as shown in figure 7.
Analysis goes as follows:

Vout = (VCC − IC24 RC ) − (VCC − IC13 RC )

= (IC13 − IC24 ) RC . (17)

Using Eq. (14) in Eq. (17), we have

   
VX VY
Vout = IEE RC tanh tanh (18)
2VT 2VT

For |VX | & |VY | << VT , we can approximate Vout as

Vout ≈ K (VX × VY ) , (19)

2
where K = IEE RC / (2VT ) [V −1 ].

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 Figure 8: Basic Idea of Complete Gilbert Multiplier

3.2 Complete Gilbert multiplier without any restrictions

on the input signal
   
VX1 VY 1
Vout = IEE RC tanh tanh
2VT 2VT
2VT tanh−1 (KX Vx ) 2VT tanh−1 (KY VY )
   
= IEE RC tanh tanh
2VT 2VT
= K × (VX × VY ) (20)

where, K = IEE RC KX KY [V −1 ].

4 IC Multiplier (AD633)
• The AD633 is a functionally complete, four-quadrant, analog multiplier.

• It includes high impedance, differential X and Y inputs and a high impedance

summing input (Z).
• The output voltage for the IC is given by

(X1 − X2 ) (Y1 − Y2 )
W = +Z (1)
10

• The AD633 is a complete four-quadrant multiplier offered in low cost 8-

lead plastic packages.
• It is cost effective and easy to apply.
• No external components or expensive user calibration are required to apply
the AD633.

• Monolithic construction and laser calibration make the device stable and
reliable.

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 Figure 9: AD633: 8-Lead Plastic DIP (N) Package

Figure 10: Basic Multiplier Connections

• High (10 M) input resistances make signal source loading negligible.

• Power supply voltages can range from 8 V to 18 V. The internal scal-
ing voltage is generated by a stable Zener diode; multiplier accuracy is
essentially supply insensitive.

4.1 Multiplier Connections

• Figure 10 shows basic connections for multiplication.
• The X and Y inputs will normally have their negative nodes grounded,
but they are fully differential.

• In many applications the grounded inputs may be reversed or both may

be driven.

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 Figure 11: Connections for Squaring

4.2 Squaring and Frequency Doubling

• Figure 11 shows connections for squaring operation.

• The squaring of an input signal (E) is achieved simply by connecting the

2
X and Y inputs in parallel to produce an output of E10 V.
• The input may have either polarity but the output is always positive.
• However, the output polarity may be reversed by interchanging the X or
Y inputs.

• The Z input may be used to add a further signal to the output.

Frequency Doubler
• When the input is sine ware (E sin (ωt)), the squarer circuit behaves as a
frequency doubler.
2
(E sin (ωt)) E2
= (1 − cos (2ωt)) (2)
10 V 20 V

• Eq. (2) has a strong DC term at the output which will vary strongly with
the amplitude of the input E.
• This can be avoided by connections shown in figure 12 where an RC net-
work is used to generate two signals whose product has no DC term.
• At ω = RC 1
, the input X input leads the input signal by 45◦ (and is
√
attenuated by √2), and the Y input lags the X input by 45◦ (and is also
attenuated by 2).

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 Figure 12: ”Bounceless” Frequency Doubler

• The output W is given by

1 E E
W = √ sin (ωo t + 45◦ ) √ sin (ωo t − 45◦ )
10 V 2 2
E2
= sin (2ωo t) (3)
40
which has no DC component.

• More details can be found from the datasheet of AD633.

• Other circuits for operations like square root, division, modulation, filter-
ing, oscillator are given in the datasheet.

5 Applications of Multipliers
• Nonlinear analog signal processing
• Mixing

• Phase difference detection

• Modulation and demodulation
• Frequency translation

6 References
1. Lecture notes on ” Analog Multipliers by Dr. Mohamed Abd El Ghany,
German University in Cairo.

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 Figure 13: Amplitude Modulation Illustration

2. NPETL lecture on ”Analog Multipliers” by Prof. [Link] Rao ,

Department of Electrical Engineering, [Link].
3. AD633 Datasheet.

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