Questions from Unit IV and V
Short Questions:
1. List out at least four applications of an analog multiplier. Draw the schematic symbol of
analog multiplier.
2. Draw the schematic symbol of analog multiplier. Mention at least four applications of
an analog multiplier.
3. Determine the output voltage Vout of the squaring circuit shown in Figure below if
K=0. 1 and the input signal Vin is 2 sin2 π 60t .
4. Mention two types of analog multiplier ICs?
5. Define VCO.
6. List the features of 566 VCO.
7. What do you mean by PLL?
8. Define lock range in a PLL.
9. Define capture range in a PLL.
10. List the applications of 565 PLL.
11. What are the necessary blocks to make PLL be in locked state? Draw the block
diagram.
12. How is VCO frequency related with the lock range and capture range of PLL?
13. List the broad classification of ADCs.
14. List out the direct type ADCs.
15. List out some integrating type converters.
16. What is integrating type converter?
17. Draw the schematic diagram of the R-2R ladder type DAC.
18. Write six specifications of A/D and D/A converters.
19. The basic step of a 9-bit DAC is 10.3 V. If 000000000 represents 0V, what output is
produced if the input is 101101111?
20. A certain 8-bit DAC has a full-scale output of 5 mA and a full-scale error of 0.25% of
full-scale. Determine the range of expected analog output for a digital input of
10000010.
Long Questions:
1. Explain with suitable diagram how a multiplier may also be used for division or square
root functions.
2. Draw and describe following op-amp based operation using log and antilog amplifier:
Vo = V1×V2
3. State the needs of peak to peak detector and draw it’s circuit diagram.
4. Draw block diagram and describe operation of frequency multiplier using PLL.
5. Calculate the output frequency of the VCO showing the IC566 diagram. Also find the
voltage to frequency conversion factor.
6. Describe the operation of phase detector and role of VCO in PLL.
7. Explain working of PLL using appropriate block diagram and explain any one
application of the same.
8. Briefly explain the applications of PLL. Draw the monolithic PLL IC565 block
diagram.
9. Describe with the help of block diagram the operation of FM demodulator using PLL.
10. Write short notes on any two of the followings:
(a) Capture range
(b) Lock in range
(c) Pull in time
11. Explain the R-2R ladder DAC and weighted resistor DAC with circuit diagrams. Find
out the expressions of output voltages in both the cases.
12. Explain the operation of dual slope ADC showing the proper circuit. A dual slope ADC
uses a 16-bit counter and a 4 MHz clock rate. The maximum input voltage is +10 V.
The maximum integrator output voltage should be -8v when the counter has cycled
through 2n counts. The capacitor used in the integrator is 0.1µF. Find the value of the
resistor R of the integrator.
13. Explain the weighted resistor type DAC? How the limitation of this DAC can be
eliminated by another type?
14. Briefly describe the process of digital-to-analogue conversion in a binary ladder
network. How does it differ from the simple resistive network used for the same
purpose? Write an expression for the output analogue voltage for an n-bit binary ladder
network.
15. Briefly describe the resolution, accuracy, conversion time and monotonocity
specifications of a D/A converter.
16. Briefly describe the following with reference to D/A converters:
(a) a multiplying-type D/A converter;
(b) a companding-type D/A converter;
(c) the current steering mode of operation;
(d) the voltage switching mode of operation.
17. With reference to A/D converters, differentiate between:
(a) resolution and accuracy;
(b) nonlinearity (NL) and differential nonlinearity (DNL).
18. Briefly describe the principle of operation of a simultaneous or flash-type A/D
converter. What are the merits and demerits of this type of converter? How does the
architecture of a flash converter differ from that of a half-flash converter?
19. Describe with the help of a schematic diagram the operation of a tracking-type A/D
converter. Explain how it overcomes the inherent disadvantage of a longer conversion
time of the conventional counter-type A/D converter.
20. Describe with the help of a schematic diagram the principle of operation of a successive
approximation type A/D converter. Explain the sequence of operation of conversion of
an analogue signal to its digital equivalent when the expected digital output is 1010.
21. Explain the following:
(a) the use of a D/A converter as a programmable integrator;
(b) why a tracking type A/D converter is particularly suitable for fast-changing
analogue signals;
(c) why a dual-slope integrating-type A/D converter has a higher accuracy than a
single-slope integrating-type A/D converter;
(d) the use of a D/A converter as a digitally controlled voltage attenuator.
Problems form Unit V:
1. Determine the percentage resolution of (a) an eight-bit and (b) a 12-bit D/A converter.
Ans: (a) 0.39 %; (b) 0.024%
2. An eight-bit D/A converter produces an analogue output of 12.5 mV for a digital input
of 00000010. Determine the analogue output for a digital input of 00000100.
Ans: 25 mV
3. A 12-bit D/A converter has a resolution of 2.44 mV. Determine its analogue output for
a digital input of 111111111111.
Ans: 10 V
4. How many bits should a current-output D/A converter have for its full-scale output to
be 20 mA and its resolution to be better than 25 mA?
Ans: 10 bits
5. Compare (a) the step size and (b) the percentage resolution of a D/A converter having
an eight-bit binary input with those of a D/A converter having an eight-bit BCD input.
Both have a full-scale output of 10 V.
Ans: Binary input: (a) 39.2 mV, (b) 0.39 %; BCD input: (a) 101 mV, (b) 1%
6. Compare the average conversion time of an eight-bit counter-type A/D converter with
the conversion time of a 12-bit successive approximation type A/D converter. Assume a
clock frequency of 10 MHz.
Ans: Counter-type A/D converter 12.8 μs, successive approximation type 1.2 μs
7. A certain 12-bit successive approximation type A/D converter has a full-scale analogue
input of 10 V. It operates at a clock frequency of 1MHz. Determine the conversion time
for an analogue input of (a) 1.25 V, (b) 2.50 V, (c) 3.75 V, (d) 7.5 V and (e) 10 V.
Ans: (a) 12 μs; (b) 12 μs; (c) 12 μs; (d) 12 μs; (e) 12 μs