PART-A

[Link] is Microprocessor ?
It is a program controlled semiconductor device (IC}, which fetches, decode and
executes instructions.
2. What are the basic units of a microprocessor ?
The basic units or blocks of a microprocessor are ALU, an array of registers an
d control unit.
[Link] is Software and Hardware?
The Software is a set of instructions or commands needed for performing a specif
ic task by a programmable device or a computing machine. The Hardware refers to
the components or devices used to form computing machine in which the software c
an be run and tested. Without software the Hardware is an idle machine.
[Link] is assembly language?
The language in which the mnemonics (short -hand form of instructions) are used
to write a program is called assembly language. The manufacturers of microproces
sor give the mnemonics.
5. What are machine language and assembly language programs?
The software developed using 1's and 0's
are called machine language, programs. The software developed using mnemonics ar
e called assembly language programs.
6. What is the drawback in machine language and assembly language, programs?
The machine language and assembly language programs are machine dependent. The
programs developed using these languages for a particular machine cannot be dire
ctly run on another machine .
[Link] bit, byte and word?
A digit of the binary number or code is called bit. Also, the bit is the fundame
ntal storage unit of computer memory. The 8-bit (8-digit) binary number or code
is called byte and 16-bit binary number or code is called word. (Some microproce
ssor manufactures refer the basic data size operated by the processor as word).
8. What is a bus?
Bus is a group of conducting lines that carries data, address and control signal
s.
[Link] data bus is bi-directional?
The microprocessor has to fetch (read) the data from memory or input device for
processing and after processing, it has to store (write) the data to memory or o
utput device. Hence the data bus is bi-directional.
[Link] address bus is unidirectional?
The address is an identification number used by the microprocessor to identify o
r access a memory location or I / O device. It is an output signal from the proc
essor. Hence the address bus is unidirectional.
11. What is the function of microprocessor in a system?
The microprocessor is the master in the system, which controls all the activity
of the system. It issues address and control signals and fetches the instruction
and data from memory. Then it executes the instruction to take appropriate acti
on.
12. What are the modes in which 8086 can operate?
The 8086 can operate in two modes and they are minimum (or uniprocessor) mode an
d maximum ( or multiprocessor) mode.
13. What is the data and address size in 8086?
The 8086 can operate on either 8-bit or 16-bit data. The 8086 uses 20 bit addres
s to access memory and 16-bit address to access 1/0 devices.
14. Explain the function of M/IO in 8086?
The signal M/IO is used to differentiate memory address and 1/0 address When the
processor is accessing memory locations MI10 is asserted high and when it is ac
cessing 1/0 mapped devices it is asserted low.
15. Write the flags of 8086?
The 8086 has nine flags and they are
[Link] Flag (CF) 6. Overflow Flag (OF)
[Link] Flag (PF) 7. Trace Flag (TF)
 [Link] carry Flag (AF) 8. Interrupt Flag (IF)
[Link] Flag (ZF) 9. Direction Flag (DF)
[Link] Flag (SF)
16. What are the interrupts of 8086?
The interrupts of 8085 are INTR and NMI. The INTR is general maskable interrupt
and NMI is non-maskable interrupt.
17. How clock signal is generated in 8086? What is the maximum internal clock fr
equency of 8086?
The 8086 does not have on-chip clock generation circuit. Hence the clock generat
or chip, 8284 is connected to the CLK pin of8086. The clock signal supplied by 8
284 is divided by three for internal use. The maximum internal clock frequency o
f8086 is 5MHz.
18. Write the special functions carried by the general purpose registers of 8086
?
The special functions carried by the registers of 8086 are the following. Regist
er Special function
[Link] 16-bit Accumulator
[Link] 8-bit Accumulator
[Link] Base Register
[Link] Count Register
[Link] .Data Register
19. What is pipelined architecture?
In pipelined architecture the processor will have number of functional units and
the execution time of functional units are overlapped. Each functional unit wor
ks independently most of the time.
20. What are the functional units available in 8086 architecture?
The bus interface unit and execution unit are the two functional units available
in 8086 architecture.
21. List the segment registers of 8086. ?
The segment registers of 8086 are Code segment, Data segment, Stack segment and
Extra segment registers.
[Link] machine cycle.?
Machine cycle is defined as the time required to complete one operation of acc
essing memory, I/O, or acknowledging an external request. This cycle may consist
of three to six T-states.
23. Define T-State?.
T-State is defined as one subdivision of the operation performed in one clock
period. These subdivisions are internal states synchronized with the system clo
ck, and each T-State is precisely equal to one clock period.
[Link] the components of microprocessor (single board microcomputer) based syst
em?
The microprocessor based system consist of microprocessor as CPU, semiconductor
memories like EPROM and RAM, input device, output device and interfacing devices
.
25. Why interfacing is needed for 1/0 devices?
Generally I/O devices are slow devices. Therefore the speed of I/O devices does
not match with the speed of microprocessor. And so an interface is provided betw
een system bus and I/O devices.
26. What is the difference between CPU bus and system bus?
The CPU bus has multiplexed lines but the system bus has separate lines for each
signal. (The multiplexed CPU lines are demultiplexed by the CPU interface circu
it to form system bus).
27..What does memory-mapping mean?
The memory mapping is the process of interfacing memories to microprocessor and
allocating addresses to each memory locations.
28..What is interrupt 1/0?
If the 1/0 device initiate the data transfer through interrupt then the 1/0 is c
alled interrupt driven 1/0.
29. Why EPROM is mapped at the beginning of memory space in 8085 system?
In 8085 microprocessor, after a reset, the program counter will have OOOOH addre
ss. If the monitor program is stored from this address then after a reset, it wi
ll be executed automatically. The monitor program is a permanent program and sto
red in EPROM memory. If EPROM memory is mapped at the beginning of memory space,
i.e., at OOOOH, then the monitor program will be executed automatically after a
reset.
30. What is the need for system clock and how it is generated in 8085?
The system clock is necessary for synchronizing various internal operations or d
evices in the microprocessor and to synchronize the microprocessor with other pe
ripherals in the system.
[Link] is DMA?
The direct data transfer between I/O device and memory is called DMA.
32. What is the need for Port?
The I/O devices are generally slow devices and their timing characteristics do n
ot match with processor timings. Hence the I/O devices are connected to system b
us through the ports.
[Link] is a port?
The port is a buffered I/O, which is used to hold the data transmitted from
the microprocessor to I/O device or vice-versa.
[Link] some examples of port devices used in 8085 microprocessor based system?
The various INTEL I/O port devices used in 8085 microprocessor based system are
8212, 8155, 8156, 8255, 8355 and 8755.
35. Write a short note on INTEL 8255?
The INTEL 8255 is a I/O port device consisting of 3 numbers of 8 -bit parallel I
/O ports. The ports can be programmed to function either as a input port or as a
output port in different operating modes. It requires 4 internal addresses and
has one logic LOW chip select pin.
[Link] is the drawback in memory mapped I/0?
When I/O devices are memory mapped, some of the addresses are allotted to I/O de
vices and so the full address space cannot be used for addressing memory (i.e.,
physical memory address space will be reduced). Hence memory mapping is useful o
nly for small systems, where the memory requirement is less.
37. How DMA is initiated?
When the I/O device needs a DMA transfer, it will send a DMA request signal to D
MA controller. The DMA controller in turn sends a HOLD request to the processor.
When the processor receives a HOLD request, it will drive its tri-stated pins t
o high impedance state at the end of current instruction execution and send an a
cknowledge signal to DMA controller. Now the DMA controller will perform DMA tra
nsfer.
38. What is processor cycle (Machine cycle)?
The processor cycle or machine cycle is the basic operation performed by the pro
cessor. To execute an instruction, the processor will run one or more machine cy
cles in a particular order.
39. What is Instruction cycle?
The sequence of operations that a processor has to carry out while executing the
instruction is called Instruction cycle. Each instruction cycle of a processor
indium consists of a number of machine cycles.
40. What is fetch and execute cycle?
In general, the instruction cycle of an instruction can be divided into fetch an
d execute cycles. The fetch cycle is executed to fetch the opcode from memory. T
he execute cycle is executed to decode the instruction and to perform the work i
nstructed by the instruction.
[Link] is Block and Demand transfer mode DMA?
In Block transfer mode, the DMA controller will transfer a block of data and rel
ieve the bus for processor. After sometime another block of data is transferred
by DMA and so on. In Demand transfer mode the DMA controller will complete the e
ntire .data transfer at a stretch and then relieve the bus to processor.
42. What is the need for timing diagram?
The timing diagram provides information regarding the status of various signals,
when a machine cycle is executed. The knowledge of timing diagram is essential
for system designer to select matched peripheral devices like memories, latches,
ports, etc., to form a microprocessor system.
43. How many machine cycles constitute one instruction cycle in 8085?
Each instruction of the 8085 processor consists of one to five machine cycles.
44. Define opcode and operand.
Opcode (Operation code) is the part of an instruction / directive that
identifies a specific operation. Operand is a part of an instruction / directive
that represents a value on which the instruction acts.
45. What is opcode fetch cycle?
The opcode fetch cycle is a machine cycle executed to fetch the opcode of an ins
truction stored in memory. Every instruction starts with opcode fetch machine cy
cle.
46. What operation is performed during first T -state of every machine cycle in
8085 ?
In 8085, during the first T -state of every machine cycle the low byte address i
s latched into an external latch using ALE signal.
47. Why status signals are provided in microprocessor?
The status signals can be used by the system designer to track the internal oper
ations of the processor. Also, it can be used for memory expansion (by providing
separate memory banks for program & data and selecting the bank using status si
gnals).
48. How the 8085 processor differentiates a memory access (read/write) and 1/0 a
ccess (read/write)?
The memory access and 1/0 access is differentiated using 10 I M signal. The 8085
processor asserts 10 I M low for memory read/write operation and 10 I M is asse
rted high for 1/0 read/write operation.
49. When the 8085 processor checks for an interrupt?
In the second T -state of the last machine cycle of every instruction, the 8085
processor checks whether an interrupt request is made or not.
50. What is interrupt acknowledge cycle?
The interrupt acknowledge cycle is a machine cycle executed by 8085 processor to
get the address of the interrupt service routine in-order to service the interr
upt device.
51. How the interrupts are affected by system reset?
Whenever the processor or system is resetted , all the interrupts except TRA
P are disabled. fu order to enable the interrupts, El instruction has to be exec
uted after a reset.
52. What is Software interrupts?
The Software interrupts are program instructions. These instructions are inserte
d at desired locations in a program. While running a program, if software interr
upt instruction is encountered then the processor executes an interrupt service
routine.
53. What is Hardware interrupt?
If an interrupt is initiated in a processor by an appropriate signal at the inte
rrupt pin, then the interrupt is called Hardware interrupt.
54. What is the difference between Hardware and Software interrupt?
The Software interrupt is initiated by the main program, but the Hardware interr
upt is initiated by an external device. In 8085, the Software interrupt cannot b
e disabled or masked but the Hardware interrupt except TRAP can be disabled or m
asked.
55. What is Vectored and Non- Vectored interrupt?
When an interrupt is accepted, if the processor control branches to a
specific address defined by the manufacturer then the interrupt is called vecto
red interrupt. In Non-vectored interrupt there is no specific address for
storing the interrupt service routine. Hence the interrupted device should give
the address of the interrupt service routine.
56. List the Software and Hardware interrupts of 8085?
Software interrupts: RST 0, RSTl, RST 2, RST 3, RST 4, RST 5, RST 6 and RST 7. H
ardware interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR.
57. What is TRAP?
The TRAP is non-maskable interrupt of8085. It is not disabled by processor reset
or after reorganization of interrupt.
58. Whether HOLD has higher priority than TRAP or not?
The interrupts including mAP are recognized only if the HOLD is not valid, hence
TRAP has lower priority than HOLD.
59. What is masking and why it is required?
Masking is preventing the interrupt from disturbing the current program executio
n. When the processor is performing an important job (process) and if the proces
s should not be interrupted then all the interrupts should be masked or disabled
. In processor with multiple 'interrupts, the lower priority interrupt can be ma
sked so as to prevent it from interrupting, the execution of interrupt service r
outine of higher priority interrupt.
60. When the 8085 processor accept hardware interrupt?
The processor keeps on checking the interrupt pins at the second T -state of las
t Machine cycle of every instruction. If the processor finds a valid interrupt s
ignal and if the interrupt is unmasked and enabled then the processor accepts th
e interrupt. The acceptance of the interrupt is acknowledged by sending an OOA s
ignal to the interrupted device.
61. When the 8085 processor will disable the interrupt system? The interrupts of
8085 except TRAP are disabled after anyone of the following operations
[Link] El instruction.
[Link] or processor reset.
[Link] reorganization (acceptance) of an interrupt.
62. What is the function performed by Dl instruction?
The function of Dl instruction is to enable the disabled interrupt system.
63. What is the function performed by El instruction?
The El instruction can be used to enable the interrupts after disabling.
64. How the vector address is generated for the INTR interrupt of
8085? For the interrupt INTR, the interrupting device has to place either RST op
code or CALL opcode followed by l6-bit address. I~RST opcode is placed then the
corresponding vector address is generated by the processor. In case of CALL opco
de the given l6-bit address will be the vector address.
65. How clock signals are generated in 8085 and what is the frequency of the int
ernal clock?
The 8085 has the clock generation circuit on the chip but an external quartz cry
stal or L C circuit or RC circuit should be connected at the pins XI and X2. The
maximum internal clock frequency of 8085A is 3.03 MHz.
66. What happens to the 8085 processor when it is resetted?
When the 8085 processor is resetted it execute the first instruction at the OOOO
H location. The 8085 resets (clears) instruction register, interrupt mask bits a
nd other registers.
67. What are the operations performed by ALU of 8085?
The operations performed by ALU of 8085 are Addition, Subtraction, Logical AND,
OR, Exclusive OR, Compare Complement, Increment, Decrement and Left Right shift
.
68. What is a flag?
Flag is a flip flop used to store the information about the status of the proces
sor and the status of the instruction executed most recently.
69. List the flags of 8085
There are five flags in 8085. They are sign flag, zero flag, Auxiliary carry fla
g, parity flag and carry flag.
70. What is the Hardware interrupts of 8085?
The hardware interrupts in 8085 are TRAP, RST 7.5, RST 6.5 and RST 5,5. 41.
[Link] interrupt has highest priority in 8085? What is the priority of other i
nterrupts?
The TRAP has the highest priority, followed by RST 7.5, RST 6.5, RST 5.5 and INT
R.
72 What is an ALE?
The ALE (Address Latch Enable) is a signal used to demultiplex the address and d
ata lines, using an external latch. It is used to enable the external latch.
73. Explain the function of IO/M in 8085.
The IO/M is used to differentiate memory access and I/O access. For IN and OUT i
nstruction it is high. For memory reference instructions it is low.
74. Where is the READY signal used?
READY is an input signal to the processor, used by the memory or I/O devices to
get extra time for data transfer or to introduce wait states in the bus cycles.
75. What is HOLD and HLDA and how it is used?
Hold and hold acknowledge signals are used for the Direct Memory Access (DMA) ty
pe of data transfer. The DMA controller place a high on HOLD pin in order to tak
e control of the system bus. The HOLD request is acknowledged by the 8085 by dri
ving all its tristated pins to high impedance state and asserting HLDA signal hi
gh.
76.
What is Polling? Polling is a scheme or an algorithm to identify the devices int
errupting the processor. Polling is employed when multiple devices interrupt the
processor through one interrupt pin of the processor.
77. What are the different types of Polling?
The polling can be classified into software and hardware polling. In software po
lling the entire polling process is govern by a prograrn.1n hardware polling, th
e hardware takes care of checking the status of interrupting devices and allowin
g one by one to the processor.
[Link] is the need for interrupt controller?
The interrupt controller is employed to expand the interrupt inputs. It can hand
le the interrupt request from various devices and allow one by one to the proces
sor.
79. List some of the features of INTEL 8259 (Programmable Interrupt Controller)
[Link] manage eight interrupt request
[Link] interrupt vector addresses are programmable.
[Link] priorities of interrupts are programmable.
[Link] interrupt can be masked or unmasked individually.
80. What is a programmable peripheral device ?
If the functions performed by a peripheral device can be altered or changed by a
program instruction then the peripheral device is called programmable device. U
sually the programmable devices will have control registers. The device can be p
rogrammed by sending control word in the prescribed format to the control regist
er.
81. What is synchronous data transfer scheme?
For synchronous data transfer scheme, the processor does not check the readiness
of the device after a command have been issued for read/write operation. fu thi
s scheme the processor will request the device to get ready and then read/[Link]
to the device immediately after the request. In some synchronous schemes a smal
l delay is allowed after the request.
82. What is asynchronous data transfer scheme?
In asynchronous data transfer scheme, first the processor sends a request to the
device for read/write operation. Then the processor keeps on polling the status
of the device. Once the device is ready, the processor execute a data transfer
instruction to complete the process.
83. What are the operating modes of 8212?
The 8212 can be hardwired to work either as a latch or tri-state buffer. If mod
e (MD) pin is tied HIGH then it will work as a latch and so it can be used as ou
tput port. If mode (MD) pin is tied LOW then it work as tri- state buffer and so
it can be used as input port.
84. Explain the working of a handshake output port?
In handshake output operation, the processor will load a data to port. When the
port receives the data, it will inform the output device to collect the data. O
nce the output device accepts the data, the port will inform the processor that
it is empty. Now the processor can load another data to port and the above proce
ss is repeated.
[Link] are the internal devices of 8255 ?
The internal devices of 8255 are port-A, port-B and port-C. The ports can be pro
grammed for either input or output function in different operating modes. 86. Wh
at is baud rate? The baud rate is the rate at which the serial data are transmit
ted. Baud rate is defined as l /(The time for a bit cell). In some systems one b
it cell has one data bit, then the baud rate and bits/sec are same.
87. What is USART?
The device which can be programmed to perform Synchronous or Asynchronous serial
communication is called USART (Universal Synchronous Asynchronous Receiver Tran
smitter). The INTEL 8251A is an example of USART.
88. What are the functions performed by INTEL 8251A?
The INTEL 825lA is used for converting parallel data to serial or vice versa. Th
e data transmission or reception can be either asynchronously or synchronously.
The 8251A can be used to interface MODEM and establish serial communication thro
ugh MODEM over telephone lines.
89. What is an Interrupt?
Interrupt is a signal send by an external device to the processor so as to reque
st the processor to perform a particular task or work.
90. What are the control words of 8251A and what are its functions ?
The control words of 8251A are Mode word and Command word. The mode word informs
8251 about the baud rate, character length, parity and stop bits. The command w
ord can be send to enable the data transmission and reception.
91. What are the information that can be obtained from the status word of 8251 ?

The status word can be read by the CPU to check the readiness of the transmitter
or receiver and to check the character synchronization in synchronous reception
. It also provides information regarding various errors in the data received. Th
e various error conditions that can be checked from the status word are parity e
rror, overrun error and framing error.
92. Give some examples of input devices to microprocessor-based system.
The input devices used in the microprocessor-based system are Keyboards, DIP swi
tches, ADC, Floppy disc, etc.
93. What are the tasks involved in keyboard interface?
The task involved in keyboard interfacing are sensing a key actuation, Debouncin
g the key and Generating key codes (Decoding the key). These task are performed
software if the keyboard is interfaced through ports and they are performed by h
ardware if the keyboard is interfaced through 8279.
94. How a keyboard matrix is formed in keyboard interface using 8279?
The return lines, RLo to RL7 of 8279 are used to form the columns of keyboard ma
trix. In decoded scan the scan lines SLo to SL3 of 8279 are used to form the row
s of keyboard matrix. In encoded scan mode, the output lines of external decoder
are used as rows of keyboard matrix.
95. What is scanning in keyboard and what is scan time?
The process of sending a zero to each row of a keyboard matrix and reading the c
olumns for key actuation is called scanning. The scan time is the time taken by
the processor to scan all the rows one by one starting from first row and coming
back to the first row again.
96. What is scanning in display and what is the scan time?
In display devices, the process of sending display codes to 7 -segment LEDs to d
isplay the LEDs one by one is called scanning ( or multiplexed display). The sca
n time is the time taken to display all the 7-segment LEDs one by one, starting
from first LED and coming back to the first LED again.
97. What are the internal devices of a typical DAC?
The internal devices of a DAC are R/2R resistive network, an internal latch and
current to voltage converting amplifier.
98. What is settling or conversion time in DAC?
The time taken by the DAC to convert a given digital data to corresponding analo
g signal is called conversion time.
99. What are the different types of ADC?
The different types of ADC are successive approximation ADC, counter type ADC fl
ash type ADC, integrator converters and voltage-to-frequency converters.
100. Define stack ?
Stack is a sequence of RAM memory locations defined by the programmer.
101. What is program counter? How is it useful in program execution?
The program counter keeps track of program execution. To execute a program the s
tarting address of the program is loaded in program counter. The PC sends out an
address to fetch a byte of instruction from memory and increments its content a
utomatically.
102. How the microprocessor is synchronized with peripherals?
The timing and control unit synchronizes all the microprocessor operations with
clock and generates control signals necessary for communication between the micr
oprocessor and peripherals.
103. What is a minimum system and how it is formed in 8085?
A minimum system is one which is formed using minimum number of IC chips, The 80
85 based minimum system is formed using 8155,8355 and 8755.
104. What is mean by microcontroller ?
A device which contains the microprocessor with integrated peripherals like mem
ory, serial ports, parallel ports, timer/counter, interrupt controller, data acq
uisition interfaces like ADC,DAC is called microcontroller.
[Link] the features of 8051 microcontroller? The features are *single
_supply +5 volt operation using HMOS technology. *4096 bytes program memory o
n chip(not on 8031) *128 data memory on chip. *Four register banks. *Two m
ultiple mode,16-bit timer/counter. *Extensive boolean processing capabilities.
*64 KB external RAM size *32 bidirect
ional individually addressible I/O lines. *8 bit CPU optim
ized for control applications.
[Link] the operating mode0 of 8051 serial ports?
In this mode serial enters &exits through RXD, TXD outputs the shift clock.8 bi
ts are transmitted/received:8 data bits(LSB first).The baud rate is fixed at 1/1
2 the oscillator frequency.
107 Explain the operating mode2 of 8051 serial ports?
In this mode 11 bits are transmitted(through TXD)or received (through RXD):a sta
rt bit(0), 8 data bits(LSB first),a programmable 9th data bit ,& a stop bit(1).
ON transmit the 9thdata bit (TB* in SCON)can be assigned the value of 0 or [Link]
for eg:, the parity bit(P, in the PSW)could be moved into [Link] receive the 9th
data bit go in to the RB8 in Special Function Register SCON, while the stop bit
is ignored. The baud rate is programmable to either 1/32or1/64 the oscillator f
requency.
108. Explain the mode3 of 8051 serial ports?
In this mode,11 bits are transmitted(through TXD)or received(through RXD):a sta
rt bit(0), 8 data bits(LSB first),a programmable 9th data bit ,& a stop bit(1).
In fact ,Mode3 is the same as Mode2 in all respects except the baud rate. The ba
ud rate in Mode3 is variable. In all the four modes, transmission is initiated b
y any instruction that uses SBUF as a destination register. Reception is initiat
ed in Mode0 by the condition RI=0&REN=[Link] is initiated in other modes by
the incoming start bit if REN=1.
[Link] the interrupts of 8051 microcontroller? The interrupts are:
Vector ad
dress
•External interrupt 0 : IE0 : 0003H
•Timer interrupt 0 : TF0 : 000BH
•External interrupt 1 : IE1 : 0013H
•Timer Interrupt 1 : TF1 : 001BH
•Serial Interrupt Receive interrupt : RI : 0023H
Transmit interrupt: TI : 0023H
[Link] A program to perfom multiplication of 2 nos using 8051?
MOV A,#data 1
MOV B,#data 2
MUL AB
MOV DPTR,#5000
MOV @DPTR,A(lower value)
INC DPTR
MOV A,B
MOVX @ DPTR,A
[Link] a program to mask the 0th &7thbit using 8051?
MOV A,#data
ANL A,#81
MOV DPTR,#4500
MOVX @DPTR,A
LOOP SJMP LOOP
[Link] the addressing modes of 8051?
•Direct addressing
•Register addressing
•Register indirect addressing.
•Implicit addressing
•Immediate addressing
•Index addressing
•Bit addressing
[Link] about CALL statement in 8051?
There are two subroutine CALL instructions. They are
*LCALL(Long CALL)
*ACALL(Absolute CALL)
Each increments the PC to the 1stbyte of the instruction & pushes them in to the
stack.
[Link] about the jump statement?
There are three forms of jump. They are LJMP(Long jump)-address 16 AJMP(Absolute
Jump)-address 11 SJMP(Short Jump)-relative address
[Link] program to load accumulator ,DPH,&DPL using 8051?
MOV A,#30
MOV DPH,A
MOV DPL,A
[Link] a program to find the 2’s complement using 8051?
MOV A,R0
CPL A
INC A
[Link] a program to add 2 8-bit numbers using 8051?
MOV A,#30H
ADD A,#50H
[Link] a program to swap two numbers using 8051?
MOV A, #data
SWAP A
[Link] a program to subtract 2 8-bit numbers &exchange the digits using 805
1?
MOV A,#9F
MOV R0,#40
SUBB A,R0
SWAP A
[Link] a program to subtract the contents of R1 of Bank 0from the contents of
R0 of Bank 2 using 8051?
MOV PSW,#10
MOV A,R0
MOV PSW,#00
SUBB A,R1
PART-B
[Link] & explain the architecture of 8085 microprocessor ?
•Block Diagram
•Registers Available
•Function Of Accumulator
•Explanation about all blocks in the block diagram
2. Draw the Pin Diagram of 8085 and explain the function of various signals.?
•Pin Diagram
•Explanation about all signals
[Link] the instruction classification & instruction sets?
•Data Transfer Instructions
•Arithmetic Instructions
•Logical Instructions
•Branch Instructions
•Machine Control Instructions
4. Write a program to sort the numbers in ascending and descending order.?
•Program
•Result Verification
[Link] the timing diagram of the following Instructions ?
•PUSH
•IN Port A
•STA 5000
•MVI A, 08
•Explain the machine cycles needed for every Instructions and draw the timing diag
ram
[Link] the 8085 based microcomputer system?
7. With neat sketch explain the functions of 8255 PPI.
•Block Diagram
•Explanation about all the ports available.
•Explanation about the modes of transfer
•Explain the control Word Register
8. With neat sketch explain the functions of 8251?.
•Block Diagram
•Types of data transfer
*Explanation about all the blocks.
•Explain the control Word Register, Status Register
9. With neat sketch explain the function of DMA controller?.
•Block Diagram
•Explanation about all blocks in the block diagram
[Link] neat sketch explain the function of Programmable Interrupt Controller?.
•Block Diagram
•Explanation about all blocks in the block diagram
[Link] neat sketch explain the function of Keyboard and display controller?.
•Block Diagram
•Types of Display Available
•Types of keys available
•Explanation about all blocks in the block diagram
12. With neat sketch explain the function of A/D converter?.
•Fundamental steps
•Figure
•Explain the functions.
13. With neat sketch explain the function of D/A converter?.
•Fundamental steps
•Figure
•Explain the functions.
[Link] neat sketch explain the architecture of 8051 microcontroller.?
•Block Diagram
•Explanation about all blocks in the block diagram
15. Draw the Pin Diagram of 8051 and explain the function of various signals?.
•Pin Diagram
•Explanation about all signals
16. List the various Instruction available in 8051 microcontroller?.
•Data Transfer Instructions
•Arithmetic Instructions
•Logical Instructions
•Boolean variable Manipulation Instructions
•Program and Machine Control Instructions