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Gage Output Signal Specifications Guide

This document summarizes the specifications for a gage head's output signal, including: 1. The pin assignments and signals use a 10-pin connector compatible with Sumitomo 3M connectors. Pin 2 outputs measurement data and pin 3 outputs a synchronized clock signal. 2. The electrical specifications include using an open drain output circuit and pull-up CMOS input. Data is output in BCD format including sign, value, decimal, and unit. 3. The data format and timing chart are explained, with the measurement data output from d1 to d13 in order from LSB to MSB. Timing parameters like pulse widths are provided.

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12 views1 page

Gage Output Signal Specifications Guide

This document summarizes the specifications for a gage head's output signal, including: 1. The pin assignments and signals use a 10-pin connector compatible with Sumitomo 3M connectors. Pin 2 outputs measurement data and pin 3 outputs a synchronized clock signal. 2. The electrical specifications include using an open drain output circuit and pull-up CMOS input. Data is output in BCD format including sign, value, decimal, and unit. 3. The data format and timing chart are explained, with the measurement data output from d1 to d13 in order from LSB to MSB. Timing parameters like pulse widths are provided.

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Okara666
Copyright
© All Rights Reserved
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Gage

Heads Output Signal Specifications

Digimatic code
1. Pin assignments and signals 3. Data format
1 9 9 1
Compatible socket: d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13
Sumitomo 3M : V Low-Proheader
2 10 10 2 Model: 7610-5002XX or equivalent
Gage plug External device ALL "F" Measured value
socket Sign (+: 0, -: 8)
Decimal point (0-5) e.g.0 000000.
1 00000.0
Pin No. Signal I/O Description 5 00.0000
1 GND — Signal ground
Unit (mm: 0, inch: 1)
2 DATA Output Measurement data-output terminal
3 CK Output Synchronized clock-output terminal • Data is output as 13-digit (52-bit) based on 4 bits = 1 digit.
4*1 N.C. — Not used • Data is output in order from d1 to d13. Each digit is output in the order of LSB to
5 REQ Input Input for data transmission request from external device MSB.
• Measurement data is output in the order of MSD to LSD.
6* 1
ORIG Input Input for absolute-origin setting signal • The sign, measurement data, decimal position and unit are output in BCD based on
7*1 N.C. — Not used positive logic (0=L, 1=H).
8*1 N.C. — Not used
9*1 +5V — Power supply (+5V ±10%)*2
10*1 GND(F.G.) — Frame ground 4. Timing chart
*1 : LGD, LGS uses a unique specification.
All others use the common Digimatic output specification (10-pin, square). t5 t6 t7
*2 : Current consumption of LGD,LGS: Idd=20mA max.
REQ
CK
DATA
2. I/O electrical specifications t1 t2 t3 t4
t8
• Output terminal format: CK, DATA
N-channel open drain ORIG
Maximum output current: 400µA max. (when Vol=0.4V) Absolute origin setting active

Output withstand voltage: -0.3V to 7V t10 Completed


t11
• Input terminal format: REQ, ORIG
Pull-up CMOS input
Internal power supply voltage: Vdd= 1.35 to 1.65V Standard (for reference) LGD LGS
Pull-up resistance: R1= 10 to 100KΩ Symbol min. max. Symbol min. max. Symbol min. max.
”H” level input voltage: VIH= .1V min.: *t1 0µs 2sec *t1 30µs 95ms *t1 160µs 85ms
“L” level input voltage: VIL= 0.3V max. t2 15µs — t2 15µs — t2 150µs 180µs
t3 100µs — t3 100µs — t3 150µs 180µs
Recommended receiving circuit
t4 100µs — t4 100µs — t4 300µs 330µs
t5 0µs — t5 0µs — t5 0µs —
LGD side Recommended external I/F
*t6 — — *t6 — 100µs *t6 — 100µs
• CK,D ATA Vcc
For Vcc=5V system *t7 — — *t7 100µs — *t7 100µs —
R1 R1, R2=22KΩ±10%
*t8 — — *t8 — 30ms *t8 — —
C=330pF±20%
R2 C 74HC14, etc.
Symbol min. max.
• REQ,ORIG *t10 1.5s —
Vdd Tr=NPN open-collector or N-channel open drain (2SC2855, etc.)
*t11 — 4s
"L" level output voltage VOL=0.2Vmax. (IOL=10mA, etc.)
R1 "H" level leak current: IIK=2µAmax. (at VOH=5.5V) Note 1: The specifications indicated by an asterisk (*) are applicable only to LGD, LGS. All other
CMOS Tr
input Digimatic output specifications are common to all models.
Note 2: Read data only when CK is at the “L” level.
Note: Since the power supply voltages are different between the gage side and the Note 3: Do not input REQ signal (fixed at “H”) while the absolute origin is being set (during t11).
external device side, be sure to use an open collector or open drain circuit. Note 4: If t5, t6 and t7 are satisfied and REQ is continuously input, an output is obtained from
Do not use CMOS output or the like. LGD, LGS at intervals of approximately 95ms.
Note 5: Start inputting ORIG and REQ after two or three seconds have elapsed (the estimated
time required for internal circuit/sensor to stabilize) following power-on.

30

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