40 μA Micropower Instrumentation

Amplifier with Zero Crossover Distortion

AD8236
FEATURES CONNECTION DIAGRAM
Low power: 40 μA supply current (maximum) –IN 1 8 +VS
Low input currents RG 2 7 VOUT
RG 3 6 REF
1 pA input bias current
+IN 4 5 –VS
0.5 pA input offset current
High CMRR: 110 dB CMRR, G = 100 AD8236

08000-001
TOP VIEW
Space-saving MSOP (Not to Scale)
Zero input crossover distortion Figure 1.
Rail-to-rail input and output
Gain set with single resistor
5.0
Operates from 1.8 V to 5.5 V
4.5

INPUT COMMON-MODE VOLTAGE (V)

4.0 G=5
APPLICATIONS VS = 5V
3.5 VREF = 2.5V
Medical instrumentation
3.0
Low-side current sense
Portable devices 2.5

2.0

1.5
G=5
1.0 VS = 1.8V
VREF = 0.9V

08000-002
0.5

0
–0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
OUTPUT VOLTAGE (V)

Figure 2. Wide Common-Mode Voltage Range vs. Output Voltage

GENERAL DESCRIPTION
The AD8236 is the lowest power instrumentation amplifier Table 1. Instrumentation Amplifiers by Category 1
in the industry. It has rail-to-rail outputs and can operate on
General Military Low High Speed
voltages as low as 1.8 V. Its 40 μA maximum supply current Purpose Zero Drift Grade Power PGA
makes it an excellent choice in battery-powered applications. AD8220 AD8230 AD620 AD8236 AD8250
The AD8236’s high input impedance, low input bias current of AD8221 AD8231 AD621 AD627 AD8251
1 pA, high CMRR of 110 dB (G = 100), small size, and low power AD8222 AD8290 AD624 AD623 AD8253
offer tremendous value. It has a wider common-mode voltage AD8228 AD8293G80 AD524 AD8223
range than typical three-op-amp instrumentation amplifiers, AD8295 AD8293G160 AD526 AD8226
making this a great solution for applications that operate on a AD8553
single 1.8 V or 3 V supply. An innovative input stage allows for AD8556
a wide rail-to-rail input voltage range without the crossover AD8557
distortion common in other designs. 1
See [Link]/inamps for the latest instrumentation amplifiers.
The AD8236 is available in an 8-lead MSOP and is specified
over the industrial temperature range of −40°C to +125°C.

Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 [Link]
Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.
AD8236

TABLE OF CONTENTS
Features .............................................................................................. 1  Layout .......................................................................................... 15 
Applications ....................................................................................... 1  Reference Terminal .................................................................... 15 
Connection Diagram ....................................................................... 1  Power Supply Regulation and Bypassing ................................ 15 
General Description ......................................................................... 1  Input Bias Current Return Path ............................................... 16 
Revision History ............................................................................... 2  Input Protection ......................................................................... 16 
Specifications..................................................................................... 3  RF Interference ........................................................................... 16 
Absolute Maximum Ratings............................................................ 7  Common-Mode Input Voltage Range ..................................... 17 
Maximum Power Dissipation ..................................................... 7  Applications Information .............................................................. 18 
ESD Caution .................................................................................. 7  AC-Coupled Instrumentation Amplifier ................................ 18 
Pin Configuration and Function Descriptions ............................. 8  Low Power Heart Rate Monitor ............................................... 19 
Typical Performance Characteristics ............................................. 9  Outline Dimensions ....................................................................... 20 
Theory of Operation ...................................................................... 14  Ordering Guide .......................................................................... 20 
Basic Operation .......................................................................... 14 
Gain Selection ............................................................................. 14 

REVISION HISTORY
5/09—Revision 0: Initial Version

Rev. 0 | Page 2 of 20
 AD8236

SPECIFICATIONS
+VS = 5 V, −VS = 0 V (GND), VREF = 2.5 V, TA = 25°C, G = 5, RL = 100 kΩ to GND, unless otherwise noted.

Table 2.
Parameter Test Conditions Min Typ Max Unit
COMMON-MODE REJECTION RATIO (CMRR) VS = ±2.5 V, VREF = 0 V
CMRR DC VCM = −1.8 V to +1.8 V
G=5 86 94 dB
G = 10 90 100 dB
G = 100 100 110 dB
G = 200 100 110 dB
NOISE
Voltage Noise Spectral Density, RTI f = 1 kHz, G = 5 76 nV/√Hz
RTI, 0.1 Hz to 10 Hz
G=5 4 μV p-p
G = 200 4 μV p-p
Current Noise 15 fA/√Hz
VOLTAGE OFFSET
Input Offset, VOS 3.5 mV
Average Temperature Coefficient (TC) −40°C to +125°C 2.5 μV/°C
Offset RTI vs. Supply (PSR) VS = 1.8 V to 5 V
G=5 100 120 dB
G = 10 110 126 dB
G = 100 110 130 dB
G = 200 110 130 dB
INPUT CURRENT
Input Bias Current 1 10 pA
Overtemperature −40°C to +85°C 100 pA
−40°C to +125°C 600 pA
Input Offset Current 0.5 5 pA
Overtemperature −40°C to +85°C 50 pA
−40°C to +125°C 130 pA
DYNAMIC RESPONSE
Small Signal Bandwidth, –3 dB
G=5 23 kHz
G = 10 9 kHz
G = 100 0.8 kHz
G = 200 0.4 kHz
Settling Time 0.01% VOUT = 4 V step
G=5 444 μs
G = 10 456 μs
G = 100 992 μs
G = 200 1816 μs
Slew Rate
G = 5 to 100 9 mV/μs

Rev. 0 | Page 3 of 20
AD8236
Parameter Test Conditions Min Typ Max Unit
GAIN
Gain Range G = 5 + 420 kΩ/RG 5 200 1 V/V
Gain Error VS = ±2.5 V, VREF = 0 V, VOUT = −2 V to +2 V
G=5 0.005 0.05 %
G = 10 0.03 0.2 %
G = 100 0.06 0.2 %
G = 200 0.15 0.3 %
Nonlinearity RL = 10 kΩ or 100 kΩ
G=5 2 10 ppm
G = 10 1.2 10 ppm
G = 100 0.5 10 ppm
G = 200 0.5 10 ppm
Gain vs. Temperature −40°C to +125°C
G=5 0.25 1 ppm/°C
G > 10 −50 ppm/°C
INPUT
Differential Impedance 440||1.6 GΩ||pF
Common-Mode Impedance 110||6.2 GΩ||pF
Input Voltage Range −40°C to +125°C 0 +VS V
OUTPUT
Output Voltage High, VOH RL = 100 kΩ 4.98 4.99 V
−40°C to +125°C 4.98 V
RL = 10 kΩ 4.9 4.95 V
−40°C to +125°C 4.9 V
Output Voltage Low, VOL RL = 100 kΩ 2 5 mV
−40°C to +125°C 5 mV
RL = 10 kΩ 10 25 mV
−40°C to +125°C 30 mV
Short-Circuit Limit, ISC ±55 mA
REFERENCE INPUT
RIN −IN, +IN = 0 V 210 kΩ
IIN 20 nA
Voltage Range −VS +VS V
Gain to Output 1 V/V
POWER SUPPLY
Operating Range 1.8 5.5 V
Quiescent Current 30 40 μA
Overtemperature −40°C to +125°C 50 μA
TEMPERATURE RANGE
For Specified Performance −40 +125 °C
1
Although the specifications of the AD8236 list only low to midrange gains, gains can be set beyond 200.

Rev. 0 | Page 4 of 20
 AD8236
+VS = 1.8 V, −VS = 0 V (GND), VREF = 0.9 V, TA = 25°C, G = 5, RL = 100 kΩ to GND, unless otherwise noted.

Table 3.
Parameter Test Conditions Min Typ Max Unit
COMMON-MODE REJECTION RATIO (CMRR) VS = ±0.9 V, VREF = 0 V
CMRR DC VCM = −0.6 V to +0.6 V
G=5 86 94 dB
G = 10 90 100 dB
G = 100 100 110 dB
G = 200 100 110 dB
NOISE
Voltage Noise Spectral Density, RTI f = 1 kHz, G = 5 76 nV/√Hz
RTI, 0.1 Hz to 10 Hz
G=5 4 μV p-p
G = 200 4 μV p-p
Current Noise 15 fA/√Hz
VOLTAGE OFFSET
Input Offset, VOS 3.5 mV
Average Temperature Coefficient (TC) −40°C to +125°C 2.5 μV/°C
Offset RTI vs. Supply (PSR) VS = 1.8 V to 5 V
G=5 100 120 dB
G = 10 110 126 dB
G = 100 110 130 dB
G = 200 110 130 dB
INPUT CURRENT
Input Bias Current 1 10 pA
Overtemperature −40°C to +85°C 100 pA
−40°C to +125°C 600 pA
Input Offset Current 0.5 5 pA
Overtemperature −40°C to +85°C 50 pA
−40°C to +125°C 130 pA
DYNAMIC RESPONSE
Small Signal Bandwidth, –3 dB
G=5 23 kHz
G = 10 9 kHz
G = 100 0.8 kHz
G = 200 0.4 kHz
Settling Time 0.01% VOUT = 1.4 V step
G=5 143 μs
G = 10 178 μs
G = 100 1000 μs
G = 200 1864 μs
Slew Rate
G = 5 to 100 11 mV/μs
GAIN
Gain Range G = 5 + 420 kΩ/RG 5 200 1 V/V
Gain Error VS = ±0.9 V, VREF = 0 V, VOUT = −0.6 V to +0.6 V
G=5 0.005 0.05 %
G = 10 0.03 0.2 %
G = 100 0.06 0.2 %
G = 200 0.15 0.3 %

Rev. 0 | Page 5 of 20
AD8236
Parameter Test Conditions Min Typ Max Unit
Nonlinearity RL = 10 kΩ or 100 kΩ
G=5 1 10 ppm
G = 10 1 10 ppm
G = 100 0.5 10 ppm
G = 200 0.4 10 ppm
Gain vs. Temperature −40°C to +125°C
G=5 0.25 1 ppm/°C
G > 10 −50 ppm/°C
INPUT
Differential Impedance 440||1.6 GΩ||pF
Common-Mode Impedance 110||6.2 GΩ||pF
Input Voltage Range −40°C to +125°C 0 +VS V
OUTPUT
Output Voltage High, VOH RL = 100 kΩ 1.78 1.79 V
−40°C to +125°C 1.78 V
RL = 10 kΩ 1.65 1.75 V
−40°C to +125°C 1.65 V
Output Voltage Low, VOL RL = 100 kΩ 2 5 mV
−40°C to +125°C 5 mV
RL = 10 kΩ 12 25 mV
−40°C to +125°C 25 mV
Short-Circuit Limit, ISC ±6 mA
REFERENCE INPUT
RIN −IN, +IN = 0 V 210 kΩ
IIN 20 nA
Voltage Range −VS +VS V
Gain to Output 1 V/V
POWER SUPPLY
Operating Range 1.8 5.5 V
Quiescent Current 33 40 μA
Overtemperature −40°C to +125°C 50 μA
TEMPERATURE RANGE
For Specified Performance −40 +125 °C
1
Although the specifications of the AD8236 list only low to midrange gains, gains can be set beyond 200.

Rev. 0 | Page 6 of 20
 AD8236

ABSOLUTE MAXIMUM RATINGS

Table 4. The difference between the total drive power and the load power is
Parameter Rating the drive power dissipated in the package.
Supply Voltage 6V PD = Quiescent Power + (Total Drive Power – Load Power)
Power Dissipation See Figure 3
⎛V V ⎞ VOUT 2
Output Short-Circuit Current 55 mA PD = (VS × I S ) + ⎜⎜ S × OUT ⎟–
⎟
Input Voltage (Common Mode) ±VS ⎝ 2 RL ⎠ RL
Differential Input Voltage ±VS
RMS output voltages should be considered. If RL is referenced to
Storage Temperature Range −65°C to +125°C
−VS, as in single-supply operation, the total drive power is VS ×
Operating Temperature Range −40°C to +125°C
IOUT. If the rms signal levels are indeterminate, consider the worst
Lead Temperature (Soldering, 10 sec) 300°C
case, when VOUT = VS/4 for RL to midsupply
Junction Temperature 140°C
(VS / 4 )2
PD = (VS × I S ) +
θJA (4-Layer JEDEC Standard Board)
8-Lead MSOP 135°C/W RL
Package Glass Transition Temperature
In single-supply operation with RL referenced to −VS, worst case
8-Lead MSOP 140°C
is VOUT = VS/2.
ESD
Human Body Model 2 kV Airflow increases heat dissipation, effectively reducing θJA. In
Charge Device Model 1 kV addition, more metal directly in contact with the package leads
Machine Model 200 V from metal traces, through holes, ground, and power planes
reduces the θJA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress Figure 3 shows the maximum safe power dissipation in the package
rating only; functional operation of the device at these or any vs. the ambient temperature for the 8-lead MSOP on a 4-layer
other conditions above those indicated in the operational JEDEC standard board. θJA values are approximations.
2.00
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect 1.75
MAXIMUM POWER DISSIPATION (W)

device reliability.
1.50
MAXIMUM POWER DISSIPATION
1.25
The maximum safe power dissipation in the package of the
AD8236 is limited by the associated rise in junction temperature 1.00

(TJ) on the die. The plastic encapsulating the die locally reaches
0.75
the junction temperature. At approximately 140°C, which is the
glass transition temperature, the plastic changes its properties. 0.50

Even temporarily exceeding this temperature limit may change

0.25
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8236. 0

08000-045
–40 –20 0 20 40 60 80 100 120
The still-air thermal properties of the package and PCB (θJA), AMBIENT TEMPERATURE (°C)

the ambient temperature (TA), and the total power dissipated in Figure 3. Maximum Power Dissipation vs. Ambient Temperature
the package (PD) determine the junction temperature of the die.
The junction temperature is calculated as
ESD CAUTION
TJ = TA + (PD × θJA)
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming the load (RL) is referenced to
midsupply, the total drive power is VS/2 × IOUT, some of which
is dissipated in the package and some in the load (VOUT × IOUT).

Rev. 0 | Page 7 of 20
AD8236

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

–IN 1 8 +VS
RG 2 AD8236 7 VOUT
TOP VIEW
RG 3 6 REF

08000-004
(Not to Scale)
+IN 4 5 –VS

Figure 4. Pin Configuration

Table 5. Pin Function Descriptions

Pin No. Mnemonic Description
1 −IN Negative Input Terminal (True Differential Input)
2, 3 RG Gain Setting Terminals (Place Resistor Across the RG Pins)
4 +IN Positive Input Terminal (True Differential Input)
5 −VS Negative Power Supply Terminal
6 REF Reference Voltage Terminal (Drive This Terminal with a Low Impedance Voltage Source to Level-Shift the Output)
7 VOUT Output Terminal
8 +VS Positive Power Supply Terminal

Rev. 0 | Page 8 of 20
 AD8236

TYPICAL PERFORMANCE CHARACTERISTICS

G = 5, +VS = 5 V, VREF = 2.5 V, RL = 100 kΩ tied to GND, TA = 25°C, unless otherwise noted.

700 GAIN = 5

600
NUMBER OF UNITS

500

400

300

200

100

08000-024
5µV/DIV 1s/DIV
0
08000-060
–40 –20 0 20 40
CMRR (µV/V)

Figure 5. Typical Distribution of CMRR, G = 5 Figure 8. 0.1 Hz to 10 Hz RTI Voltage Noise

GAIN = 200

800
NUMBER OF UNITS

600

400

200

08000-025
5µV/DIV 1s/DIV
0
08000-061

–4000 –3000 –2000 –1000 0 1000 2000 3000 4000

VOSI (µV)

Figure 6. Typical Distribution of Input Offset Voltage Figure 9. 0.1 Hz to 10 Hz RTI Voltage Noise

1k 140

120
GAIN = 200
100 GAIN = 100
INTERNAL
NOISE (nV/√Hz)

CLIPPING
PSRR (dB)

80
100 GAIN = 5
60
GAIN = 200

BANDWIDTH 40
LIMITED

20 GAIN = 10
08000-035
08000-042

GAIN = 5

10 0
1 10 100 1k 10k 0.1 1 10 100 1k 10k 100k
FREQUENCY (Hz) FREQUNCY (Hz)

Figure 7. Voltage Noise Spectral Density vs. Frequency Figure 10. Positive PSRR vs. Frequency, RTI,
VS = ±0.9 V, ±2.5 V, VREF = 0 V

Rev. 0 | Page 9 of 20
AD8236
120 15

GAIN = 100
100 10

GAIN = 10
80 GAIN = 200 5

CMRR (µV/V)
GAIN = 5
PSRR (dB)

60 0

40 –5

20 –10

08000-040

08000-014
0 –15
0.1 1 10 100 1k 10k 100k –40 –20 0 20 40 60 80 100 120
FREQUENCY (Hz) TEMPERATURE (°C)

Figure 11. Negative PSRR vs. Frequency, RTI, VS = ±0.9 V, ±2.5 V, VREF = 0 V Figure 14. Change in CMRR vs. Temperature, G = 5, Normalized at 25°C

120 60

50 GAIN = 200
100
40
GAIN = 100
30
80
GAIN = 10
20
CMRR (dB)

GAIN (dB)

60 GAIN = 200 10 GAIN = 5

GAIN = 100 0
40
–10
GAIN = 10
–20
20
08000-023

–30
GAIN = 5
0 –40

08000-022
0.1 1 10 100 1k 10k 100k 10 100 1k 10k 100k 1M
FREQUENCY (Hz) FREQUENCY (Hz)

Figure 12. CMRR vs. Frequency, RTI Figure 15. Gain vs. Frequency, VS = 1.8 V, 5 V

120 6

100 5

80 4
VOUT (V p-p)
CMRR (dB)

60 GAIN = 200 3
GAIN = 100

40 2

20 1
08000-132
08000-051

GAIN = 5
GAIN = 10
0 0
0.1 1 10 100 1k 10k 100k 1 10 100 1k 10k 100k
FREQUENCY (Hz) FREQUENCY (Hz)

Figure 13. CMRR vs. Frequency, 1 kΩ Source Imbalance, RTI Figure 16. Maximum Output Voltage vs. Frequency

Rev. 0 | Page 10 of 20
 AD8236
5.0

4.5
(4.98V, 4.737V)

INPUT COMMON-MODE VOLTAGE (V)

4.0 (0.01V, 4.24V)
NONLINEARITY (5ppm/DIV)

RLOAD = 100kΩ TIED TO GND 3.5

3.0

2.5
RLOAD = 10kΩ TIED TO GND 2.0

1.5

1.0 (4.98V, 0.767V)

(0.01V, 0.27V)

08000-026
VS = 5V 0.5

0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

08000-036
–0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 17. Gain Nonlinearity, G = 5 Figure 20. Input Common-Mode Voltage Range vs. Output Voltage,
G = 5, VS = 5 V, VREF = 2.5 V
5.0

4.5 (4.994V, 4.75V)

INPUT COMMON-MODE VOLTAGE (V)

4.0 (0.01V, 4.25V)
NONLINEARITY (2ppm/DIV)

3.5

3.0

2.5

TWO CURVES REPRESENTED: 2.0

RLOAD = 10kΩ AND 100kΩ TIED TO GND
1.5

1.0 (4.994V, 0.076V)

(0.01V, 0.026V)
08000-028

VS = 5V 0.5

0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

08000-038
–0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 18. Gain Nonlinearity, G = 10 Figure 21. Input Common-Mode Voltage Range vs. Output Voltage,
G = 200, VS = 5 V, VREF = 2.5 V
1.8

1.6 (1.78V, 1.704V)

INPUT COMMON-MODE VOLTAGE (V)

(0.0069V, 1.52V)
1.4
NONLINEARITY (2ppm/DIV)

1.2

1.0

TWO CURVES REPRESENTED: 0.8

RLOAD = 10kΩ AND 100kΩ TIED TO GND
0.6

0.4
(1.78V, 0.274V)
08000-029

0.2 (0.0069V, 0.09V)

VS = 5V

0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
08000-037

–0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)

Figure 19. Gain Nonlinearity, G = 200 Figure 22. Input Common-Mode Voltage Range vs. Output Voltage,
G = 5, VS = 1.8 V, VREF = 0.9 V

Rev. 0 | Page 11 of 20
AD8236
1.8

1.6 (1.75V, 1.705V)

INPUT COMMON-MODE VOLTAGE (V)

(0.03V, 1.533V)
1.4

1.2

1.0

2V/DIV
0.8

0.6 444μs TO 0.01%

0.4
(1.75V, 0.275V)
0.2 (0.03V, 0.103V)

08000-047
0

08000-039
–0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 1ms/DIV
OUTPUT VOLTAGE (V)

Figure 23. Input Common-Mode Voltage Range vs. Output Voltage, Figure 26. Large Signal Pulse Response and Settling Time,
G = 200, VS = 1.8 V, VREF = 0.9 V VS = ±2.5 V, VREF = 0 V, RL = 10 kΩ to VREF

+VS

–0.001
REFERRED TO SUPPLY VOLTAGE

–0.002
OUTPUT VOLTAGE SWING (V)

+125°C
–0.003
+85°C +25°C –40°C
700mV/DIV

143.2μs TO 0.01%
+0.003

+0.002
+125°C +85°C +25°C –40°C

08000-048
+0.001

–VS
08000-054

1.8 2.3 2.8 3.3 3.8 4.3 4.8 1ms/DIV

SUPPLY VOLTAGE (V)

Figure 24. Output Voltage Swing vs. Supply Voltage, Figure 27. Large Signal Pulse Response and Settling Time,
VS = ±0.9 V, ±2.5 V, VREF = 0 V, RL = 100 kΩ Tied to −VS VS = ±0.9 V, VREF = 0 V, RL = 10 kΩ to VREF

+VS

–0.1
–40°C
REFERRED TO SUPPLY VOLTAGE

+25°C
OUTPUT VOLTAGE SWING (V)

–0.2
+85°C
+125°C
–0.3
20mV/DIV

+0.003

+0.002 +125°C +85°C +25°C –40°C

08000-117

+0.001
03579-056

–VS
1k 10k 100k 100µs/DIV

RLOAD (Ω)

Figure 25. Output Voltage Swing vs. Load Resistance, Figure 28. Small Signal Pulse Response, G = 5,
VS = ±0.9 V, ±2.5 V, VREF = 0 V, RL = 100 kΩ Tied to −VS VS = ±2.5 V, VREF = 0 V, RL = 100 kΩ to VREF, CL = 100 pF

Rev. 0 | Page 12 of 20
 AD8236
500

400

SETTLING TIME (µs)

300
20mV/DIV

200

100

08000-017
0

08000-043
100µs/DIV 0 1 2 3 4
OUTPUT VOLTAGE STEP SIZE (V)

Figure 29. Small Signal Pulse Response, G = 5, CL = 100 pF, Figure 32. Settling Time vs. Output Voltage Step Size,
VS = ±0.9 V, VREF = 0 V, RL = 100 kΩ to VREF VS = ±2.5 V, VREF = 0 V, RL = 10 kΩ Tied to VREF

40

38

36

SUPPLY CURRENT (µA)

34 1.8V

32
20mV/DIV

30 5V

28

26

24
08000-113

08000-034
22

20
1ms/DIV –40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)

Figure 30. Small Signal Pulse Response, G = 200, Figure 33. Total Supply Current vs. Temperature
CL = 100 pF, VS = 2.5 V, VREF = 0 V, RL = 100 kΩ to VREF
20mV/DIV

08000-013

1ms/DIV

Figure 31. Small Signal Pulse Response, G = 200,

CL = 100 pF, VS = 0.9 V, VREF = 0 V, RL = 100 kΩ to VREF

Rev. 0 | Page 13 of 20
AD8236

THEORY OF OPERATION
RG +VS –VS
RG RG
2 3 8 5

ESD ESD
PROTECTION PROTECTION

ESD
REF 6
PROTECTION 210kΩ 52.5kΩ 52.5kΩ 210kΩ

OP AMP ESD
A OP AMP 7 VOUT
B PROTECTION

ESD ESD

08000-006
PROTECTION PROTECTION

AD8236
1 4
–IN +IN

Figure 34. Simplified Schematic

The AD8236 is a monolithic, 2-op-amp instrumentation GAIN SELECTION

amplifier. It was designed for low power, portable applications Placing a resistor across the RG terminals sets the gain of the
where size and low quiescent current are paramount. For example, AD8236, which can be calculated by referring to Table 6 or by
it has a rail-to-rail input and output stage to offer more dynamic using the gain equation
range when operating on low voltage batteries. Unlike traditional
rail-to-rail input amplifiers that use a complementary differential 420 kΩ
RG =
pair stage and suffer from nonlinearity, the AD8236 uses a novel G −5
architecture to internally boost the supply rail, allowing the
Table 6. Gains Achieved Using 1% Resistors
amplifier to operate rail to rail yet still deliver a low 0.5 ppm of
1% Standard Table Value of RG (Ω) Calculated Gain
nonlinearity. In addition, the 2-op-amp instrumentation amplifier
422 k 6.0
architecture offers a wide operational common-mode voltage
210 k 7.0
range. Additional information is provided in the Common-
140 k 8.0
Mode Input Voltage Range section. Precision, laser-trimmed
105 k 9.0
resistors provide the AD8236 with a high CMRR of 86 dB
(minimum) at G = 5 and gain accuracy of 0.05% (maximum). 84.5 k 10.0
28 k 20.0
BASIC OPERATION 9.31 k 50.1
The AD8236 amplifies the difference between its positive input 4.42 k 100.0
(+IN) and its negative input (−IN). The REF pin allows the user 2.15 k 200.3
to level-shift the output signal. This is convenient when interfacing
to a filter or analog-to-digital converter (ADC). The basic setup The AD8236 defaults to G = 5 when no gain resistor is used.
is shown in Figure 35. Figure 37 shows an example configuration Gain accuracy is determined by the absolute tolerance of RG.
for operating the AD8236 with dual supplies. The equation for The TC of the external gain resistor increases the gain drift of
the AD8236 is as follows: the instrumentation amplifier. Gain error and gain drift are at a
VOUT = G × (VINP − VINM) + VREF minimum when the gain resistor is not used.

If no gain setting resistor is installed, the default gain, G, is 5.

The Gain Selection section describes how to program the gain, G.
5V

0.1µF
+IN
VINP +VS
RG
GAIN SETTING OUT
RESISTOR RG AD8236 VOUT
REF
VINM
–IN VREF
08000-136

–VS

Figure 35. Basic Setup

Rev. 0 | Page 14 of 20
 AD8236
INCORRECT CORRECT
LAYOUT
Careful board layout maximizes system performance. In
applications that need to take advantage of the low input
AD8236 AD8236
bias current of the AD8236, avoid placing metal under the REF REF
V
input path to minimize leakage current.
V
Grounding +

The output voltage of the AD8236 is developed with respect to OP AMP

–

08000-137
the potential on the reference terminal, REF. To ensure the most
accurate output, the trace from the REF pin should either be
connected to the AD8236 local ground (see Figure 37) or Figure 36. Driving the REF Pin
connected to a voltage that is referenced to the AD8236 local POWER SUPPLY REGULATION AND BYPASSING
ground (Figure 35).
The AD8236 has high power supply rejection ration (PSRR).
REFERENCE TERMINAL However, for optimal performance, a stable dc voltage should be
The reference terminal, REF, is at one end of a 210 kΩ resistor used to power the instrumentation amplifier. Noise on the supply
(see Figure 34). The output of the instrumentation amplifier pins can adversely affect performance. As in all linear circuits,
is referenced to the voltage on the REF terminal; this is useful bypass capacitors must be used to decouple the amplifier.
when the output signal needs to be offset to voltages other than A 0.1 μF capacitor should be placed close to each supply pin.
common. For example, a voltage source can be tied to the REF A 10 μF tantalum capacitor can be used further away from the
pin to level-shift the output so that the AD8236 can interface part (see Figure 37). In most cases, it can be shared by other
with an ADC. The allowable reference voltage range is a function precision integrated circuits.
of the gain, common-mode input, and supply voltages. The REF +VS
pin should not exceed either +VS or −VS by more than 0.5 V.
For best performance, especially in cases where the output is not 0.1µF 10µF
measured with respect to the REF terminal, source impedance to
the REF terminal should be kept low because parasitic resistance +IN

can adversely affect CMRR and gain accuracy. Figure 36 VOUT

demonstrates how an op amp is configured to provide a low AD8236
LOAD
source impedance to the REF terminal when a midscale –IN REF
reference voltage is desired.

0.1µF 10µF

08000-138
–VS

Figure 37. Supply Decoupling, REF, and Output Referred to Ground

Rev. 0 | Page 15 of 20
AD8236
+VS +VS

AD8236 AD8236
REF REF

–VS –VS

TRANSFORMER TRANSFORMER

+VS +VS

C C

1 R
AD8236 fHIGH-PASS = 2πRC AD8236
REF REF

–VS –VS

08000-139
AC-COUPLED AC-COUPLED

Figure 38. Creating an IBIAS Path

INPUT BIAS CURRENT RETURN PATH RF INTERFERENCE

The AD8236 input bias current is extremely small at less than RF rectification is often a problem in applications where there are
10 pA. Nonetheless, the input bias current must have a return large RF signals. The problem appears as a small dc offset voltage.
path to common. When the source, such as a transformer, The AD8236, by its nature, has a 3.1 pF gate capacitance, CG, at
cannot provide a return current path, one should be created each input. Matched series resistors form a natural low-pass filter
(see Figure 38). that reduces rectification at high frequency (see Figure 39). The
relationship between external, matched series resistors and the
INPUT PROTECTION internal gate capacitance is expressed as
All terminals of the AD8236 are protected against ESD. In
1
addition, the input structure allows for dc overload conditions FilterFreqDIFF =
2πRCG
a diode drop above the positive supply and a diode drop below
the negative supply. Voltages beyond a diode drop of the supplies 1
FilterFreqCM =
cause the ESD diodes to conduct and enable current to flow 2πRCG
through the diode. Therefore, an external resistor should be +VS
used in series with each of the inputs to limit current for
voltages above +VS. In either scenario, the AD8236 safely
0.1µF 10µF
handles a continuous 6 mA current at room temperature.
For applications where the AD8236 encounters extreme
overload voltages, as in cardiac defibrillators, external series
R +IN
resistors and low leakage diode clamps, such as BAV199Ls,
CG
FJH1100s, or SP720s, should be used. VOUT
–VS AD8236
R CG
–VS REF
–IN

0.1µF 10µF
08000-140

–VS

Figure 39. RFI Filtering Without External Capacitors

Rev. 0 | Page 16 of 20
 AD8236
To eliminate high frequency common-mode signals while using COMMON-MODE INPUT VOLTAGE RANGE
smaller source resistors, a low-pass RC network can be placed The common-mode input voltage range is a function of the
at the input of the instrumentation amplifier (see Figure 40). input voltages, reference voltage, supplies, and the output of
The filter limits the input signal bandwidth according to the Internal Op Amp A. Figure 34 shows the internal nodes of the
following relationship: AD8236. Figure 20 to Figure 23 show the common-mode
1 voltage ranges for typical supply voltages and gains.
FilterFreqDIFF =
2πR(2 CD + CC + CG ) If the supply voltages and reference voltage is not represented in
1 Figure 20 to Figure 23, the following methodology can be used
FilterFreqCM = to calculate the acceptable common-mode voltage range:
2πR(CC + CG )
1. Adhere to the input, output, and reference voltage ranges
Mismatched CC capacitors result in mismatched low-pass filters.
shown in Table 2 and Table 3.
The imbalance causes the AD8236 to treat what would have been
2. Calculate the output of the internal op amp, A. The following
a common-mode signal as a differential signal. To reduce the
equation calculates this output:
effect of mismatched external CC capacitors, select a value of CD
A = ⎛⎜ VCM − DIFF ⎞ − 52.5 kΩ V
greater than 10 times CC. This sets the differential filter frequency 5 V VREF
⎟ DIFF −
lower than the common-mode frequency. 4⎝ 2 ⎠ RG 4
+VS
where:
0.1µF 10µF VDIFF is defined as the difference in input voltages,
VDIFF = VINP − VINM.
CC 1nF
VCM is defined as the common mode voltage,
R +IN
4.02kΩ
VCM = (VINP + VINM)/2.
VOUT
CD 10nF AD8236 If no gain setting resistor, RG, is installed, set RG to infinity.
R REF
–IN
3. Keep A within 10 mV of either supply rail. This is valid over
4.02kΩ
1nF
the −40°C to +125°C temperature range.
CC
08000-141

−VS + 10 mV < A < +VS – 10 mV

Figure 40. RFI Suppression

Rev. 0 | Page 17 of 20
AD8236

APPLICATIONS INFORMATION
+VS
AC-COUPLED INSTRUMENTATION AMPLIFIER
An integrator can be tied to the AD8236 in feedback to create a 0.1µF
high-pass filter as shown in Figure 41. This circuit can be used
to reject dc voltages and offsets. At low frequencies, the impedance
+IN 1
of the capacitor, C, is high. Therefore, the gain of the integrator fHIGH-PASS =
2πRC
is high. DC voltage at the output of the AD8236 is inverted and
AD8236
gained by the integrator. The inverted signal is injected back into R
REF
the REF pin, nulling the output. In contrast, at high frequencies, –IN C
the integrator has low gain because the impedance of C is low.
+VS
Voltage changes at high frequencies are inverted but at a low
gain. The signal is injected into the REF pins, but it is not enough to 0.1µF
null the output. At very high frequencies, the capacitor appears as
a short. The op amp is at unity gain. High frequency signals are, AD8603
therefore, allowed to pass.
+VS
When a signal exceeds fHIGH-PASS, the AD8236 outputs the high-
VREF
pass filtered input signal. 10µF

08000-142
Figure 41. AC-Coupled Circuit

Rev. 0 | Page 18 of 20
 AD8236
LOW POWER HEART RATE MONITOR This circuit was designed and tested using the AD8609, low
The low power and small size of the AD8236 make it an power, quad op amp. The fourth op amp is configured as a Schmitt
excellent choice for heart rate monitors. As shown in Figure 42, trigger to indicate if the right arm or left arm electrodes fall off
the AD8236 measures the biopotential signals from the body. the body. Used in conjunction with the 953 kΩ resistors at the
It rejects common-mode signals and serves as the primary gain inputs of the AD8236, the resistors pull the inputs apart when
stage set at G = 5. The 4.7 μF capacitor and the 100 kΩ resistor the electrodes fall off the body. The Schmitt trigger sends an
set the −3 dB cutoff of the high-pass filter that follows the active low signal to indicate a leads off condition.
instrumentation amplifier. It rejects any differential dc offsets The reference electrode (right leg) is set tied to ground. Likewise,
that may develop from the half-cell overpotential of the electrode. the shield of the electrode cable is also tied to ground. Some
A secondary gain stage, set at G = 403, amplifies the ECG signal, portable heart rate monitors do not have a third electrode. In
which is then sent into a second-order, low-pass, Bessel filter such cases, the negative input of the AD8236 can be tied to GND.
with −3 dB cutoff at 48 Hz. The 324 Ω resistor and 1 μF capacitor Note that this circuit is shown, solely, to demonstrate the capability
serve as an antialiasing filter. The 1 μF capacitor also serves as a of the AD8236. Additional effort must be made to ensure
charge reservoir for the ADC’s switched capacitor input stage. compliance with medical safety guidelines.

+2.5V –2.5V
1kΩ 20kΩ

+2.5V
5kΩ LEADS OFF DETECTION
+2.5V
INTERRUPT LEADS OFF
0.1µF AD8609
680nF
953kΩ
+2.5V
0.1µF
RA LA AD8236 24.9kΩ 4.02kΩ
IN-AMP AD8609 324Ω
100kΩ AD8609 10-BIT ADC
RL 0.1µF
953kΩ 1kΩ 402kΩ
0.1µF 220nF 1µF MCU + ADC
4.7µF
–2.5V –2.5V
–2.5V
+2.5V

AD8609

08000-143
1kΩ

–2.5V

Figure 42. Example Low Power Heart Rate Monitor Schematic

Rev. 0 | Page 19 of 20
AD8236

OUTLINE DIMENSIONS
3.20
3.00
2.80

8 5 5.15
3.20
4.90
3.00
4.65
2.80 1
4

PIN 1
0.65 BSC
0.95
0.85 1.10 MAX
0.75
0.80
0.15 0.38 8° 0.60
0.23
0.00 0.22 0° 0.40
0.08
COPLANARITY SEATING
0.10 PLANE

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 43. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)
Dimensions shown in millimeters

ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8236ARMZ 1 −40°C to +125°C 8-Lead MSOP RM-8 Y1W
AD8236ARMZ-R71 −40°C to +125°C 8-Lead MSOP RM-8 Y1W
AD8236ARMZ-RL1 −40°C to +125°C 8-Lead MSOP RM-8 Y1W
1
Z = RoHS Compliant Part.

©2009 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D08000-0-5/09(0)

Rev. 0 | Page 20 of 20