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EDT Lab Observations for DFT Training

The document describes 10 test cases for observing the results of EDT insertion lab experiments. For each test case, the same inputs and outputs are listed, including a scan inserted netlist, ATPG setup files, library model, and EDT inserted netlist. Observations are requested for each case, such as the number of clock domains, scan chains, DRC violations, and notes from the log file.

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senthilkumar
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© All Rights Reserved
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Download as PDF, TXT or read online on Scribd
100% found this document useful (1 vote)
268 views12 pages

EDT Lab Observations for DFT Training

The document describes 10 test cases for observing the results of EDT insertion lab experiments. For each test case, the same inputs and outputs are listed, including a scan inserted netlist, ATPG setup files, library model, and EDT inserted netlist. Observations are requested for each case, such as the number of clock domains, scan chains, DRC violations, and notes from the log file.

Uploaded by

senthilkumar
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
  • EDT Insertion Lab Observations

VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

EDT INSERTION LAB OBSERVATIONS


Test Case 1: -

Problem Definition: -

Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 1
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 2: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 2
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 3: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 3
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 4: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 4
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 5: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 5
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case6: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 6
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case7: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 7
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 8: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 8
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case9: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 9
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 10: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 10
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 11: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 11
VLSIGURU DFT TRAINING EDT INSERTION LAB OBSERVATIONS

Test Case 12: -

Problem Definition: -
Inputs: -

• Scan inserted Netlist


• ATPG Setup Dofiles( Dofile and testproc file from scan inserted step)
• Library Model
• Dofile commands

Outputs: -

• EDT inserted Netlist


• ATPG Dofile
• ATPG Testproc
• Scan Def

Observations: -

1) Write block diagram with all DFT inputs?


2) How many clock domains?
3) How many resets?
4) Number of internal scan chains and external Scan Channel?
5) Is it top-down or bottom up approach?
6) How many terminal lockup latches are added?
7) Number of scan flops and non-scan flops in the design?
8) Chain length?
9) Number of DRC violations?
10) How many mask registers, hold registers?
11) Basic decoder or X-Decoder?
12) Log file: - please note your observations from the log file

Vlsiguru Confidential 12

VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       1
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       2
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       3
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       4
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       5
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       6
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       7
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       8
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       9
VLSIGURU DFT TRAINING 
            EDT INSERTION LAB OBSERVATIONS 
 
 
Vlsiguru Confidential                       10

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