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Binary Adder Performance Analysis

This document discusses binary adders and their performance. It introduces carry propagation as a major challenge for binary addition that increases with operand width. An example 8-bit binary addition shows how carry travels from the least significant bit to the most significant bit. A table then compares the delay, logic unit usage, input/output bindings, and power consumption of different adder designs like ripple carry, carry select, carry skip, Kogge-Stone, Spher's-Kogge, and spanning tree adders.

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Akash Rgt
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7 views3 pages

Binary Adder Performance Analysis

This document discusses binary adders and their performance. It introduces carry propagation as a major challenge for binary addition that increases with operand width. An example 8-bit binary addition shows how carry travels from the least significant bit to the most significant bit. A table then compares the delay, logic unit usage, input/output bindings, and power consumption of different adder designs like ripple carry, carry select, carry skip, Kogge-Stone, Spher's-Kogge, and spanning tree adders.

Uploaded by

Akash Rgt
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

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Chapter 1 (14 TNR)

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1.1 FIRST SIDE HEADING (12 TNR)

1.1.1 Next Sub Heading (12 TNR)

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[Link] of Engineering, Tirupati, Dept. of E.C.E Page: 1

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Chapter 1

INTRODUCTION

1.1 INTRODUCTION

To humans, decimal numbers are easy to comprehend and implement for


performing arithmetic. However, in digital systems, such as a microprocessor, DSP
(Digital Signal Processor) or ASIC (Application-Specific Integrated Circuit), binary
numbers are more pragmatic for a given computation. This occurs because binary values
are optimally efficient at representing many values.

Binary adders are one of the most essential logic elements within a digital system.
In addition, binary adders are also helpful in units other than Arithmetic Logic Units
(ALU), such as multipliers, dividers and memory addressing. Therefore, binary addition
is essential that any improvement in binary addition can result in a performance boost for
any computing system and, hence, help improve the performance of the entire system.

The major problem for binary addition is the carry chain. As the width of the
input operand increases, the length of the carry chain increases. Figure 1.1 demonstrates
an example of an 8- bit binary add operation and how the carry chain is affected. This
example shows that the worst case occurs when the carry travels the longest possible
path, from the least significant bit (LSB) to the most significant bit (MSB). In order to
improve the performance of carry-propagate adders, it is possible to accelerate the carry
chain, but not eliminate it. Consequently, most digital designers often resort to building
faster adders when optimizing a computer architecture, because they tend to set the
critical path for most computations.

Fig. 1.1: Binary Adder Example (bold & Italic, Sentence case middle of page)

[Link] of Engineering, Tirupati, Dept. of E.C.E Page: 2


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Table 1.1: Comparison of Delay, LUTs and IOBs for adders (bold, Sentence case
middle of page)

Adder LUTs
IOBs Power
Sl. No. Name Delay (ns) Out of
Out of 232 (mw)
(16 bit) 9312
Ripple carry
1 24.686 32 50 80.98
adder

2 carry select adder 17.501 41 50 80.98

3 carry skip addr 24.841 40 50 80.98

kogge stone
4 14.041 94 50 80.98
adder
sphares kogge
5 17.527 57 65 80.98
adder
spanning tree
6 21.72 39 65 80.98
adder

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