Mod-8 Synchronous Counter Design

This document describes a synchronous counter modulus 8 circuit that outputs to 7-segment displays. The circuit uses 4 D-type flip flops connected in a cascade configuration to count from 0 to 7. Each flip flop output drives an LED on the 7-segment display to display the counting sequence. A 1kHz signal is fed to the clock input of the first flip flop to synchronize the counting.

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Mod-8 Synchronous Counter Design

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apriliana indah

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VCC

U6A

7408N

U5A

2
U4A 2
U3A 2
U2A 74LS32D 2
U1A
~1PR ~1PR ~1PR ~1PR
15 4 15 4 15 4 15 4
1Q 1J 1Q 1J 1Q 1J 1Q 1J
1 1 1 1
1CLK 1CLK 1CLK 1CLK
14 16 14 16 14 16 14 16
~1Q 1K ~1Q 1K ~1Q 1K ~1Q 1K
~1CLR ~1CLR ~1CLR ~1CLR

3 74LS76D 3 74LS76D 3 74LS76D 3 74LS76D

R4 R3 R2 R1
220 220 220 220

LED4 LED3 LED2 LED1

U9
U10
7 13 AB CDE FG
1 A OA 12
2 B OB 11
6 C OC 10
D OD 9
3 OE 15
5 ~LT OF 14
4 ~RBI OG
~BI/RBO

74LS47D

Title: SYNCHRONOUS COUNTER MODULUS 8 OUTPUT 1,2,3,4,5,6

7 SEGMENT COMMON ANODA

1kHz
Checked by: Date: 2016-12-12 Size: A
Approved by: Sheet 1 of 1

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Mod-8 Synchronous Counter Design

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Mod-8 Synchronous Counter Design

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VCC

3 74LS76D 3 74LS76D 3 74LS76D 3 74LS76D

LED4 LED3 LED2 LED1

Title: SYNCHRONOUS COUNTER MODULUS 8 OUTPUT 1,2,3,4,5,6

7 SEGMENT COMMON ANODA

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