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ASIC Verification Certification Course

This document outlines the modules and content covered in a 10-month certification course in ASIC verification offered by Pine Training Academy. The course covers digital logic fundamentals, programming in C and object-oriented concepts, hardware description languages Verilog and SystemVerilog, verification methodology UVM, and AMBA bus protocols. Main modules include digital system design, UNIX, C/OOP, HDLs, SystemVerilog, UVM methodology, and AMBA buses. Students will complete industrial projects, tests, and interview preparation sessions.

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37 views6 pages

ASIC Verification Certification Course

This document outlines the modules and content covered in a 10-month certification course in ASIC verification offered by Pine Training Academy. The course covers digital logic fundamentals, programming in C and object-oriented concepts, hardware description languages Verilog and SystemVerilog, verification methodology UVM, and AMBA bus protocols. Main modules include digital system design, UNIX, C/OOP, HDLs, SystemVerilog, UVM methodology, and AMBA buses. Students will complete industrial projects, tests, and interview preparation sessions.

Uploaded by

Sam
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

PINE TRAINING

ACADEMY

Course Module
YOUR CAREER, OUR PASSION
10 Month Certified Course in ASIC
Verification.
Address
D-557, Govindpuram,
Ghaziabad, U.P.,
201013, India
+91 9999 0 37484
[Link]@pinetr
[Link]
8/15/2014

Verification Flow in Design Signoff

PINE TRAINING ACADEMY-YOUR CAREER, OUR PASSION.

Highlights
Understanding of Black box verification and White box verification
Understanding of different verification (IP Verification, SoC Verification,
Subsystem Verification, Verification IP Design)
Digital Logic Fundamental like Basic and Advanced Digital.
Brief Study of C and Object Oriented programming.
Basic knowledge of Linux and Scripting.
Hardware Design Language (Verilog).
Hardware Verification Language (System Verilog)
Verification Methodology (UVM)
Brief study of AMBA Bus (APB,AHB,AXI).
Industrial Project.
Test and Interview Series after completion of every module.
Visit from Industry.
Personality Development program and preparation of Interview and
Resume.

PINE TRAINING ACADEMY-YOUR CAREER, OUR PASSION.

Main
Module
Module -1
Digital
System
Design.

Module 2
UNIX

Module 3
C, OOP
concept

Module -4
HDL(Hardw
are Design
Language)

ASIC Verification
Digital System Design
Digital System Design: Introduction to Digital System.
o Number System
o Digital Logic Levels
Digital Logic Circuits.
o Combinational Logic Circuit.
o Sequential Logic Circuit.
Schematics Entry.
FSM.
Timing Fundamental.
Assignment of Industrial Project.
Test and Interview Series.
UNIX
Basic of UNIX, how different from Windows.
Introduction of SHELL.
File and Directories.
Home Directories Introduction and .cshrc file
formation.
Basic Commands-cp,mv,rm,touch,which, mkdir,cat
UNIX sed , cut ,awk,grep (regex),tr commands.
BASH shell scripting, usage of loops, arguments,
array.
C & Object Oriented Programming
C and Verification
Why C is useful in Verification
Complete C programming language brief
Object oriented programming and Verification
Brief of Object Oriented Programming
Hardware Design Language (Verilog).
Need of Verilog
Abstraction Level
Concurrency
Digital Circuit design with Verilog
Need of Verification of HDL design
4 State & 2 State logic
Top Down & Bottom up design Methodology
Verilog HDL Design Flow
PINE TRAINING ACADEMY-YOUR CAREER, OUR PASSION.

Verilog Syntax and Symantics


Gate level Modelling
Data Flow Modelling
Behavioural Level Modelling
Blocking & Non-blocking assignment
Test & Interview questions

Introduction to System Verilog course objective.


Introduction: Reasons for using the Hardware
Verification Language.
Benefits of System Verilog in Verification.
System Verilog Data types
Procedural Statements and Routines
Interface & Virtual Interface
Constraint Randomization & Need of Randomization
Threads & Interprocess Communication
Coverage Metric( Code coverage, Functional
Coverage)
Callbacks
Cross coverage
Writing a Test bench.
Test and Interview Series.
Universal Verification Methodology(UVM)
Module 6
UVM
UVM Testbench
Methodology
UVM Phases
UVM Top-down & Bottom-up approach
UVM Reporting
UVM Transaction
UVM Configuration
UVM Factory
UVM Sequence (also UVM Virtual sequence)
UVM Components(Monitor, Agent, Environment ,
Sequencer, Driver)
UVM Transaction level Methodology
UVM Callbacks
Module 5
System
Verilog(HV
L)

PINE TRAINING ACADEMY-YOUR CAREER, OUR PASSION.

Module -7
AMBA Bus

Advance Microcontroller Bus Architecture


APB
AHB
AXI
Why AMBA is so important for Verification?
One Project of Verification IP development for any
AMBA bus.

PINE TRAINING ACADEMY-YOUR CAREER, OUR PASSION.

5 Week

Common questions

Powered by AI

Hardware Design Language, particularly Verilog, plays a crucial role in ASIC verification as it allows the modeling of digital systems at various abstraction levels. Verilog's syntax and semantics enable the design of gate-level, data-flow, and behavioral models, which can be tested for functional correctness using simulation and verification methodologies, ensuring the design meets its specifications before manufacturing .

The test and interview series conducted after each module play a significant role in reinforcing learning and assessing comprehension. These assessments ensure that students consolidate their knowledge, identify areas for improvement, and gain confidence in articulation and problem-solving skills, which are essential for success in technical interviews and industry roles .

UVM enhances verification environment design by providing a standardized architecture and classes, promoting reusability and scalability. UVM components like agents, sequencers, and monitors facilitate comprehensive testing across multiple levels. Its phases and reporting capabilities ensure structured test execution and detailed analysis of results, supporting the creation of modular and flexible verification solutions capable of handling complex designs .

Digital logic fundamentals are foundational for understanding ASIC verification because they form the basis of designing and testing digital circuits. Knowledge of number systems, logic levels, and both combinational and sequential logic circuits is essential for creating precise verification models and ensuring all logic pathways in the design are thoroughly tested .

The AMBA Bus is vital in verification projects due to its widescale adoption in industry-standard SoCs, enabling reliable interconnection and communication between various components. Understanding AMBA protocols like APB, AHB, and AXI allows engineers to validate the integration and functionality of subsystem interactions, ensuring robust performance and compliance with industry standards within a complex system environment .

System Verilog extends standard Verilog by offering advanced verification features such as constraint randomization, interface and virtual interfaces, and coverage metrics, which improve the automation and accuracy of verification processes. It supports object-oriented programming concepts and provides robust mechanisms for handling complex scenarios, reducing manual test creation, and enhancing coverage-driven development .

Understanding both black box and white box verification techniques is crucial as they provide different perspectives on testing ASIC designs. Black box verification focuses on testing the functionality of the system without any knowledge of the internal workings, which ensures the overall correctness according to specifications. In contrast, white box verification allows testers to assess the internal logic and structure, identifying potential flaws in the internal code that might not affect functionality but could impact performance or reliability .

Personality development programs in technical training aim to complement technical skills with essential soft skills like communication, teamwork, and problem-solving abilities. These programs prepare individuals to effectively convey complex ideas, collaborate within engineering teams, and adapt to dynamic workplace environments, thereby enhancing their employability and effectiveness as verification engineers .

UNIX skills are an essential part of the ASIC Verification course as they enhance the capability to automate processes and manage scripts effectively in a hardware verification environment. UNIX commands and shell scripting allow for the efficient management of files, execution of repetitive verification tasks, and analysis of large sets of data generated during verification, thus improving the productivity and effectiveness of verification engineers .

Learning C programming is beneficial for verification, particularly in the ASIC field, as C provides a robust platform for creating testbenches and validation routines. Its efficiency in manipulating hardware near software abstraction levels allows engineers to verify algorithms and data paths, ensuring accurate and efficient design before implementation into hardware .

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