Pulsed Load Modulation (PLM)
0.35m pHEMT Power Amplifier
ShuhsienLiaoandYuanxun EthanWang
DigitalMicrowaveLab
ElectricalEngineeringDepartment
UCLA
Digital Microwave Lab
Outline
Background
Pulsed
2GHz
Load Modulation (PLM)
PLM PA module
Testing
Results WCDMA
Conclusions
Digital Microwave Lab
Background
Digital RF transmitters have been envisioned in the past
decade, due to their potential for
Synthesizing and retaining digital modulations precisely
High efficiency amplification through the use of switched
mode PA
Delta-sigma modulation based transmitter architectures
[Jayarama et. al. MGWL, Mar. 1998]
Quantize the RF signals into pulses
Amplify the pulses through switched mode amplifiers
Restore original non-constant-envelope through a filter
at the output
Digital Microwave Lab
Envelope Delta Sigma Modulation (EDSM)
[Wang, MTT-S, June. 2003]
Low sampling clock rate only the envelope is oversampled
Gate control, no large current voltage regulator
Minimum delay mismatch between AM and PM path
Wide bandwidth and can be scaled to millimeter wave PA
Digital Microwave Lab
An Example for EDSM
Spectrum (dB)
Spectrum (dB)
single channel WCDMA signal (10.8dB PAR)
0
-10
-20
-30
-40
-50
-60
-70
-80
0
-10
-20
-30
-40
-50
-60
-70
-80
-100
0
-10
-20
-30
-40
-50
-60
-70
-80
WCDMA
EDSM
-80
-60
-40
-20
20
Frequency (MHz)
40
60
80
0
-10
-20
-30
-40
-50
-60
-70
-80
100
Sample clock rate:
495.36Mbps
ACPR @ 5MHz:
45dBc
Noise shaping pushes
quantization noise
away from the signal
band
Filter will be used to
filter out the noise
outside the 30MHz
bandwidth
Digital Microwave Lab
High Efficiency?
y
y
High-Q Bandpass filter is needed to filter out the
quantization noise
In general, a filter with bandwidth narrower than the
PA output behaves like a complex, time-varying load
impedance to the PA
Digital Microwave Lab
Efficiency for Non-Constant Envelope
For a single-ended amplifier such as a Class-B, E & F transistor
drain (collector) efficiency is given by
= max
VRF
= max r
VDC
Power backoff ratio
To prevent the efficiency drop, one needs either maintain the VRF
or decrease VDC accordingly when the output power drops
Drain (collector) modulations
(Kahn techniques, ET)
VDC = VRF
Load modulations
(Dohertys, Chireixs outphasing)
RL =
Ropt
r
Digital Microwave Lab
Pulsed Load Modulation (PLM)
Switched resonator
[Kim et. al., TCAS I, 2006]
Assumptions
switching rate >> bandwidth of filter
Current filter (series type) Iin = Iout
voltage amplitude of RF source = Vo
resonance frequency, fo = fc
Reff =
1
1
RL = RL
D
r
Duty cycle
Power back off ratio
The optimum load modulation characteristics is obtained !!!
Digital Microwave Lab
A Practical Implementation of PLM
DC Supply
[Jeong et. al., TCAS II, 2008]
Main PA
RF
Carrier
High Q
Filter
Envelope
Modulator
Iout
+ Vout
Ropt/2
-
50 ohm
Aux PA
DC Supply
Balanced amplifier to simplify input matching
Both PAs are controlled by the same envelope modulator
on-state : Both PAs remain saturated until 6 dB back off
off-state : Output impedance of Main PA transformed to RF short
Digital Microwave Lab
Theoretical Efficiency vs. Output Power
1
PLM
0.8
0.8
0.6
0.6
Efficiency
NormalizedIdc1,Idc2,V1&Efficiency
0.4
Idc1
0.2
0
0
0
20
40
DutyCycle(%)
1.
2.
3.
4.
Idc2
0.2
Doherty
0.4
60
80
100
0.2
0.4
0.6
0.8
Normalizedoutputpower
Idc1 linearly proportional to duty cycle
Idc2 decreases to 0 when D=0.5
Both transistor remain in saturation when 0.5<D<1
Efficiency remain constant until D=0.5
Digital Microwave Lab
1.9GHz PLM Amplifier Module
Made of a pair of 0.35um pHEMT devices from Triquint
Digital Microwave Lab
Measurement Setup
CW test:
[Link] Efficiency, PAE and Gain measurement without filter
[Link] B mode bias
Duty cycle test:
[Link] amplifier module with Diplexer as high Q filter
[Link] at Class B mode
3.10%~100% Duty cycle with different oversampling clock rate
[Link] efficiency comparison to ideal Class B mode
Digital Microwave Lab
Test Results
Duty Cycle Test
CW Test
80
20
70
50
50
40
40
30
Drain Efficiency
PAE
Gain
20
10
0
Maximum Drain Efficiency: 71%
Output power : 29.62dBm
Gain: 13.74dB
Ideal Class_B
330.26Mbps
500Mbps
20
0
100 200 300 400 500 600 700 800 900 1000 1100
Output Power (mW)
30
30
20
10
10
0
0
100
200
300
400
500
600
700
0
800
Output Power (mW)
Maximum Drain Efficiency:59.5%
Output power : 29dBm
Gain:12.1dB
0.8dB filter loss is included !
Digital Microwave Lab
Efficiency (%)
10
40
Efficiency (%)
50
60
15
Gain (dB)
Efficiency (%)
60
60
Test of WCDMA Modulations
y
A single channel WCDMA signal without PAR reduction is
used (PAR=10.8dB) as the testing signal
Envelop and phase modulation is separated in software
DSM is applied to the envelop signal in software, output is
transferred to the AWG digital outputs
Output power is varied by adjusting the input of DSM, not
the output of AWG or the carrier power input to the PA
IQ components of phase modulations are sent the analogue
outputs of AWG and then modulated on the carrier
through the VSG
Digital Microwave Lab
WCDMA Test Results
-30
Mask
24.57dBm
25.28dBm
25.84dBm
26.30dBm
-40
-50
-40
-50
-60
-60
-70
-70
-80
-80
-90
1855
1860
1865
1870
1875
1880
-90
Power Spectrum Density (dBm/Hz)
Power Spectrum Density (dBm/Hz)
-30
Frequency (MHz)
Quantization noise removed by filter to restore linearity
~39 dBc ACPR @ 5MHz, without additional linearization
~43% PAE (filter loss included)
52.6% PAE (filter loss de-embedded)
Digital Microwave Lab
PAE&ACLR vs. Output Power
45
45
60
50
50
40
40
30
30
ACLR@-5MHz
ACLR@+5MHz
35
20
20
PAE
PAE (filter removed)
30
30
10
25
150
200
250
300
350
Output Power (mW)
400
25
450
10
0
0
200
300
400
Output Power (mW)
Power efficiency increase with the output power
ACLR remains stable over a certain range of output power
Digital Microwave Lab
PAE (%)
35
ACLR (dBc)
PAE (%)
40
40
ACLR (dBc)
60
Summary of WCDMA Testing results
EDSMexperimentalresult(filterlossdeembedded)
SamplingClock
495.36Mbps
OSR
Pout,peak
27.1dBm
PAEpeak
52.6%
Drainefficiency
58.3%
ACLR@5MHz
39dBc
ACLR@+5MHz
38.9dBc
ACLR@10MHz
42.86dBc
ACLR@+10MHz
42.79dBc
Digital Microwave Lab
Comparison with Other Techniques
Drain
Efficiency
Reference
Enhancement
Scheme
Output
power
PAE
This work
EDSM+PLM
27.1dBm
52.6%
58.3%
39dBc@5MHz
42.8dBc@10MHz
[1]
Doherty
35.13dBm
42.7%
27dBc@2.5MHz
-
Doherty+DPD
35.13dBm
41.5%
49.6dBc@2.5MHz
-
[2}
Doherty+DPD
31.5dBm
41.6%
29dBc@5MHz
31dBc@10MHz
[3]
ET+DPD
41.5dBm
47%
49%
48dBc@5MHz
53dBc@10MHz
ACLR
[1]J. Moon, J. Kim, I. Kim and B. Kim, Highly efficient three-way saturated Doherty Amplifier with digital feedback
predistortion, IEEE Microwave and Wireless Components Letters, Aug. 2008.
[2]W. C. E. Neo, J. Qureshi, M. J. Pelk, J. R. Gajadharsing and L. C. N. de Vreede, A mixed-signal approach towards
linear and efficient n-way Doherty amplifiers, IEEE Trans. Microwave Theory & Tech.,, May. 2007.
[3]D. Kimball, K. Myoungbo, P. Draxler, J. Jinseong, H. Chin, C. Steinbeiser, T. Landon, O. Krutko, L. Larson and P.
Asbeck, High Efficiency WCDMA Envelope Tracking Base-Station Amplifier Implemented with GaAs HVHBTs, IEEE
Compound Semiconductor Integrated Circuits Symposium, Oct. 2008.
Digital Microwave Lab
Conclusions
PLM is able to improve the power efficiency
of PA under non-constant-envelope modulations
with reasonable linearity performance out-ofthe-box
Digital pre-distortion or digital feedback
(including the PA in the Delta-Sigma loop) may
be used for better linearity
Suited for broadband, high PAR applications
Digital Microwave Lab