Complete Instruction set - 8086

Complete 8086 instruction set

Quick reference:

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Complete Instruction set - 8086

CMPSB MOV
AAA CMPSW JAE JNBE JPO MOVSB RCR SCASB
AAD CWD JB JNC JS MOVSW REP SCASW
AAM DAA JBE JNE JZ MUL REPE SHL
AAS DAS JC JNG LAHF NEG REPNE SHR
ADC DEC JCXZ JNGE LDS NOP REPNZ STC
ADD DIV JE JNL LEA NOT REPZ STD
AND HLT JG JNLE LES OR RET STI
CALL IDIV JGE JNO LODSB OUT RETF STOSB
CBW IMUL JL JNP LODSW POP ROL STOSW
CLC IN JLE JNS LOOP POPA ROR SUB
CLD INC JMP JNZ LOOPE POPF SAHF TEST
CLI INT JNA JO LOOPNE PUSH SAL XCHG
CMC INTO JNAE JP LOOPNZ PUSHA SAR XLATB
CMP IRET JNB JPE LOOPZ PUSHF SBB XOR
JA RCL

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Complete Instruction set - 8086

Operand types:

REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP.
SREG: DS, ES, SS, and only as second operand: CS.
memory: [BX], [BX+SI+7], variable, etc...(see Memory Access).
immediate: 5, -24, 3Fh, 10001101b, etc...
Notes:
When two operands are required for an instruction they are separated
by comma. For example: REG, memory
When there are two operands, both operands must have the same size
(except shift and rotate instructions). For example:

AL, DL
DX, AX
m1 DB ?
AL, m1
m2 DW ?
AX, m2
Some instructions allow several operand combinations. For example:

memory, immediate
REG, immediate

memory, REG
REG, SREG
Some examples contain macros, so it is advisable to use Shift + F8 hot
key to Step Over (to make macro code execute at maximum speed set
step delay to zero), otherwise emulator will step through each
instruction of a macro. Here is an example that uses PRINTN macro:

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Complete Instruction set - 8086

#make_COM#
include '[Link]'
ORG 100h
MOV AL, 1
MOV BL, 2
PRINTN 'Hello World!' ; macro.
MOV CL, 3
PRINTN 'Welcome!' ; macro.
RET

These marks are used to show the state of the flags:

1 - instruction sets this flag to 1.

0 - instruction sets this flag to 0.
r - flag value depends on result of the instruction.
? - flag value is undefined (maybe 1 or 0).

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Complete Instruction set - 8086

Some instructions generate exactly the same machine code, so

disassembler may have a problem decoding to your original code. This is
especially important for Conditional Jump instructions (see "Program
Flow Control" in Tutorials for more information).

Instructions in alphabetical order:

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Complete Instruction set - 8086

ASCII Adjust after Addition.

Corrects result in AH and AL after addition when working
with BCD values.
It works according to the following Algorithm:
if low nibble of AL > 9 or AF = 1 then:
AL = AL + 6
AH = AH + 1
AF = 1
CF = 1
else
AF = 0
No
AAA
operands CF = 0
in both cases:
clear the high nibble of AL.
Example:
MOV AX, 15 ; AH = 00, AL = 0Fh
AAA ; AH = 01, AL = 05
RET

C Z S O P A

R ? ? ? ? R

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Complete Instruction set - 8086

ASCII Adjust before Division.

Prepares two BCD values for division.
Algorithm:
AL = (AH * 10) + AL
AH = 0
Example:
No MOV AX, 0105h ; AH = 01, AL = 05
AAD
operands
AAD ; AH = 00, AL = 0Fh (15)
RET

C Z S O P A

? r r ? r ?

AAM No ASCII Adjust after Multiplication.

operands Corrects the result of multiplication of two BCD values.
Algorithm:
AH = AL / 10
AL = remainder
Example:
MOV AL, 15 ; AL = 0Fh
AAM ; AH = 01, AL = 05

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Complete Instruction set - 8086

RET

C Z S O P A

? r r ? r ?

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Complete Instruction set - 8086

ASCII Adjust after Subtraction.

Corrects result in AH and AL after subtraction when working
with BCD values.

Algorithm:
if low nibble of AL > 9 or AF = 1 then:
AL = AL - 6
AH = AH - 1
AF = 1
CF = 1
else
No AF = 0
AAS
operands
CF = 0
in both cases:
clear the high nibble of AL.
Example:
MOV AX, 02FFh ; AH = 02, AL = 0FFh
AAS ; AH = 01, AL = 09
RET

C Z S O P A

R ? ? ? ? R

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Complete Instruction set - 8086

Add with Carry.

Algorithm:
operand1 = operand1 + operand2 + CF
Example:
REG,
memory STC ; set CF = 1
memory,
REG MOV AL, 5 ; AL = 5
ADC REG, REG ADC AL, 1 ; AL = 7
memory,
immediate RET
REG,
immediate C Z S O P A

R r r r r R

Add.
Algorithm:
operand1 = operand1 + operand2
REG, Example:
memory
memory, MOV AL, 5 ; AL = 5
REG
ADD AL, -3 ; AL = 2
ADD REG, REG
memory, RET
immediate
REG, C Z S O P A
immediate
R r r r r R

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Complete Instruction set - 8086

Logical AND between all bits of two operands. Result is

stored in operand1.
These rules apply:
1 AND 1 = 1
1 AND 0 = 0
REG, 0 AND 1 = 0
memory 0 AND 0 = 0
memory, Example:
REG
AND REG, REG MOV AL, 'a' ; AL = 01100001b
memory,
AND AL, 11011111b ; AL = 01000001b ('A')
immediate
REG, RET
immediate
C Z S O P

0 r r 0 r

CALL procedure Transfers control to procedure, return address is

name (IP) is pushed to stack. 4-byte address may be
label entered in this form: 1234h:5678h, first value is a
4-byte segment second value is an offset (this is a far call,
address so CS is also pushed to stack).
Example:
#make_COM#
ORG 100h ; for COM file.

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Complete Instruction set - 8086

CALL p1
ADD AX, 1
RET ; return to OS.
p1 PROC ; procedure declaration.
MOV AX, 1234h
RET ; return to caller.
p1 ENDP

C Z S O P A

Unchanged

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Complete Instruction set - 8086

Convert byte into word.

Algorithm:
if high bit of AL = 1 then:
AH = 255 (0FFh)
else
AH = 0
Example:
No MOV AX, 0 ; AH = 0, AL = 0
CBW
operands
MOV AL, -5 ; AX = 000FBh (251)
CBW ; AX = 0FFFBh (-5)
RET

C Z S O P A

unchanged

Clear Carry flag.

Algorithm:
CF = 0
No
CLC C
operands
0

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Complete Instruction set - 8086

Clear Direction flag. SI and DI will be incremented by chain

instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB,
MOVSW, STOSB, STOSW.
Algorithm:
No DF = 0
CLD
operands
D

Clear Interrupt enable flag. This disables hardware

interrupts.
Algorithm:
IF = 0
No
CLI
operands I

CMC No Complement Carry flag. Inverts value of CF.

operands Algorithm:
if CF = 1 then CF = 0
if CF = 0 then CF = 1

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Complete Instruction set - 8086

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Compare.

Algorithm:
operand1 - operand2
result is not stored anywhere, flags are set (OF, SF, ZF, AF,
REG, PF, CF) according to result.
memory Example:
memory,
REG MOV AL, 5
CMP REG, REG MOV BL, 5
memory,
immediate CMP AL, BL ; AL = 5, ZF = 1 (so equal!)
REG,
RET
immediate
C Z S O P A

r r r r r r

CMPSB No Compare bytes: ES:[DI] from DS:[SI].

operands Algorithm:
DS:[SI] - ES:[DI]
set flags according to result:
OF, SF, ZF, AF, PF, CF
if DF = 0 then
SI = SI + 1
DI = DI + 1

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Complete Instruction set - 8086

else
SI = SI - 1
DI = DI - 1
Example:
see [Link] in Samples.

C Z S O P A

r r r r r r

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Complete Instruction set - 8086

Compare words: ES:[DI] from DS:[SI].

Algorithm:
DS:[SI] - ES:[DI]
set flags according to result:
OF, SF, ZF, AF, PF, CF
if DF = 0 then
SI = SI + 2
DI = DI + 2
No
CMPSW else
operands
SI = SI - 2
DI = DI - 2
Example:
see [Link] in Samples.

C Z S O P A

r r r r r r

Convert Word to Double word.

Algorithm:
No if high bit of AX = 1 then:
CWD
operands
DX = 65535 (0FFFFh)

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Complete Instruction set - 8086

else
DX = 0

Example:
MOV DX, 0 ; DX = 0
MOV AX, 0 ; AX = 0
MOV AX, -5 ; DX AX = 00000h:0FFFBh
CWD ; DX AX = 0FFFFh:0FFFBh
RET

C Z S O P A

unchanged

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Complete Instruction set - 8086

Decimal adjust After Addition.

Corrects the result of addition of two packed BCD values.
Algorithm:
if low nibble of AL > 9 or AF = 1 then:
AL = AL + 6
AF = 1
if AL > 9Fh or CF = 1 then:
AL = AL + 60h
No CF = 1
DAA
operands
Example:
MOV AL, 0Fh ; AL = 0Fh (15)
DAA ; AL = 15h
RET

C Z S O P A

r r r r r r

DAS No Decimal adjust After Subtraction.

operands Corrects the result of subtraction of two packed BCD values.

Algorithm:
if low nibble of AL > 9 or AF = 1 then:

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Complete Instruction set - 8086

AL = AL - 6
AF = 1
if AL > 9Fh or CF = 1 then:
AL = AL - 60h
CF = 1
Example:
MOV AL, 0FFh ; AL = 0FFh (-1)
DAS ; AL = 99h, CF = 1
RET

C Z S O P A

r r r r r r

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Complete Instruction set - 8086

Decrement.
Algorithm:
operand = operand - 1
Example:
MOV AL, 255 ; AL = 0FFh (255 or -1)
REG
DEC AL ; AL = 0FEh (254 or -2)
DEC memory
RET

Z S O P A

r r r r r

CF - unchanged!  

DIV REG Unsigned divide.

memory Algorithm:
when operand is a byte:
AL = AX / operand
AH = remainder (modulus)
when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus)
Example:
MOV AX, 203 ; AX = 00CBh
MOV BL, 4
DIV BL ; AL = 50 (32h), AH = 3

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Complete Instruction set - 8086

RET

C Z S O P A

? ? ? ? ? ?

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Complete Instruction set - 8086

Halt the System.

Example:
MOV AX, 5
No HLT
HLT
operands
C Z S O P A

unchanged

IDIV REG Signed divide.

memory
Algorithm:
when operand is a byte:
AL = AX / operand
AH = remainder (modulus)
when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus)
Example:
MOV AX, -203 ; AX = 0FF35h
MOV BL, 4
IDIV BL ; AL = -50 (0CEh), AH = -3 (0FDh)
RET

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Complete Instruction set - 8086

C Z S O P A

? ? ? ? ? ?

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Complete Instruction set - 8086

Signed multiply.

Algorithm:
when operand is a byte:
AX = AL * operand.
when operand is a word:
(DX AX) = AX * operand.
Example:
REG
IMUL memory MOV AL, -2
MOV BL, -4
IMUL BL ; AX = 8
RET

C Z S O P A

r ? ? r ? ?

CF=OF=0 when result fits into operand of IMUL.  

IN AL, [Link] Input from port into AL or AX.

AL, DX Second operand is a port number. If required to access port
AX, [Link] number over 255 - DX register should be used.
AX, DX Example:
IN AX, 4 ; get status of traffic lights.
IN AL, 7 ; get status of stepper-motor.

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Complete Instruction set - 8086

C Z S O P A

unchanged

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Increment.

Algorithm:

operand = operand + 1

Example:
REG MOV AL, 4
INC memory
INC AL ; AL = 5
RET

Z S O P A

r r r r r

CF - unchanged!  

INT immediate Interrupt numbered by immediate byte (0..255).

byte
Algorithm:
Push to stack:
flags register
CS
IP
IF = 0
Transfer control to interrupt procedure

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Complete Instruction set - 8086

Example:
MOV AH, 0Eh ; teletype.
MOV AL, 'A'
INT 10h ; BIOS interrupt.
RET

C Z S O P A I

unchanged 0

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Complete Instruction set - 8086

Interrupt 4 if Overflow flag is 1.

Algorithm:

if OF = 1 then INT 4

Example:
; -5 - 127 = -132 (not in -128..127)
No ; the result of SUB is wrong (124),
INTO
operands
; so OF = 1 is set:
MOV AL, -5
SUB AL, 127 ; AL = 7Ch (124)
INTO ; process error.
RET
 

IRET No Interrupt Return.

operands
Algorithm:
Pop from stack:
IP
CS
flags register

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Complete Instruction set - 8086

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JNAE label Short Jump if first operand is Not Above and Not Equal to
second operand (as set by CMP instruction). Unsigned.

Algorithm:
if CF = 1 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 2
CMP AL, 5
JNAE label1
PRINT 'AL >= 5.'
JMP exit
label1:
PRINT 'AL < 5.'
exit:
RET

C Z S O P A

unchanged

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JNB label Short Jump if first operand is Not Below second operand (as
set by CMP instruction). Unsigned.

Algorithm:
if CF = 0 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 7
CMP AL, 5
JNB label1
PRINT 'AL < 5.'
JMP exit
label1:
PRINT 'AL >= 5.'
exit:
RET

C Z S O P A

unchanged

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Complete Instruction set - 8086

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JNBE label Short Jump if first operand is Not Below and Not Equal to
second operand (as set by CMP instruction). Unsigned.

Algorithm:
if (CF = 0) and (ZF = 0) then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 7
CMP AL, 5
JNBE label1
PRINT 'AL <= 5.'
JMP exit
label1:
PRINT 'AL > 5.'
exit:
RET

C Z S O P A

unchanged

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Complete Instruction set - 8086

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Short Jump if Carry flag is set to 0.

Algorithm:
if CF = 0 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 2
ADD AL, 3

JNC label JNC label1

PRINT 'has carry.'
JMP exit
label1:
PRINT 'no carry.'
exit:
RET

C Z S O P A

unchanged

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JNE label Short Jump if first operand is Not Equal to second operand
(as set by CMP instruction). Signed/Unsigned.

Algorithm:
if ZF = 0 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 2
CMP AL, 3
JNE label1
PRINT 'AL = 3.'
JMP exit
label1:
PRINT 'Al <> 3.'
exit:
RET

C Z S O P A

unchanged

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JNG label Short Jump if first operand is Not Greater then second
operand (as set by CMP instruction). Signed.

Algorithm:
if (ZF = 1) and (SF <> OF) then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 2
CMP AL, 3
JNG label1
PRINT 'AL > 3.'
JMP exit
label1:
PRINT 'Al <= 3.'
exit:
RET

C Z S O P A

unchanged

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JNGE label Short Jump if first operand is Not Greater and Not Equal to
second operand (as set by CMP instruction). Signed.

Algorithm:
if SF <> OF then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 2
CMP AL, 3
JNGE label1
PRINT 'AL >= 3.'
JMP exit
label1:
PRINT 'Al < 3.'
exit:
RET

C Z S O P A

unchanged

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JNL label Short Jump if first operand is Not Less then second operand
(as set by CMP instruction). Signed.

Algorithm:
if SF = OF then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 2
CMP AL, -3
JNL label1
PRINT 'AL < -3.'
JMP exit
label1:
PRINT 'Al >= -3.'
exit:
RET

C Z S O P A

unchanged

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JNLE label Short Jump if first operand is Not Less and Not Equal to
second operand (as set by CMP instruction). Signed.

Algorithm:
if (SF = OF) and (ZF = 0) then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 2
CMP AL, -3
JNLE label1
PRINT 'AL <= -3.'
JMP exit
label1:
PRINT 'Al > -3.'
exit:
RET

C Z S O P A

unchanged

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JNO label Short Jump if Not Overflow.

Algorithm:
if OF = 0 then jump
Example:
; -5 - 2 = -7 (inside -128..127)
; the result of SUB is correct,
; so OF = 0:

include '[Link]'
#make_COM#
ORG 100h
MOV AL, -5
SUB AL, 2 ; AL = 0F9h (-7)
JNO label1
PRINT 'overflow!'
JMP exit
label1:
PRINT 'no overflow.'
exit:

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Complete Instruction set - 8086

RET

C Z S O P A

unchanged

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JNP label Short Jump if No Parity (odd). Only 8 low bits of result are
checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:
if PF = 0 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags.
JNP label1
PRINT 'parity even.'
JMP exit
label1:
PRINT 'parity odd.'
exit:
RET

C Z S O P A

unchanged

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JNS label Short Jump if Not Signed (if positive). Set by CMP, SUB,
ADD, TEST, AND, OR, XOR instructions.

Algorithm:
if SF = 0 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags.
JNS label1
PRINT 'signed.'
JMP exit
label1:
PRINT 'not signed.'
exit:
RET

C Z S O P A

unchanged

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JNZ label Short Jump if Not Zero (not equal). Set by CMP, SUB, ADD,
TEST, AND, OR, XOR instructions.

Algorithm:
if ZF = 0 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags.
JNZ label1
PRINT 'zero.'
JMP exit
label1:
PRINT 'not zero.'
exit:
RET

C Z S O P A

unchanged

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JO label Short Jump if Overflow.

Algorithm:
if OF = 1 then jump
Example:
; -5 - 127 = -132 (not in -128..127)
; the result of SUB is wrong (124),
; so OF = 1 is set:

include '[Link]'
#make_COM#
org 100h
MOV AL, -5
SUB AL, 127 ; AL = 7Ch (124)
JO label1
PRINT 'no overflow.'
JMP exit
label1:
PRINT 'overflow!'
exit:

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RET

C Z S O P A

unchanged

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JP label Short Jump if Parity (even). Only 8 low bits of result are
checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:
if PF = 1 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 00000101b ; AL = 5
OR AL, 0 ; just set flags.
JP label1
PRINT 'parity odd.'
JMP exit
label1:
PRINT 'parity even.'
exit:
RET

C Z S O P A

unchanged

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JPE label Short Jump if Parity Even. Only 8 low bits of result are
checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:
if PF = 1 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 00000101b ; AL = 5
OR AL, 0 ; just set flags.
JPE label1
PRINT 'parity odd.'
JMP exit
label1:
PRINT 'parity even.'
exit:
RET

C Z S O P A

unchanged

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JPO label Short Jump if Parity Odd. Only 8 low bits of result are
checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:
if PF = 0 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags.
JPO label1
PRINT 'parity even.'
JMP exit
label1:
PRINT 'parity odd.'
exit:
RET

C Z S O P A

unchanged

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JS label Short Jump if Signed (if negative). Set by CMP, SUB, ADD,
TEST, AND, OR, XOR instructions.

Algorithm:
if SF = 1 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 10000000b ; AL = -128
OR AL, 0 ; just set flags.
JS label1
PRINT 'not signed.'
JMP exit
label1:
PRINT 'signed.'
exit:
RET

C Z S O P A

unchanged

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JZ label Short Jump if Zero (equal). Set by CMP, SUB, ADD, TEST,
AND, OR, XOR instructions.

Algorithm:
if ZF = 1 then jump
Example:
include '[Link]'
#make_COM#
ORG 100h
MOV AL, 5
CMP AL, 5
JZ label1
PRINT 'AL is not equal to 5.'
JMP exit
label1:
PRINT 'AL is equal to 5.'
exit:
RET

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Prepared by uttam mande

Complete Instruction set - 8086

Load AH from 8 low bits of Flags register.

Algorithm:
AH = flags register

AH bit: 7 6 5 4 3 2 1 0
No
LAHF
operands [SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
bits 1, 3, 5 are reserved.

C Z S O P A

unchanged

Load memory double word into word register and DS.

Algorithm:
REG = first word
DS = second word
REG,
LDS
memory
Example:

#make_COM#
ORG 100h

Prepared by uttam mande

Complete Instruction set - 8086

LDS AX, m

RET

m DW 1234h
DW 5678h

END

AX is set to 1234h, DS is set to 5678h.

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Load Effective Address.

Algorithm:
REG = address of memory (offset)

Generally this instruction is replaced by MOV when

assembling when possible.

Example:

#make_COM#
ORG 100h
REG,
LEA
memory

LEA AX, m

RET

m DW 1234h

END

AX is set to: 0104h.

Prepared by uttam mande

Complete Instruction set - 8086

LEA instruction takes 3 bytes, RET takes 1 byte, we start at

100h, so the address of 'm' is 104h.

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

LES REG, Load memory double word into word register and ES.
memory
Algorithm:
REG = first word
ES = second word

Example:

#make_COM#
ORG 100h

LES AX, m

RET

m DW 1234h
DW 5678h

END

AX is set to 1234h, ES is set to 5678h.

Prepared by uttam mande

Complete Instruction set - 8086

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

LODSB No Load byte at DS:[SI] into AL. Update SI.

operands
Algorithm:
AL = DS:[SI]
if DF = 0 then
SI = SI + 1
else
SI = SI - 1
Example:
#make_COM#
ORG 100h

LEA SI, a1
MOV CX, 5
MOV AH, 0Eh

m: LODSB
INT 10h
LOOP m

Prepared by uttam mande

Complete Instruction set - 8086

RET

a1 DB 'H', 'e', 'l', 'l', 'o'

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

LODSW No Load word at DS:[SI] into AX. Update SI.

operands
Algorithm:
AX = DS:[SI]
if DF = 0 then
SI = SI + 2
else
SI = SI - 2
Example:
#make_COM#
ORG 100h

LEA SI, a1
MOV CX, 5

REP LODSW ; finally there will be 555h in AX.

RET

a1 dw 111h, 222h, 333h, 444h, 555h

Prepared by uttam mande

Complete Instruction set - 8086

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Decrease CX, jump to label if CX not zero.

Algorithm:
CX = CX - 1
if CX <> 0 then
jump
else
no jump, continue
Example:
include '[Link]'

LOOP label #make_COM#

ORG 100h
MOV CX, 5
label1:
PRINTN 'loop!'
LOOP label1
RET

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

LOOPE label Decrease CX, jump to label if CX not zero and Equal (ZF =
1).

Algorithm:
CX = CX - 1
if (CX <> 0) and (ZF = 1) then
jump
else
no jump, continue
Example:
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255
; on third loop (100+100+100),
; so loop will exit.

include '[Link]'
#make_COM#
ORG 100h
MOV AX, 0
MOV CX, 5
label1:

Prepared by uttam mande

Complete Instruction set - 8086

PUTC '*'
ADD AX, 100
CMP AH, 0
LOOPE label1
RET

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

LOOPN label Decrease CX, jump to label if CX not zero and Not Equal (ZF
E = 0).

Algorithm:
CX = CX - 1
if (CX <> 0) and (ZF = 0) then
jump
else
no jump, continue
Example:
; Loop until '7' is found,
; or 5 times.

include '[Link]'
#make_COM#
ORG 100h
MOV SI, 0
MOV CX, 5
label1:
PUTC '*'
MOV AL, v1[SI]

Prepared by uttam mande

Complete Instruction set - 8086

INC SI ; next byte (SI=SI+1).

CMP AL, 7
LOOPNE label1
RET
v1 db 9, 8, 7, 6, 5

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

LOOPN label Decrease CX, jump to label if CX not zero and ZF = 0.

Z
Algorithm:
CX = CX - 1
if (CX <> 0) and (ZF = 0) then
jump
else
no jump, continue
Example:
; Loop until '7' is found,
; or 5 times.

include '[Link]'
#make_COM#
ORG 100h
MOV SI, 0
MOV CX, 5
label1:
PUTC '*'
MOV AL, v1[SI]

Prepared by uttam mande

Complete Instruction set - 8086

INC SI ; next byte (SI=SI+1).

CMP AL, 7
LOOPNZ label1
RET
v1 db 9, 8, 7, 6, 5

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

LOOPZ label Decrease CX, jump to label if CX not zero and ZF = 1.

Algorithm:
CX = CX - 1
if (CX <> 0) and (ZF = 1) then
jump
else
no jump, continue
Example:
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255
; on third loop (100+100+100),
; so loop will exit.

include '[Link]'
#make_COM#
ORG 100h
MOV AX, 0
MOV CX, 5
label1:

Prepared by uttam mande

Complete Instruction set - 8086

PUTC '*'
ADD AX, 100
CMP AH, 0
LOOPZ label1
RET

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

MOV REG, Copy operand2 to operand1.

memory
memory, The MOV instruction cannot:
REG
REG, REG set the value of the CS and IP registers.
memory, copy value of one segment register to another segment
immediate register (should copy to general register first).
REG,
immediate copy immediate value to segment register (should copy to
general register first).
SREG,
memory
Algorithm:
memory,
SREG operand1 = operand2
REG, SREG
SREG, REG Example:
#make_COM#
ORG 100h
MOV AX, 0B800h ; set AX = B800h (VGA memory).
MOV DS, AX ; copy value of AX to DS.
MOV CL, 'A' ; CL = 41h (ASCII code).
MOV CH, 01011111b ; CL = color attribute.
MOV BX, 15Eh ; BX = position on screen.
MOV [BX], CX ; w.[0B800h:015Eh] = CX.
RET ; returns to operating system.

Prepared by uttam mande

Complete Instruction set - 8086

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

MOVSB No Copy byte at DS:[SI] to ES:[DI]. Update SI and DI.

operands
Algorithm:
ES:[DI] = DS:[SI]
if DF = 0 then
SI = SI + 1
DI = DI + 1
else
SI = SI - 1
DI = DI - 1
Example:
#make_COM#
ORG 100h

LEA SI, a1
LEA DI, a2
MOV CX, 5
REP MOVSB

RET

Prepared by uttam mande

Complete Instruction set - 8086

a1 DB 1,2,3,4,5
a2 DB 5 DUP(0)

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

MOVS No Copy word at DS:[SI] to ES:[DI]. Update SI and DI.

W operands
Algorithm:
ES:[DI] = DS:[SI]
if DF = 0 then
SI = SI + 2
DI = DI + 2
else
SI = SI - 2
DI = DI - 2
Example:
#make_COM#
ORG 100h

LEA SI, a1
LEA DI, a2
MOV CX, 5
REP MOVSW

RET

Prepared by uttam mande

Complete Instruction set - 8086

a1 DW 1,2,3,4,5
a2 DW 5 DUP(0)

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Unsigned multiply.

Algorithm:
when operand is a byte:
AX = AL * operand.
when operand is a word:
(DX AX) = AX * operand.
Example:
REG
MUL memory MOV AL, 200 ; AL = 0C8h
MOV BL, 4
MUL BL ; AX = 0320h (800)
RET

C Z S O P A

r ? ? r ? ?

CF=OF=0 when high section of the result is zero.  

NEG REG Negate. Makes operand negative (two's complement).

memory
Algorithm:
Invert all bits of the operand
Add 1 to inverted operand
Example:

Prepared by uttam mande

Complete Instruction set - 8086

MOV AL, 5 ; AL = 05h

NEG AL ; AL = 0FBh (-5)
NEG AL ; AL = 05h (5)
RET

C Z S O P A

r r r r r r

Prepared by uttam mande

Complete Instruction set - 8086

No Operation.

Algorithm:
Do nothing
Example:
; do nothing, 3 times:
NOP
No
NOP
operands NOP
NOP
RET

C Z S O P A

unchanged

NOT REG Invert each bit of the operand.

memory
Algorithm:
if bit is 1 turn it to 0.
if bit is 0 turn it to 1.
Example:
MOV AL, 00011011b

Prepared by uttam mande

Complete Instruction set - 8086

NOT AL ; AL = 11100100b
RET

C Z S O P A

unchanged

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Complete Instruction set - 8086

Logical OR between all bits of two operands. Result is

stored in first operand.

These rules apply:

1 OR 1 = 1
1 OR 0 = 1
REG, 0 OR 1 = 1
memory 0 OR 0 = 0
memory,
REG
OR REG, REG Example:
memory,
immediate MOV AL, 'A' ; AL = 01000001b
REG,
OR AL, 00100000b ; AL = 01100001b ('a')
immediate
RET

C Z S O P A

0 r r 0 r ?

OUT [Link], AL Output from AL or AX to port.

[Link], AX First operand is a port number. If required to access port
DX, AL number over 255 - DX register should be used.
DX, AX
Example:
MOV AX, 0FFFh ; Turn on all

Prepared by uttam mande

Complete Instruction set - 8086

OUT 4, AX ; traffic lights.

MOV AL, 100b ; Turn on the third

OUT 7, AL ; magnet of the stepper-motor.

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Get 16 bit value from the stack.

Algorithm:
operand = SS:[SP] (top of the stack)
SP = SP + 2

Example:
REG
MOV AX, 1234h
POP SREG
memory PUSH AX
POP DX ; DX = 1234h
RET

C Z S O P A

unchanged

POPA No Pop all general purpose registers DI, SI, BP, SP, BX, DX, CX,
operands AX from the stack.
SP value is ignored, it is Popped but not set to SP register).

Note: this instruction works only on 80186 CPU and later!

Algorithm:
POP DI

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Complete Instruction set - 8086

POP SI
POP BP
POP xx (SP value ignored)
POP BX
POP DX
POP CX
POP AX

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Get flags register from the stack.

Algorithm:
flags = SS:[SP] (top of the stack)
No SP = SP + 2
POPF
operands
C Z S O P A

popped

PUSH REG Store 16 bit value in the stack.

SREG
memory Note: PUSH immediate works only on 80186 CPU and later!
immediate
Algorithm:
SP = SP - 2
SS:[SP] (top of the stack) = operand

Example:
MOV AX, 1234h
PUSH AX
POP DX ; DX = 1234h
RET

Prepared by uttam mande

Complete Instruction set - 8086

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Push all general purpose registers AX, CX, DX, BX, SP, BP,
SI, DI in the stack.
Original value of SP register (before PUSHA) is used.

Note: this instruction works only on 80186 CPU and later!

Algorithm:
PUSH AX
PUSH CX
PUSH DX
No
PUSHA PUSH BX
operands
PUSH SP
PUSH BP
PUSH SI
PUSH DI

C Z S O P A

unchanged

PUSHF No Store flags register in the stack.

operands
Algorithm:
SP = SP - 2

Prepared by uttam mande

Complete Instruction set - 8086

SS:[SP] (top of the stack) = flags

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Rotate operand1 left through Carry Flag. The number of

rotates is set by operand2.
When immediate is greater then 1, assembler generates
several RCL xx, 1 instructions because 8086 has machine
code only for this instruction (the same principle works for
all other shift/rotate instructions).

Algorithm:
memory, shift all bits left, the bit that goes off is set to CF and
immediate previous value of CF is inserted to the right-most position.
REG,
immediate
RCL Example:
memory, STC ; set carry (CF=1).
CL
REG, CL MOV AL, 1Ch ; AL = 00011100b
RCL AL, 1 ; AL = 00111001b, CF=0.
RET

C O

r r

OF=0 if first operand keeps original sign.  

RCR memory, Rotate operand1 right through Carry Flag. The number of
immediate rotates is set by operand2.
REG,
immediate Algorithm:

Prepared by uttam mande

Complete Instruction set - 8086

shift all bits right, the bit that goes off is set to CF and
previous value of CF is inserted to the left-most position.

Example:
STC ; set carry (CF=1).
memory, MOV AL, 1Ch ; AL = 00011100b
CL
REG, CL RCR AL, 1 ; AL = 10001110b, CF=0.
RET

C O

r r

OF=0 if first operand keeps original sign.  

Prepared by uttam mande

Complete Instruction set - 8086

Repeat following MOVSB, MOVSW, LODSB, LODSW, STOSB,

STOSW instructions CX times.

Algorithm:

check_cx:

if CX <> 0 then
do following chain instruction
chain
REP CX = CX - 1
instruction
go back to check_cx
else
exit from REP cycle

Repeat following CMPSB, CMPSW, SCASB, SCASW

instructions while ZF = 1 (result is Equal), maximum CX
times.
chain
REPE
instruction Algorithm:

check_cx:

Prepared by uttam mande

Complete Instruction set - 8086

if CX <> 0 then
do following chain instruction
CX = CX - 1
if ZF = 1 then:
go back to check_cx
else
exit from REPE cycle
else
exit from REPE cycle
Example:
see [Link] in Samples.

Prepared by uttam mande

Complete Instruction set - 8086

Repeat following CMPSB, CMPSW, SCASB, SCASW

instructions while ZF = 0 (result is Not Equal), maximum CX
times.

Algorithm:

check_cx:

if CX <> 0 then
do following chain instruction
CX = CX - 1
chain if ZF = 0 then:
REPNE
instruction
go back to check_cx
else
exit from REPNE cycle
else
exit from REPNE cycle

Repeat following CMPSB, CMPSW, SCASB, SCASW

chain
REPNZ instructions while ZF = 0 (result is Not Zero), maximum CX
instruction
times.

Prepared by uttam mande

Complete Instruction set - 8086

Algorithm:

check_cx:

if CX <> 0 then
do following chain instruction
CX = CX - 1
if ZF = 0 then:
go back to check_cx
else
exit from REPNZ cycle
else
exit from REPNZ cycle

Prepared by uttam mande

Complete Instruction set - 8086

Repeat following CMPSB, CMPSW, SCASB, SCASW

instructions while ZF = 1 (result is Zero), maximum CX
times.

Algorithm:

check_cx:

if CX <> 0 then
do following chain instruction
CX = CX - 1
chain if ZF = 1 then:
REPZ
instruction
go back to check_cx
else
exit from REPZ cycle
else
exit from REPZ cycle

RET No Return from near procedure.

operands
or even

Prepared by uttam mande

Complete Instruction set - 8086

immediate Algorithm:
Pop from stack:
IP
if immediate operand is present: SP = SP + operand
Example:
#make_COM#
ORG 100h ; for COM file.

CALL p1

ADD AX, 1

RET ; return to OS.

p1 PROC ; procedure declaration.

MOV AX, 1234h
RET ; return to caller.
p1 ENDP

C Z S O P A

Prepared by uttam mande

Complete Instruction set - 8086

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Return from Far procedure.

Algorithm:
Pop from stack:

No IP
operands CS
RETF
or even
immediate if immediate operand is present: SP = SP + operand

C Z S O P A

unchanged

ROL memory, Rotate operand1 left. The number of rotates is set by

immediate operand2.
REG,
immediate Algorithm:

memory, shift all bits left, the bit that goes off is set to CF and the
CL same bit is inserted to the right-most position.
REG, CL Example:
MOV AL, 1Ch ; AL = 00011100b
ROL AL, 1 ; AL = 00111000b, CF=0.
RET

C O

Prepared by uttam mande

Complete Instruction set - 8086

r r

OF=0 if first operand keeps original sign.  

Prepared by uttam mande

Complete Instruction set - 8086

Rotate operand1 right. The number of rotates is set by

operand2.

Algorithm:
shift all bits right, the bit that goes off is set to CF and the
memory, same bit is inserted to the left-most position.
immediate
REG, Example:
immediate
ROR MOV AL, 1Ch ; AL = 00011100b
memory, ROR AL, 1 ; AL = 00001110b, CF=0.
CL
REG, CL RET

C O

r r

OF=0 if first operand keeps original sign.  

SAHF No Store AH register into low 8 bits of Flags register.

operands
Algorithm:
flags register = AH

AH bit: 7 6 5 4 3 2 1 0
[SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
bits 1, 3, 5 are reserved.

Prepared by uttam mande

Complete Instruction set - 8086

C Z S O P A

r r r r r r

Prepared by uttam mande

Complete Instruction set - 8086

Shift Arithmetic operand1 Left. The number of shifts is set

by operand2.

Algorithm:
Shift all bits left, the bit that goes off is set to CF.
memory,
immediate Zero bit is inserted to the right-most position.
REG, Example:
immediate
SAL MOV AL, 0E0h ; AL = 11100000b
memory,
SAL AL, 1 ; AL = 11000000b, CF=1.
CL
REG, CL RET

C O

r r

OF=0 if first operand keeps original sign.  

SAR memory, Shift Arithmetic operand1 Right. The number of shifts is set
immediate by operand2.
REG,
immediate Algorithm:

memory, Shift all bits right, the bit that goes off is set to CF.
CL The sign bit that is inserted to the left-most position has the
REG, CL same value as before shift.
Example:

Prepared by uttam mande

Complete Instruction set - 8086

MOV AL, 0E0h ; AL = 11100000b

SAR AL, 1 ; AL = 11110000b, CF=0.

MOV BL, 4Ch ; BL = 01001100b

SAR BL, 1 ; BL = 00100110b, CF=0.

RET

C O

r r

OF=0 if first operand keeps original sign.  

Prepared by uttam mande

Complete Instruction set - 8086

Subtract with Borrow.

Algorithm:

operand1 = operand1 - operand2 - CF

REG, Example:
memory
memory, STC
REG
MOV AL, 5
SBB REG, REG
memory, SBB AL, 3 ; AL = 5 - 3 - 1 = 1
immediate
REG,
immediate RET

C Z S O P A

r r r r r r

SCASB No Compare bytes: AL from ES:[DI].

operands
Algorithm:
ES:[DI] - AL
set flags according to result:
OF, SF, ZF, AF, PF, CF
if DF = 0 then

Prepared by uttam mande

Complete Instruction set - 8086

DI = DI + 1
else
DI = DI - 1

C Z S O P A

r r r r r r

Prepared by uttam mande

Complete Instruction set - 8086

Compare words: AX from ES:[DI].

Algorithm:
ES:[DI] - AX
set flags according to result:
OF, SF, ZF, AF, PF, CF
if DF = 0 then
No
SCASW DI = DI + 2
operands
else
DI = DI - 2

C Z S O P A

r r r r r r

SHL memory, Shift operand1 Left. The number of shifts is set by

immediate operand2.
REG,
immediate Algorithm:

memory, Shift all bits left, the bit that goes off is set to CF.
CL Zero bit is inserted to the right-most position.
REG, CL
Example:
MOV AL, 11100000b

Prepared by uttam mande

Complete Instruction set - 8086

SHL AL, 1 ; AL = 11000000b, CF=1.

RET

C O

r r

OF=0 if first operand keeps original sign.  

Prepared by uttam mande

Complete Instruction set - 8086

Shift operand1 Right. The number of shifts is set by

operand2.

Algorithm:
Shift all bits right, the bit that goes off is set to CF.

memory, Zero bit is inserted to the left-most position.

immediate
Example:
REG,
immediate MOV AL, 00000111b
SHR
memory, SHR AL, 1 ; AL = 00000011b, CF=1.
CL
REG, CL
RET

C O

r r

OF=0 if first operand keeps original sign.  

STC No Set Carry flag.

operands
Algorithm:

CF = 1

Prepared by uttam mande

Complete Instruction set - 8086

Prepared by uttam mande

Complete Instruction set - 8086

Set Direction flag. SI and DI will be decremented by chain

instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB,
MOVSW, STOSB, STOSW.

Algorithm:
No
STD DF = 1
operands
D

Set Interrupt enable flag. This enables hardware interrupts.

Algorithm:

No IF = 1
STI
operands
I

STOSB No Store byte in AL into ES:[DI]. Update SI.

operands
Algorithm:
ES:[DI] = AL

Prepared by uttam mande

Complete Instruction set - 8086

if DF = 0 then
DI = DI + 1
else
DI = DI - 1
Example:
#make_COM#
ORG 100h

LEA DI, a1
MOV AL, 12h
MOV CX, 5

REP STOSB

RET

a1 DB 5 dup(0)

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Prepared by uttam mande

Complete Instruction set - 8086

STOSW No Store word in AX into ES:[DI]. Update SI.

operands
Algorithm:
ES:[DI] = AX
if DF = 0 then
DI = DI + 2
else
DI = DI - 2
Example:
#make_COM#
ORG 100h

LEA DI, a1
MOV AX, 1234h
MOV CX, 5

REP STOSW

RET

Prepared by uttam mande

Complete Instruction set - 8086

a1 DW 5 dup(0)

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Subtract.

Algorithm:

operand1 = operand1 - operand2

REG,
memory Example:
memory,
REG MOV AL, 5
SUB REG, REG SUB AL, 1 ; AL = 4
memory,
immediate
REG,
RET
immediate
C Z S O P A

r r r r r r

Logical AND between all bits of two operands for flags only.
REG, These flags are effected: ZF, SF, PF. Result is not stored
memory anywhere.
memory,
REG These rules apply:
TEST REG, REG
memory, 1 AND 1 = 1
immediate 1 AND 0 = 0
REG, 0 AND 1 = 0
immediate 0 AND 0 = 0

Prepared by uttam mande

Complete Instruction set - 8086

Example:
MOV AL, 00000101b
TEST AL, 1 ; ZF = 0.
TEST AL, 10b ; ZF = 1.
RET

C Z S O P

0 r r 0 r

Prepared by uttam mande

Complete Instruction set - 8086

Exchange values of two operands.

Algorithm:

operand1 < - > operand2

Example:

REG, MOV AL, 5

memory
MOV AH, 2
XCHG memory,
REG XCHG AL, AH ; AL = 2, AH = 5
REG, REG
XCHG AL, AH ; AL = 5, AH = 2
RET

C Z S O P A

unchanged

XLATB No Translate byte from table.

operands Copy value of memory byte at DS:[BX + unsigned AL] to AL
register.

Algorithm:

AL = DS:[BX + unsigned AL]

Example:

Prepared by uttam mande

Complete Instruction set - 8086

#make_COM#
ORG 100h
LEA BX, dat
MOV AL, 2
XLATB ; AL = 33h

RET

dat DB 11h, 22h, 33h, 44h, 55h

C Z S O P A

unchanged

Prepared by uttam mande

Complete Instruction set - 8086

Logical XOR (Exclusive OR) between all bits of two

operands. Result is stored in first operand.

These rules apply:

1 XOR 1 = 0
REG, 1 XOR 0 = 1
memory 0 XOR 1 = 1
memory, 0 XOR 0 = 0
REG
XOR REG, REG
memory, Example:
immediate MOV AL, 00000111b
REG,
immediate XOR AL, 00000010b ; AL = 00000101b
RET

C Z S O P A

0 r r 0 r ?

Prepared by uttam mande