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Advanced Techniques in Image Processing

The document discusses research papers related to image processing, communication, digital signal processing, and VLSI. Some key topics covered include 3D segmentation in brain MR images, edge detection algorithms, image compression techniques, space-time block coded spatial modulation for wireless communication, channel coding for high-speed links, QR decomposition for MIMO receivers, GF(2^128) multiplier implementation on FPGA, low-power multiplier architectures, and AES encryption core design. The papers propose and evaluate various methods across these fields.

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VigneshInfotech
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8 views2 pages

Advanced Techniques in Image Processing

The document discusses research papers related to image processing, communication, digital signal processing, and VLSI. Some key topics covered include 3D segmentation in brain MR images, edge detection algorithms, image compression techniques, space-time block coded spatial modulation for wireless communication, channel coding for high-speed links, QR decomposition for MIMO receivers, GF(2^128) multiplier implementation on FPGA, low-power multiplier architectures, and AES encryption core design. The papers propose and evaluate various methods across these fields.

Uploaded by

VigneshInfotech
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as XLS, PDF, TXT or read online on Scribd

IMAGE PROCESSING

A hybrid geometricstatistical deformable model for automated 3-d segmentation in brain MR


Intelligent thermo graphic diagnostic applied to surge arresters a new approach
Morphological Background Detection And Enhancement Of Images With Poor Lighting
High-Fidelity Data Embedding For Image Annotation
LowBit-Rate Image Compression Via Adaptive Down-sampling And Constrained Least Squares
Real time artifact-free image upscaling
Tacking and activity recognition through consensus in distributed camera networks.
Cell-Edge Detection Method Based on Canny Algorithm and Mathematical Morphology
DOW-Canny: An Improvised Version Of Canny Edge Detector.
Image Quality Assessment Based on Multiscale Geometric Analysis
Morphological Background detection and enhancement of images with poor lighting
Region Based Adaptive Contrast Enhancement of Medical X-Ray Images
Fast cartoon + texture image filters
simplified novel method for edge detection in digital images

bm3d frames and variational image deblurring

Boundary Detection in Medical Images Using Edge Following Algorithm Based on Intensity Gradient an
Enhancement of Color Images by Scaling the DCT Coefficients

COMMUNICATION

Space-Time Block Coded Spatial Modulation


Rayleigh Fading Networks: A Cross-Layer Way .
Channel coding for high-speed links: a systematic Look at code performance and system simu
Finite-precision analysis of de-mappers and decoders For DPC-coded m-QAM systems.
Semi-analytic BER for PSK
Symbol-Level Synchronization and LDPC Code Design for Insertion/Deletion Channels

LDPC Code Design for Insertion/Deletion Channels

PERFORMANCE OF BLUETOOTH SYSTEM USING OPTIMIZED DIFFERENTIAL GFSK DEMODULATO


on performance improvement of wireless push systems via smart antennas
On Optimal Front-End Filter for Single-User Detection in IR-UWB Systems
Diversity Gain and Outage Probability for MIMO Free-Space Optical Links with Misalignment

Asymptotic Capacity of Large Relay Networks with Conferencing Links

DIGITAL SIGNAL PROCESSING


A new delay less sub-band Adaptive filtering algorithm for active noise control systems
Sampling theorems for signals from the union of finite-dimensional linear subspaces.
QR Decomposition-Based Matrix Inversion for High Performance Embedded MIMO Receivers

VLSI
The Design And FPGA Implementation Of Gf(2^128 ) Multiplier For Ghash.
BZ-FAD: A Low-Power Low -Area Multiplier Based on Shift-and-Add Architecture
low-power and area-efficient carry select adder

A New VLSI Architecture of Parallel MultiplierAccumulator Based on Radix-2 Modified Booth Algorithm
A Compact AES Encryption Core on Xilinx FPGA
DCT and IDCT Implementations on Different FPGA Technologies
FAULT SECURE ENCODER AND DECODER FOR NANO MEMORY APPLICATIONS

Power Optimization of Linear Feedback Shift Register (LFSR) for Low Power BIST
ECOMIPS: An Economic MIPS CPU Design on FPGA
Design and Implement of FFT Processor for OFDMA System Using FPGA

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