[Link] : hspice.

ch16

1 Thu Jul 23 19:10:43 1998

Chapter 15
Introducing MOSFET
A MOSFET is defined by the MOSFET model and element parameters, and two
submodels selected by the CAPOP and ACM model parameters. The CAPOP
model parameter specifies the model for the MOSFET gate capacitances. The
ACM (Area Calculation Method) parameter selects the type of diode model to
be used for the MOSFET bulk diodes. Each of these submodels has associated
parameters that define the characteristics of the gate capacitances and bulk
diodes.
MOSFET models are either p-channel or n-channel models; they are classified
according to level, such as Level 1 or Level 50.
This chapter covers the design model and simulation aspects of MOSFET
models, parameters of each model level, and associated equations. MOSFET
diode and MOSFET capacitor model parameters and equations are also
described. For information about individual models and their parameters, refer
to Chapter 16, Selecting a MOSFET Model.
The following topics are covered in this chapter:
Understanding MOSFET Models
Selecting Models
Using Nonplanar and Planar Technologies
Using a MOSFET Diode Model
Using MOS Diode Equations
Using Common Threshold Voltage Equations
Performing MOSFET Impact Ionization
Using Noise Models
Using Temperature Parameters and Equations

Star-Hspice Manual, Release 1998.2

15-1

[Link] : hspice.ch16

2 Thu Jul 23 19:10:43 1998

Understanding MOSFET Models

Introducing MOSFET

Understanding MOSFET Models

The selection of the MOSFET model type for use in analysis usually depends on
the electrical parameters critical to the application. Level 1 models are most
often used for simulation of large digital circuits where detailed analog models
are not needed. Level 1 models offer low simulation time and a relatively high
level of accuracy with regard to timing calculations. When precision is required,
as for analog data acquisition circuitry, more detailed models, such as the Level
6 IDS model or one of the BSIM models (Level 13, 39, or 49) can be used.
For precision modeling of integrated circuits, the BSIM models take into
account the variation of model parameters as a function of sensitivity of the
geometric parameters. The BSIM models also reference a MOS charge
conservation model for precision modeling of MOS capacitor effects.
Use the SOSFET model (Level 27) to model silicon-on-sapphire MOS devices.
You can include photocurrent effects at this level.
Use Levels 5 and Level 38 for depletion MOS devices.
Level 2 models take into account bulk charge effects on current. Level 3 models
require less simulation time and provides as much accuracy as Level 2 and have
a greater tendency to converge. Level 6 models are compatible with models
originally developed with ASPEC. Level 6 can be used to model ion-implanted
devices.

15-2

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

3 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

Selecting Models
A MOS transistor is described by use of an element statement and a .MODEL
statement. The element statement defines the connectivity of the transistor and
references the .MODEL statement. The .MODEL statement specifies either an
n- or p-channel device, the level of the model, and a number of user-selectable
model parameters.
Example

M3 3 2 1 0 PCH <parameters>
.MODEL PCH PMOS LEVEL=13 <parameters>
The above example specifies a PMOS MOSFET with a model reference name,
PCH. The transistor is modeled using the Level 13 BSIM model. The parameters
are selected from the model parameter lists in this chapter.

MOSFET Model Levels

MOSFET models consist of client private and public models selected by the
parameter .MODEL statement LEVEL parameter. New models are constantly
being added to HSPICE.
Not all MOSFET models are available in the PC version of HSPICE, Table 151 shows what is available for PC users. Models listed are either on all platforms,
including PC, as indicated in the third column, or they are available on all
platforms except the PC, as indicated in the last column.

Level

MOSFET Model Description

All
Platforms
including
PC

Schichman-Hodges model

MOS2 Grove-Frohman model (SPICE 2G)

MOS3 empirical model (SPICE 2G)

Grove-Frohman: Level 2 model derived from SPICE

2E.3

Star-Hspice Manual, Release 1998.2

All
Platforms
except PC

15-3

[Link] : hspice.ch16

4 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

All
Platforms
including
PC

All
Platforms
except PC

Level

MOSFET Model Description

AMI-ASPEC depletion and enhancement (TaylorHuang)

Lattin-Jenkins-Grove (ASPEC style parasitics)

Lattin-Jenkins-Grove (SPICE style parasitics)

advanced Level 2 model

9 **

AMD

10 **

AMD

11

Fluke-Mosaid model

12 **

CASMOS model (GTE style)

13

BSIM model

14 **

Siemens Level=4

15

user-defined model based on Level 3

16

not used

17

Cypress model

18 **

Sierra 1

19 ***

Dallas Semiconductor model

20 **

GE-CRD FRANZ

21 **

STC-ITT

22 **

CASMOS (GEC style)

23

Siliconix

24 **

GE-Intersil advanced

25 **

CASMOS (Rutherford)

26 **

Sierra 2

15-4

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

5 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

All
Platforms
including
PC

All
Platforms
except PC

Level

MOSFET Model Description

27

SOSFET

28

BSIM derivative; Meta-software proprietary model

29 ***

not used

30 ***

VTI

31***

Motorola

32 ***

AMD

33 ***

National Semiconductor

34

(EPFL) not used

X*

35 **

Siemens

36 ***

Sharp

37 ***

TI

38

IDS: Cypress depletion model

39

BSIM2

46 ***

SGS-Thomson MOS Level 3

47

BSIM3 Version 2.0

49

BSIM3 Version 3

50

Philips MOS9

* not officially released

** equations are proprietary no documentation will be provided
*** requires a license and equations are proprietary no documentation will be provided

MOSFET Capacitor Selection

The MOSFET capacitance model parameter, CAPOP, is associated with the
MOS model. Depending on the value of CAPOP, different capacitor models are
used to model the MOS gate capacitance, that is, the gate-to-drain capacitance,

Star-Hspice Manual, Release 1998.2

15-5

[Link] : hspice.ch16

6 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

the gate-to-source capacitance, and the gate-to-bulk capacitance. CAPOP allows

for the selection of several versions of the Meyer and charge conservation
model.
Some of the capacitor models are tied to specific DC models; they are stated as
such. Others are for general use by any DC model.
CAPOP=0

SPICE original Meyer model (general)

CAPOP=1

modified Meyer model (general)

CAPOP=2

parameterized modified Meyer model (general default)

CAPOP=3

parameterized Modified Meyer model with Simpson

integration (general)

CAPOP=4

charge conservation model (analytic), Levels 2, 3, 6, 7, 13,

28, and 39 only

CAPOP=5

no capacitor model

CAPOP=6

AMI capacitor model (Level 5)

CAPOP=9

charge conservation model (Level 3)

CAPOP=13

generic BSIM model (Default for 13, 28, 39)

CAPOP=11

Ward-Dutton model specialized (Level 2)

CAPOP=12

Ward-Dutton model specialized (Level 3)

CAPOP=39

BSIM 2 Capacitance Model (Level 39)

CAPOP=4 selects the recommended charge-conserving model (from among

CAPOP=11, 12, or 13) for the given DC model.
Table 15-1: CAPOP=4 Selections

15-6

MOS Level

Default
CAPOP

CAPOP=4
selects:

11

12

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

7 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

Table 15-1: CAPOP=4 Selections

MOS Level

Default
CAPOP

CAPOP=4
selects:

13, 28, 39

13

13

others

11

The proprietary models, as well as Level 5, 17, 21, 22, 25, 31, 33, and the SOS
model Level 27, have their own built-in capacitance routines.

MOS Diode Selection

The model parameter ACM (Area Calculation Method), which controls the
geometry of the source and drain diffusions, selects the modeling of the bulk-tosource and bulk-to-drain diodes of the MOSFET model. The diode model
includes the diffusion resistance, capacitance, and DC currents to the substrate.
ACM=0

SPICE model, parameters determined by element areas

ACM=1

ASPEC model, parameters function of element width

ACM=2

META model, combination of ACM=0,1 and provisions for

lightly doped drain technology

ACM=3

Extension of ACM=2 model that deals with stacked devices

(shared source/drains) and source/drain periphery
capacitance along gate edge.

Searching Models as Function of W, L

Model parameters are often the same for MOSFETs having width and length
dimensions within specific ranges. To take advantage of this, create a MOSFET
model for a specific range of width and length, and HSPICE uses the MOSFET
model parameters to select the appropriate model for the given width and length.
The HSPICE automatic model selection program searches a data file for a
MOSFET model with the width and length range specified in the MOSFET
element statement. This model statement is then used in the simulation.

Star-Hspice Manual, Release 1998.2

15-7

[Link] : hspice.ch16

Selecting Models

8 Thu Jul 23 19:10:43 1998

Introducing MOSFET

To search a data file for MOSFET models within a given range of width and
length, provide a root extension for the model reference name (in the .MODEL
statement). Also, you must use the model geometric range parameters LMIN,
LMAX, WMIN, and WMAX. These model parameters give the range of the
physical length and width dimensions to which the MOSFET model applies. For
example, if the model reference name in the element statement is NCH, the
model selection program examines the models with the same root model
reference name NCH, for example, NCH.1, NCH.2 or NCH.A. The model
selection program selects the first MOSFET model statement whose geometric
range parameters include the width and length specified in the associated
MOSFET element statement.
The following example illustrates calling the MOSFET model selection program
from a data file. The model selector program examines the .MODEL statements
that have the model reference names with root extensions NCHAN.2,
NCHAN.3, NCHY.20, and NCHY.50 .
Example

*FILE: [Link] TEST OF MOS MODEL SELECTOR

.OPTION LIST WL SCALE=1U SCALM=1U NOMOD
.OP
V1 1 0 5
V2 2 0 4
V3 3 0 1
V4 4 0 -1
M1 1 2 3 4 NCHAN 10 2
M2 1 2 3 4 NCHAN 10 3
M3 1 2 3 4 NCH 10 4
M4 1 2 3 4 NCHX 10 5
M5 1 2 3 4 NCHY 20 5
M6 1 2 3 4 NCHY 50 5
$$$$$$$ FOR CHANNEL LENGTH SELECTION
.MODEL NCHAN.2 NMOS LEVEL=2 VTO=2.0 UO=800 TOX=500
NSUB=1E15
+
RD=10 RS=10 CAPOP=5

15-8

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

9 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

+
LMIN=1 LMAX=2.5 WMIN=2 WMAX=15
.MODEL NCHAN.3 NMOS LEVEL=2 VTO=2.2 UO=800 TOX=500
NSUB=1E15
+
RD=10 RS=10 CAPOP=5
+
LMIN=2.5 LMAX=3.5 WMIN=2 WMAX=15
$$$$$$$
NO SELECTION FOR CHANNEL LENGTH AND WIDTH
.MODEL NCH NMOS LEVEL=2 VTO=2.3 UO=800 TOX=500
NSUB=1E15
+
RD=10 RS=10 CAPOP=5
$+
LMIN=3.5 LMAX=4.5 WMIN=2 WMAX=15
.MODEL NCHX NMOS LEVEL=2 VTO=2.4 UO=800 TOX=500
NSUB=1E15
+
RD=10 RS=10 CAPOP=5
$+
LMIN=4.5 LMAX=100 WMIN=2 WMAX=15
$$$$$$$ FOR CHANNEL WIDTH SELECTION
.MODEL NCHY.20 NMOS LEVEL=2 VTO=2.5 UO=800 TOX=500
NSUB=1E15
+
RD=10 RS=10 CAPOP=5
+
LMIN=4.5 LMAX=100 WMIN=15 WMAX=30
.MODEL NCHY.50 NMOS LEVEL=2 VTO=2.5 UO=800 TOX=500
NSUB=1E15
+
RD=10 RS=10 CAPOP=5
+
LMIN=4.5 LMAX=100 WMIN=30 WMAX=500
.END

MOSFET Control Options

Specific control options (set in the .OPTIONS statement) used for MOSFET
models include the following. For flag-type options, 0 is unset (off) and 1 is set
(on).
ASPEC

This option uses ASPEC MOSFET model defaults and set

units. Default=0.

BYPASS

This option avoids recomputation of nonlinear functions that

do not change with iterations. Default=0.

Star-Hspice Manual, Release 1998.2

15-9

[Link] : hspice.ch16

10 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

MBYPAS

BYPASS tolerance multiplier. Default=1.

DEFAD

default drain diode area. Default=0.

DEFAS

default source diode area. Default=0.

DEFL

default channel length. Default=1e-4m.

DEFW

default channel width. Default=1e-4m.

DEFNRD

default number of squares for drain resistor. Default=0.

DEFNRS

default number of squares for source resistor. Default=0.

DEFPD

default drain diode periphery. Default=0.

DEFPS

default source diode periphery. Default=0.

GMIN

Pn junction parallel transient conductance. Default=1emho.

12

GMINDC

Pn junction parallel DC conductance. Default=1e-12mho.

SCALE

element scaling factor. Default=1.

SCALM

model scaling factor. Default=1.

WL

This option changes the order of specifying MOS element

VSIZE from the default order, length-width, to width-length.
Default=0.

Override the defaults DEFAD, DEFAS, DEFL, DEFNRD, DEFNRS, DEFPD,

DEFPS, and DEFW in the MOSFET element statement by specifying AD, AS,
L, NRD, NRS, PD, PS, and W, respectively.
Unit Scaling
Units are controlled by the options SCALE and SCALM. SCALE scales element
statement parameters, and SCALM scales model statement parameters. SCALM
also affects the MOSFET gate capacitance and diode model parameters. In this
chapter, scaling only applies to those parameters specified as scaled. If SCALM
is specified as a parameter in a .MODEL statement, it overrides the option
SCALM; in this way, models using different values of SCALM can be used in

15-10

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

11 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

the same simulation. MOSFET parameter scaling follows the same rules as for
other model parameters, for example:
Table 15-2: Model Parameter Scaling
Parameter Units

Parameter Value

meter

multiplied by SCALM

meter2

multiplied by SCALM2

meter-1

divided by SCALM

meter-2

divided by SCALM2

Override global model size scaling for individual MOSFET, diode, and BJT
models that uses the .OPTION SCALM=<val> statement by including
SCALM=<val> in the .MODEL statement. .OPTION SCALM=<val> applies
globally for JFETs, resistors, transmission lines, and all models other than
MOSFET, diode, and BJT models, and cannot be overridden in the model.
Scaling for Level 25 and 33
When using the proprietary Level 25 (Rutherford CASMOS) or Level 33
(National) models, the SCALE and SCALM options are automatically set to 1e6. If you use these models together with other scalable models, however, set the
options, SCALE=1e-6 and SCALM=1e-6, explicitly.
Bypassing Latent Devices
Use the BYPASS (latency) option to decrease simulation time in large designs.
It speeds simulation time by not recalculating currents, capacitances, and
conductances if the voltages at the terminal device nodes have not changed. The
BYPASS option applies to MOSFETs, MESFETs, JFETs, BJTs, and diodes.
Use .OPTION BYPASS to set BYPASS.
BYPASS can result in a reduction in accuracy of the simulation for tightly
coupled circuits such as op-amps, high gain ring oscillators, and so on. Use
.OPTION MBYPAS to set MBYPAS to a smaller value to improve the accuracy
of the results.

Star-Hspice Manual, Release 1998.2

15-11

[Link] : hspice.ch16

12 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

MOSFET Element Syntax

This section describes the MOSFET element syntax.
General form
Mxxx nd ng ns <nb> mname <L=val> <W=val> <AD=val> <AS=val> <PD=val>
<PS=val>
+
<NRD=val> <NRS=val> <RDC=val> <RSC=val> <OFF> <IC=vds, vgs, vbs>
<M=val>
+
<DTEMP=val> <GEO=val> <DELVTO=val>
or
Mxxx nd ng ns <nb> mname lval wval
or
.OPTION WL
Mxxx nd ng ns <nb> mname wval lval

Mxxx

MOSFET element name. The name must begin with an M

followed by up to 15 alphanumeric characters.

ng

gate terminal node name

ns

source terminal node name

nb

bulk terminal node name Can be set by BULK parameter in

model statement.

nd

drain terminal node name

mname

model name reference

Note: If the model name includes a period (.), the HSPICE
automatic model selector does not work properly for that
model. Do not use periods in model names if you intend to
use the automatic model selector.

15-12

channel length. This option overrides DEFL in OPTIONS

statement. Default=DEFL.
Lscaled = L SCALE. The maximum value of Lscaled is
0.1 m.

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

13 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

channel width. This option overrides DEFW in OPTIONS

statement. Default= DEFW.
Wscaled = W SCALE

AD

drain diffusion area. Overrides DEFAD in the OPTIONS

statement. Default=DEFAD only when ACM=0. (See
Using a MOSFET Diode Model for effective ADeff).

AS

source diffusion area. Overrides DEFAS in the OPTIONS

statement. Default=DEFAS only when ACM=0. (See
Using a MOSFET Diode Model for effective ASeff).

PD

perimeter of the drain junction, including the channel edge.

Overrides DEFPD in OPTIONS statement. ACM=0 and
ACM=1 Default=DEFPD. ACM=2, 3 Default=0.0 (See
Using a MOSFET Diode Model).

PS

perimeter of the source junction, including the channel edge.

Overrides DEFPS in OPTIONS statement. ACM=0 and
ACM=1 Default=DEFPD. ACM=2, 3 Default=0.0 (See
Using a MOSFET Diode Model).

NRD

number of squares of drain diffusion for resistance

calculations. Overrides DEFNRD in .OPTIONS statement.
ACM=0 and ACM=1: default=DEFNRD. ACM=2:
default=0.0 (see Using a MOSFET Diode Model).

NRS

number of squares of source diffusion for resistance

calculations. Overrides DEFNRS in .OPTIONS statement.
ACM=0 and ACM=1: default=DEFNRS. ACM=2, 3:
default=0.0 (see Using a MOSFET Diode Model).

RDC

additional drain resistance due to contact resistance. (Units

are ohm;
Default = 0.0)
Note: A value assigned for RDC in the element statement
overrides any value for RDC as a model parameter.

RSC

additional source resistance due to contact resistance. (Units

are ohm; Default=0.0)

Star-Hspice Manual, Release 1998.2

15-13

[Link] : hspice.ch16

14 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

Note: A value assigned for RSC in the element statement

overrides any value for RSC as a model parameter.
OFF

sets the initial condition to OFF for this element in the DC

analysis, or for the first timepoint in the transient analysis.
Default=ON.
Note: This command does not work for depletion devices.

multiple device option. MOSFET channel width, diode

leakage, capacitors, and resistors are altered by this
parameter. Simulates multiple parallel devices. Default=1.0.

vbs

initial condition for the voltage across the external bulk and
source terminals. Overridden by the IC statement.

vds

initial condition for the voltage across the external drain and
source terminals. Overridden by the IC statement.

vgs

initial condition for the voltage across the external gate and
source terminals. Overridden by the IC statement.

DTEMP

device temperature difference from circuit temperature.

Default=0.0.

GEO

source/drain sharing selector for ACM=3. Default=0.0 (see

ACM=3 section).

DELVTO

zero-bias threshold voltage shift. Default=0.0.

Note: SCALE defaults to 1.0 meter. To enter parameter PD=val with units in
microns, for example, set SCALE to 1e-6. Then if PD=5 is entered,
HSPICE sets PD=5e-6 meters, or 5 microns.
Examples

M1 24 2 0 20 TYPE1
M31 2 17 6 10 MODM L=5U W=2U
M31 2 16 6 10 MODM 5U 2U
Or

15-14

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

15 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

.OPTION WL
M31 2 16 6 10 MODM 2U 5U
M1 2 9 3 0 MOD1 L=10U W=5U AD=100P AS=100P PD=40U
PS=40U
M1 2 9 3 0 MOD1 10U 5U 2P 2P
The first example specifies a MOSFET element connected between nodes 24, 2,
0, and 20. It calls a MOSFET model statement which has a model reference
name called TYPE1. The .OPTION WL reverses the order of the width and
length parameters in the MOSFET element statement.
The element statement parameters previously listed are summarized below. You
can specify the geometric parameters, except for M, in the options statements.
Element parameter values always override .OPTION or .MODEL parameter
settings.
Table 15-3: MOSFET Element Parameters
Function

Parameters

geometric

AD, AS, L, M, PD, PS, W

initialization

IC=Vds, Vgs, Vbs, OFF

netlist

Mxxx, nd, ng, ns, nb, mname

resistance

NRD, NRS, RDC, RSC

temperature

DTEMP

Table 15-4: Variables and Constants.

Variable

Definition

cbd

bulk to drain capacitance

cbs

bulk to source capacitance

cbg

gate to bulk capacitance

Star-Hspice Manual, Release 1998.2

15-15

[Link] : hspice.ch16

16 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

Table 15-4: Variables and Constants.

Variable

Definition

cgd

gate to drain capacitance

cgs

gate to source capacitance

frequency

gbd

bulk to drain dynamic conductance

Equation Variables
This section lists the equation variables and constants.
Table 15-5: Equation Variables and Constants
Variable/Quantity

Definition

gbs

bulk to source dynamic conductance

gds

drain to source dynamic conductance controlled by vds

gdb

drain to bulk impact ionization conductance

gm

drain to source dynamic transconductance controlled by vgs

gmbs

drain to source dynamic bulk transconductance controlled by vsb

ibd

bulk to drain DC current

ibs

bulk to source DC current

ids

drain to source DC current

idb

drain to bulk impact ionization current

ind

drain to source equivalent noise circuit

inrd

drain resistor equivalent noise circuit

inrs

source resistor equivalent noise circuit

rd

drain resistance

rs

source resistance

15-16

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

17 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

Table 15-5: Equation Variables and Constants

Variable/Quantity

Definition

vsb

source to bulk voltage

vds

drain to source voltage

vgs

gate to source voltage

t-tnom

si

1.0359e-10F/m dielectric constant of silicon

1.38062e-23 (Boltzmanns constant)

1.60212e-19 (electron charge)

new temperature of model or element in K

tnom

tnom = TNOM + 273.15. This variable represents the nominal

temperature of parameter measurements in K (user input in
C).

vt

k t/q

vt(tnom)

k tnom/q

MOSFET Current Convention

Figure 15-1: shows the assumed direction of current flow through a MOS
transistor. When printing the drain current, use either I(M1) or I1(M1) syntax. I2
produces the gate current, I3 produces the source current, and I4 produces the
substrate current. References to bulk are the same as references to the substrate.

Star-Hspice Manual, Release 1998.2

15-17

[Link] : hspice.ch16

18 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

nb
(substrate node)
I4(M1)

nd
(drain node)
I1(M1)
ng
(gate node)
I2(M1)
ns
(source node)
I3(M1)

Figure 15-1: MOSFET Current Convention, N-channel

MOSFET Equivalent Circuits
HSPICE uses three equivalent circuits in the analysis of MOSFETs: DC,
transient, and AC and noise equivalent circuits. The components of these circuits
form the basis for all element and model equation discussion. The equivalent
circuit for DC sweep is the same as the one used for transient analysis, except
capacitances are not included. Figures 15-2 through Figure 15-4 display the
MOSFET equivalent circuits.
The fundamental component in the equivalent circuit is the DC drain-to-source
current (ids). For the noise and AC analyses, the actual ids current is not used.
Instead, the model uses the partial derivatives of ids with respect to the terminal
voltages vgs, vds, and vbs. The names for these partial derivatives are:
Transconductance

( ids )
gm = ---------------( vgs )
Conductance

( ids )
gds = ---------------( vds )

15-18

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

19 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

Bulk Transconductance

( ids )
gmbs = ---------------( vbs )
The ids equation describes the basic DC effects of the MOSFET. The effects of
gate capacitance and of source and drain diodes are considered separately from
the DC ids equations. In addition, the impact ionization equations are treated
separately from the DC ids equation, even though its effects are added to ids.
Gate

cgb

cgs

- - vds
ibs

cbs

+
vgd
+

Source rs

+
vgs

-ids -

rd

Drain

ibd cbd

vbs vbd

cgd

idb

Substrate

Figure 15-2: Equivalent Circuit, MOSFET Transient Analysis

Star-Hspice Manual, Release 1998.2

15-19

[Link] : hspice.ch16

20 Thu Jul 23 19:10:43 1998

Selecting Models

Introducing MOSFET

Gate

cgb
rs

cgd

- vds

Source

cgs

rd

Drain

gm vgs
gds
gmbs vbs

cbs

gbs
gbd

gdb
cbd

Substrate

Figure 15-3: Equivalent Circuit, MOSFET AC Analysis

15-20

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

21 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Selecting Models

Gate

cgb

cgd

- vds

rs

Source

cgs

rd

Drain

gm vgs
gds

inrs

gmbs vbs

inrd

ind

cbs

gbs
gbd cbd

gdb

Substrate

Figure 15-4: Equivalent Circuit, MOSFET AC Noise Analysis

Star-Hspice Manual, Release 1998.2

15-21

[Link] : hspice.ch16

22 Thu Jul 23 19:10:43 1998

Using Nonplanar and Planar Technologies

Introducing MOSFET

Using Nonplanar and Planar Technologies

Two MOSFET fabrication technologies have dominated integrated circuit
design: nonplanar and planar technologies. Nonplanar technology uses metal
gates. The simplicity of the process generally provides acceptable yields. The
primary problem with metal gates is metal breakage across the field oxide steps.
Field oxide is grown by oxidizing the silicon surface. When the surface is cut, it
forms a sharp edge. Since metal must be affixed to these edges in order to contact
the diffusion or make a gate, it is necessary to apply thicker metal to compensate
for the sharp edges. This metal tends to gather in the cuts, making etching
difficult. The inability to accurately control the metal width necessitates very
conservative design rules and results in low transistor gains.
In planar technology, the oxide edges are smooth, with a minimal variance in
metal thickness. Shifting to nitride was accomplished by using polysilicon gates.
Adding a chemical reactor to the MOS fabrication process enables not only the
deposition of silicon nitride, but also that of silicon oxide and polysilicon. The
ion implanter is the key element in this processing, using implanters with beam
currents greater than 10 milliamperes.
Since implanters define threshold voltages and diffusions as well as field
thresholds, processes require a minimum number of high temperature oven
steps. This enables low temperature processing and maskless pattern generation.
The new wave processes are more similar to the older nonplanar metal gate
technologies.

Field Effect Transistor

The metal gate MOSFET is a nonisoplanar metal-oxide-semiconductor field
effect transistor as illustrated in Figure 15-5 and Figure 15-6.

15-22

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

23 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Nonplanar and Planar Technologies

Gate

Source

Drain

Source-drain cut into the field oxide

Metal, used to form the MOS gate as well as
contacting the source and drain
Thin oxide cut
Source-drain to metal contact

Figure 15-5: Field Effect Transistor

Looking at the actual geometry, from source-to-drain, Figure 15-6 shows a
perspective of the nonisoplanar metal-oxide semiconductor field effect
transistor.
1

Intermediate
Oxide

Metal
Gate

Contact
Center

Field
Oxide

Gate Oxide

Source

Drain

Substrate
67

8 9 10

13

11 12

Figure 15-6: Field Effect Transistor Geometry

Star-Hspice Manual, Release 1998.2

15-23

[Link] : hspice.ch16

24 Thu Jul 23 19:10:43 1998

Using Nonplanar and Planar Technologies

Introducing MOSFET

1-4

drawn metal gate channel length

2-3

drawn oxide cut

7-8

effective channel length

6-9

etched channel length

8-9

lateral diffusion

drawn diffusion edge

11

actual diffusion edge

To visualize the construction of the silicon gate MOSFET, observe how a source
or drain to field cuts (Figure 15-7.) The cut A-B shows a drain contact (Figure
15-8).
E

Source Gate

Drain

Drawn pattern for nitride definition and subsequent

source-drain diffusion formation
Polysilicon definition where the poly crosses the
source-drain diffusion an MOS gate is formed
Source-drain to metal contact

Figure 15-7: Isoplanar Silicon Gate Transistor

15-24

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

25 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Nonplanar and Planar Technologies

Contact
Center

Intermediate
Oxide

Field
Oxide

Diffusion

Field Implant

34 5

6 78

Figure 15-8: Isoplanar MOSFET Construction, Part A

1-2

diffusion drawn dimension for nitride

4-7

nitride layer width after etch

3-1

periphery of the diode

The cut from the source to the drain is represented by C - D (Figure 15-9), which
includes the contacts.

Star-Hspice Manual, Release 1998.2

15-25

[Link] : hspice.ch16

26 Thu Jul 23 19:10:43 1998

Using Nonplanar and Planar Technologies

10

73

Introducing MOSFET

4 8

Contact
Center

Gate
Gate Oxide

Source

Intermediate
Oxide

Field
Oxide

Drain

Field Implant

Substrate
90 1

Figure 15-9: Isoplanar MOSFET Construction, Part B

7-8

drawn channel length L

2-5

actual poly width after etching L + XL where XL<0

3-4

effective channel length after diffusion L + XL - LD

4-5

lateral diffusion LD

9 - 10

diffusion periphery for diode calculations

5-6

gate edge to center contact for ACM=1 and ACM=2

calculations

The planar process produces parasitic capacitances at the poly to field edges of
the device. The cut along the width of the device demonstrates the importance
of these parasitics (Figure 15-10).
The encroachment of the field implant into the channel not only narrows the
channel width, but also increases the gate to bulk parasitic capacitance.

15-26

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

27 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Nonplanar and Planar Technologies

Contact
Hole

Intermediate
Oxide

Polysilicon
E

Gate

Field
Oxide

Field Implant

Gate Oxide

Substrate
3 4

5 6

Figure 15-10: Isoplanar MOSFET, Width Cut

1-2

drawn width of the gate W

3-4

depleted or accumulated channel (parameter WD)

4-5

effective channel width W+ XW -2 WD

3-6

physical channel width W + XW

Star-Hspice Manual, Release 1998.2

15-27

[Link] : hspice.ch16

28 Thu Jul 23 19:10:43 1998

Using Nonplanar and Planar Technologies

Introducing MOSFET

General MOSFET Model Statement

This is the general form for all model specifications. All related parameter levels
are covered in their respective sections.
General form

.MODEL mname [PMOS | NMOS] (<LEVEL=val>

<keyname1=val1> <keyname2=val2>)
+
<VERSION=version_number>
or
.MODEL mname NMOS(<LEVEL = val> <keyname1 = val1>
<keyname2=val2>)
+
<VERSION=version_number> )
mname

model name. Elements refer to the model by this name.

PMOS

identifies a p-channel MOSFET model

NMOS

identifies an n-channel MOSFET model

LEVEL

The MOSFET model includes several device model types.

Use the LEVEL parameter for selection. Default=1.0.

VERSION

This parameter specifies the version number of the model,

for LEVEL=13 BSIM and LEVEL=39 BSIM2 models only.
See the .MODEL statement description for information
about the effects of the VERSION parameter.

Examples

.MODEL MODP PMOS LEVEL=7 VTO=-3.25 GAMMA=1.0)

.MODEL MODN NMOS LEVEL=2 VTO=1.85 TOX=735e-10)
.MODEL MODN NMOS LEVEL=39 TOX=2.0e-02 TEMP=2.5e+01
VERSION=95.1

15-28

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

29 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

Using a MOSFET Diode Model

The Area Calculation Method (ACM) parameter allows for the precise control
of modeling bulk-to-source and bulk-to-drain diodes within MOSFET models.
The ACM model parameter is used to select one of three different modeling
schemes for the MOSFET bulk diodes. This section discusses the model
parameters and model equations used for the different MOSFET diode models.

MOSFET Diode Model Selection

To select a MOSFET diode model, set the ACM parameter within the MOSFET
model statements. If ACM=0, the pn bulk junctions of the MOSFET are
modeled in the SPICE-style. The ACM=1 diode model is the original ASPEC
model. The ACM=2 model parameter specifies the HSPICE improved diode
model, which is based on a model similar to the ASPEC MOSFET diode model.
The ACM=3 diode model is a further HSPICE improvement that deals with
capacitances of shared sources and drains and gate edge source/drain-to-bulk
periphery capacitance. If the ACM model parameter is not set, the diode model
defaults to the ACM=0 SPICE model. ACM=0 and ACM=1 models do not
permit the specification of HDIF. ACM=0 does not permit specification of
LDIF. Furthermore, the geometric element parameters AD, AS, PD, and PS are
not used for the ACM=1 model.

Convergence
The GMIN and GMINDC options parallel a conductance across the bulk diodes
and drain-source for transient and DC analysis, respectively. Use these options
to enhance the convergence properties of the diode model, especially when the
model has a high off resistance. Use the parameters RSH, RS, and RD to keep
the diode from being overdriven in either a DC or transient forward bias
condition. Use of these parameters also enhances the convergence properties of
the diode model.

Star-Hspice Manual, Release 1998.2

15-29

[Link] : hspice.ch16

30 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

MOSFET Diode Model Parameters

This section describes the diode model parameters for MOSFET.
DC Model Parameters

Name(Alias)

Units

ACM

Default

Description

area calculation method

JS

amp/
m2

bulk junction saturation current

JSscaled = JS/SCALM2
for ACM=1, unit is amp/m and
JSscaled = JS/SCALM.

JSW

amp/m

sidewall bulk junction saturation current

JSWscaled = JSW/SCALM.

IS

amp

1e-14

bulk junction saturation current. For the option

ASPEC=1, default=0.

emission coefficient

NDS

reverse bias slope coefficient

-1

reverse diode current transition point

VNDS

Capacitance Model Parameters

Name(Alias)

Units

Default

Description

CBD

zero bias bulk-drain junction capacitance. Used only

when CJ and CJSW are 0.

CBS

zero bias bulk-source junction capacitance. Used only

when CJ and CJSW are 0.

15-30

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

31 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

Name(Alias)

Units

Default

Description

CJ (CDB,
CSB, CJA)

F/m2

579.11
F/m2

zero-bias bulk junction capacitance: CJscaled = CJ/

SCALM2
for ACM=1 the unit is F/m and CJscaled = CJ/
SCALM
default for option ASPEC=0 is

si q NSUB 1 / 2
CJ = -----------------------------------

2 PB
CJSW (CJP)

F/m

zero-bias sidewall bulk junction capacitance

CJSWscaled = CJSW/SCALM
default = 0

CJGATE

F/m

CSJW

zero-bias gate-edge sidewall bulk junction

capacitance
(ACM=3 only)
CJGATEscaled=CJGATE/SCALM
Default = CJSW for HSPICE releases later than
H9007D.
Default = 0 for HSPICE releases H9007D and earlier,
or if CJSW is not specified.

FC

0.5

forward-bias depletion capacitance coefficient (not

used)

MJ (EXA, EXJ,
EXS, EXD

0.5

bulk junction grading coefficient

MJSW (EXP)

0.33

bulk sidewall junction grading coefficient

NSUB (DNB,
NB)

1/cm3

1.0e15

substrate doping

PB (PHA,
PHS, PHD)

0.8

bulk junction contact potential

PHP

PB

bulk sidewall junction contact potential

TT

transit time

Star-Hspice Manual, Release 1998.2

15-31

[Link] : hspice.ch16

32 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

Drain and Source Resistance Model Parameters

Name(Alias)

Units

Default

Description

RD

ohm/sq

0.0

drain ohmic resistance. This parameter is usually lightly

doped regions sheet resistance for ACM 1.

RDC

ohm

0.0

additional drain resistance due to contact resistance

LRD

ohm/m

drain resistance length sensitivity. Use this parameter with

automatic model selection in conjunction with WRD and
PRD to factor model for device size.

WRD

ohm/m

drain resistance length sensitivity (used with LRD)

PRD

ohm/
m2

drain resistance product (area) sensitivity (used with LRD)

RS

ohm/sq

0.0

source ohmic resistance. This parameter is usually lightly

doped regions sheet resistance for ACM 1.

LRS

ohm/m

source resistance length sensitivity. Use this parameter

with automatic model selection in conjunction with WRS
and PRS to factor model for device size.

WRS

ohm/m

source resistance width sensitivity (used with LRS)

PRS

ohm/
m2

source resistance product (area) sensitivity (used with

LRS)

RSC

ohm

0.0

additional source resistance due to contact resistance

RSH (RL)

ohm/sq

0.0

drain and source diffusion sheet resistance

15-32

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

33 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

MOS Geometry Model Parameters

Name(Alias)

Units

Default

Description

HDIF

length of heavily doped diffusion, from contact to

lightly doped region (ACM=2, 3 only)

HDIFwscaled = HDIF SCALM

LD
(DLAT,LATD)

LDIF

WMLT

lateral diffusion into channel from source and drain

diffusion.
If LD and XJ are unspecified, LD default=0.0.
When LD is unspecified, but XJ is specified, LD is
calculated from XJ. LD default=0.75 XJ.
For Level 4 only, lateral diffusion is derived from
LDXJ.
LDscaled = LD SCALM
0

length of lightly doped diffusion adjacent to gate

(ACM=1, 2)
LDIFscaled = LDIF SCALM

width diffusion layer shrink reduction factor

XJ

metallurgical junction depth

XJscaled = XJ SCALM

XW (WDEL,
DW)

accounts for masking and etching effects

XWscaled = XW SCALM

ACM=0 MOS Diode

The following listing illustrates typical parameter value settings for a MOSFET
diode that is designed with a MOSFET that has a channel length of 3 m and a
channel width of 10 m.

Star-Hspice Manual, Release 1998.2

15-33

[Link] : hspice.ch16

34 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

SOURCE
CONTACT

DRAIN

GATE
LD

Figure 15-11: ACM=0 MOS Diode

Example

Transistor with LD=.5m

W=10m

L=3m

AD

area of drain (about 80 pm2)

AS

area of source (about 80 pm2)

CJ

4e-4 F/m2

CJSW

1e-10 F/m

JS

1e-8 A/m2

JSW

1e-13 A/m

NRD

number of squares for drain resistance

NRS

number of squares for source resistance

PD

sidewall of drain (about 36 m)

PS

sidewall of source (about 36 m)

15-34

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

35 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

Effective Areas and Peripheries Calculations

For ACM=0, the effective areas and peripheries are calculated as follows:
2

Deff = M AD WMLT SCALE

2

ASeff = M AS WMLT SCALE

PDeff = M PD WMLT SCALE

PSeff = M PS WMLT SCALE
Effective Saturation Current Calculations
For ACM=0, the MOS diode effective saturation currents are calculated as
follows:
Source Diode Saturation Current

Define:
val = JSscaled ASeff + JSWscaled PSeff
If val > 0 then,
isbs = val
Otherwise,
isbd = M IS
Drain Diode Saturation Current

Define:
val = JSscaled ADeff + JSWscaled PDeff
If val > 0 then,
isbd = val

Star-Hspice Manual, Release 1998.2

15-35

[Link] : hspice.ch16

36 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

Otherwise,
isbd = M IS
Effective Drain and Source Resistances
For ACM=0, the effective drain and source resistances are calculated as follows:
Source Resistance

Define:
val = NRS RSH
If val > 0 then,
val + RSC
RSeff = -------------------------M
Otherwise,
RS + RSC
RSeff = ------------------------M
Drain Resistance

Define:
val = NRD RSH
If val > then,
val + RDC
RDeff = --------------------------M
Otherwise,
RD + RDC
RDeff = --------------------------M

15-36

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

37 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

ACM=1 MOS Diode

HSPICE uses ASPEC-style diodes when the model parameter ACM=1 is
specified. Parameters AD, PD, AS, and PS are not used, and the units JS and CJ
differ from the SPICE style diodes (ACM=0).

SOURCE
CONTACT

GATE

DRAIN

LD
LDIF

Figure 15-12: ACM=1 MOS Diode

Example
The listings below are typical parameter value settings for a transistor with

LD=0.5 mW=10 mL=3 mLDIF=0.5 m

CJ

1e-10 F/m of gate width

Note the change from F/m2 (in ACM=0) to F/m.

CJSW

2e-10 F/m of gate width

JS

1e-14 A/m of gate width

Note the change from A/m2 (in ACM=0) to A/m

JSW

1e-13 A/m of gate width

NRD

number of squares for drain resistance

NRS

number of squares for source resistance

Star-Hspice Manual, Release 1998.2

15-37

[Link] : hspice.ch16

38 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

Effective Areas and Peripheries Calculations

For ACM=1, the effective areas and peripheries are calculated as follows:
ADeff = Weff WMLT
ASeff = Weff WMLT
PDff = Weff
PSeff = Weff
where
Weff = M ( Wscaled WMLT + XWscaled )
Note: The Weff is not quite the same as the weff given in the models Level 1,
2, 3, 6, and 13 sections. The term 2 WDscaled is not subtracted.
Effective Saturation Current Calculations
For ACM=1, the MOS diode effective saturation currents are calculated as
follows:
Source Diode Saturation Current

Define:
val = JSscaled ASeff + JSWscaled PSeff
If val > 0 then,
isbs = val
Otherwise:
isbs = M IS

15-38

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

39 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

Drain Diode Saturation Current

Define:
val = JSscaled ADeff + JSWscaled PDeff
If val > 0 then,
isbd = val
Otherwise,
isbd = M IS
Effective Drain and Source Resistances
For ACM=1, the effective drain and source resistances are calculated as follows:
Source Resistance

For UPDATE=0,
LDscaled + LDIFscaled
NRS RSH + RSC
RSeff = ---------------------------------------------------------------- RS + ---------------------------------------------Weff
M
If UPDATE 1 and LDIF=0 and the ASPEC option is also specified then:
1
RSeff = ----- ( RS + NRS RSH + RSC )
M

Star-Hspice Manual, Release 1998.2

15-39

[Link] : hspice.ch16

40 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

Drain Resistance

For UPDATE=0,
LDscaled + LDIFscaled
NRD RSH + RDC
RDeff = ---------------------------------------------------------------- RD + -----------------------------------------------Weff
M
If UPDATE 1 and LDIF=0 and the ASPEC option is also specified then:
1
RDeff = ----- ( RD + NRD RSH + RDC )
M
Note: See Levels 6 and 7 for more possibilities.

ACM=2 MOS Diode

HSPICE uses HSPICE style MOS diodes when the model parameter ACM=2 is
specified. This allows a fold-back calculation scheme similar to the ASPEC
method, retaining full model-parameter compatibility with the SPICE
procedure. This method also supports both lightly and heavily doped diffusions
(by setting the LD, LDIF, and HDIF parameters). The units of JS, JSW, CJ, and
CJSW used in SPICE are preserved, permitting full compatibility.
ACM=2 automatically generates more reasonable diode parameter values than
those for ACM=1. The ACM=2 geometry can be generated one of two ways:
Element parameters: AD, AS, PD, and PS can be used for parasitic
generation when specified in the element statement. Default options values
for these parameters are not applicable.
If the diode is to be suppressed, set IS=0, AD=0, and AS=0.
The source diode is suppressed if AS=0 is set in the element and IS=0 is set in
the model. This setting is useful for shared contacts.

15-40

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

41 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

SOURCE
CONTACT

DRAIN

GATE
LD

HDIF

LDIF

Figure 15-13: ACM=2 MOS Diode

Example

Transistor with LD=0.07m W=10 m L=2 m LDIF=1 m HDIF= 4 m,

typical MOSFET diode parameter values are:
AD

area of drain. Default option value for AD is not applicable.

AS

area of source. Default option value for AS is not applicable.

CJ

1e-4 F/m2

CJSW

1e-10 F/m

JS

1e-4 A/m2

JSW

1e-10 A/m

HDIF

length of heavy doped diffusion contact to gate (about 2 m)

HDIFeff=HDIF WMLT SCALM

LDIF+LD

length of lightly doped diffusion (about 0.4m)

NRD

number of squares drain resistance. Default option value for

NRD is not applicable.

NRS

number of squares source resistance. Default option value

for NRS is not applicable.

PD

periphery of drain, including the gate width for ACM=2. No

default.

Star-Hspice Manual, Release 1998.2

15-41

[Link] : hspice.ch16

42 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

PS

periphery of source, including the gate width for ACM=2.

No default.

RD

resistance (ohm/square) of lightly doped drain diffusion

(about 2000)

RS

resistance (ohm/square) of lightly doped source diffusion

(about 2000)

RSH

diffusion sheet resistance (about 35)

Effective Areas and Peripheries Calculations

For ACM=2, the effective areas and peripheries are calculated as follows:
If AD is not specified then,
ADeff = 2 HDIFeff Weff
Otherwise,
2

ADeff = M AD WMLT SCALE

If AS is not specified then,

ASeff = 2 HDIFscaled Weff
Otherwise,
2

ASeff = M AS WMLT SCALE

If PD is not specified then,

PDeff = 4 HDIFeff + 2 Weff
Otherwise,
PDeff = M PD WMLT SCALE
If PS is not specified then,

15-42

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

43 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

PSeff = 4 HDIFeff + 2 Weff

Otherwise,
PSeff = M PS WMLT SCALE
where
Weff = M ( Wscaled WMLT + XWscaled )
HDIFeff = HDIFscaled
HDIFscaled = HDIF SCALM WMLT
Note: The Weff is not quite the same as the Weff given in the model Level 1, 2,
3, and 6 sections. The term 2 WDscaled is not subtracted.
Effective Saturation Current Calculations
For ACM=2, the MOS diode effective saturation currents are calculated as
follows:
Source Diode Saturation Current

Define:
val = JSscaled ASeff + JSWscaled PSeff
If val > 0 then,
isbs = val
Otherwise,
isbs = M IS

Star-Hspice Manual, Release 1998.2

15-43

[Link] : hspice.ch16

44 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

Drain Diode Saturation Current

Define:
val = JSscaled ADeff + JSWscaled PDeff
If val > 0 then,
isbd = val
Otherwise,
isbd = M IS
Effective Drain and Source Resistances
For ACM=2, the effective drain and source resistances are calculated as follows.
Source Resistance

If NRS is specified then,

LDscaled + LDIFscaled
NRS RSH + RSC
RSeff = ---------------------------------------------------------------- RS + ----------------------------------------------

Weff
M
Otherwise,
RSC HDIFeff RSH + ( LDscaled + LDIFscaled ) RS
RSeff = ----------- + ------------------------------------------------------------------------------------------------------------------------------M
Weff
Drain Resistance

If NRD is specified then,

LDscaled + LDIFscaled
NRD RSH + RDC
RDeff = ---------------------------------------------------------------- RD + ------------------------------------------------

Weff
M
Otherwise,

15-44

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

45 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

RDC HDIFeff RSH + ( LDscaled + LDIFscaled ) RD

RDeff = ------------ + -------------------------------------------------------------------------------------------------------------------------------M
Weff

ACM = 3 MOS Diode

The ACM=3 is used to model MOS diodes of the stacked devices properly. Also,
the CJGATE model parameter separately models the drain and source periphery
capacitances along the gate edge. Therefore, the PD and PS calculations do not
include the gate periphery length. CJGATE defaults to CJSW, which, in turn,
defaults to 0.
The AD, AS, PD, PS calculations depend on the layout of the device, which is
determined by the value of element parameter GEO. The GEO can be specified
on the MOS element description. It can have the following values:
GEO=0: indicates the drain and source of the device are not shared by other
devices (default).
GEO=1: indicates the drain is shared with another device.
GEO=2: indicates the source is shared with another device.
GEO=3: indicates the drain and source are shared with another device.
GEO=2

GEO=3

GEO=1

LD
HDIF HDIF

LDIF

Figure 15-14: Stacked Devices and Corresponding GEO Values

Star-Hspice Manual, Release 1998.2

15-45

[Link] : hspice.ch16

46 Thu Jul 23 19:10:43 1998

Using a MOSFET Diode Model

Introducing MOSFET

Effective Areas and Peripheries Calculations

For ACM=3, the effective areas and peripheries are calculated differently,
depending on the value of GEO.
If AD is not specified, then,
For GEO=0 or 2,

ADeff = 2 HDIFeff Weff

For GEO=1 or 3,

ADeff = HDIFeff Weff

Otherwise,
ADeff = M AD WMLT 2 SCALE 2
If AS is not specified, then,
For GEO=0 or 1,

ASeff = 2 HDIFeff Weff

For GEO=2 or 3,

ASeff = HDIFeff Weff

Otherwise,
ASeff = M AS WMLT 2 SCALE 2
If PD is not specified, then,
For GEO=0 or 2,
PDeff = 4 HDIFeff + Weff
For GEO=1 or 3,
PDeff = 2 HDIFeff
Otherwise,

15-46

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

47 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using a MOSFET Diode Model

PDeff = M PD WMLT SCALE

If PS is not specified, then,
For GEO=0 or 1,
PSeff = 4 HDIFeff + Weff
For GEO=2 or 3,
PSeff = 2 HDIFeff
Otherwise,
PSeff = M PS WMLT SCALE
The Weff and HDIFeff is calculated as follows:
Weff = M ( Wscaled WMLT + XWscaled )
HDIFeff = HDIFscaled WMLT
Note: The Weff is not quite the same as the Weff given in the model LEVEL 1,
2, 3, and 6 sections. The term 2 WDscaled is not subtracted.
Effective Saturation Current Calculations
The ACM=3 model calculates the MOS diode effective saturation currents the
same as ACM=2.
Effective Drain and Source Resistances
The ACM=3 model calculates the effective drain and source resistances the
same as ACM=2.

Star-Hspice Manual, Release 1998.2

15-47

[Link] : hspice.ch16

48 Thu Jul 23 19:10:43 1998

Using MOS Diode Equations

Introducing MOSFET

Using MOS Diode Equations

This section describes the MOS diode equations.

DC Current
The drain and source MOS diodes are paralleled with GMINDC conductance in
the DC analysis and with GMIN in the transient analysis. The total DC current
is the sum of diode current and the conductance current. The diode current is
calculated as follows.
Drain and Source Diodes Forward Biased

vbs > 0,
ibs = isbs ( e vbs ( N vt ) 1 )
vbd > 0,
ibd = isbd ( e vbd ( N vt ) 1 )
Drain and Source Diodes Reverse Biased

For 0>vbs>VNDS,
ibs = gsbs vbs
For vbs < VNDS,
gsbs
ibs = gsbs VNDS + ------------ ( vbs VNDS )
NDS
For 0 > vbd > VNDS,
ibd = gsbd vbd
For vbd < VNDS,

15-48

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

49 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using MOS Diode Equations

gsbd
ibd = gsbd VNDS + ------------ ( vbd VNDS )
NDS
where
gsbs = isbs , and gdbd = isbd

MOS Diode Capacitance Equations

Each MOS diode capacitance is the sum of diffusion and depletion capacitance.
The diffusion capacitance is evaluated in both in terms of the small signal
conductance of the diode and a model parameter TT, representing the transit
time of the diode. The depletion capacitance depends on the choice of ACM, and
is discussed below.
The bias-dependent depletion capacitance must be calculated by defining the
intermediate quantities: C0BS, C0BD, C0BS_SW, and C0BD_SW, which
depend on geometric parameters, such as ASeff and PSeff calculated under
various ACM specifications.
When ACM=3, the intermediate quantities C0BS_SW, and C0BD_SW include
an extra term to account for CJGATE.
For ACM=2, the parameter CJGATE has been added in a backward compatible
manner. Therefore, the default behavior of CJGATE makes the intermediate
quantities C0BS_SW and C0BD_SW the same as for previous versions. The
default patterns are:
If neither CJSW nor CJGATE is specified, both default to zero.
If CJGATE is not specified, it defaults to CJSW, which in turn defaults to zero.
If CJGATE is specified, and CJSW is not specified, then CJSW defaults to zero.
The intermediate quantities C0BS, C0BS_SW, C0BD, and C0BD_SW are
calculated as follows.
C0BS = CJscaled*ASeff
C0BD = CJscaled*ADeff

Star-Hspice Manual, Release 1998.2

15-49

[Link] : hspice.ch16

50 Thu Jul 23 19:10:43 1998

Using MOS Diode Equations

Introducing MOSFET

If (ACM= 0 or 1), then:

C0BS_SW = CJSWscaled*PSeff
C0BD_SW = CJSWscaled*PDeff
If (ACM=2):
If (PSeff < Weff), then:

C0BS_SW = CJGATEscaled*PSeff
Otherwise:

C0BS_SW = CJSWscaled*(PSeff-Weff) + CJGATEscaled*Weff

If (PDeff < Weff), then:

C0BD_SW = CJGATEscaled*PDeff
Otherwise:

C0BD_SW = CJSWscaled*(PDeff-Weff) + CJGATEscaled*Weff

if (ACM=3), then:

C0BS_SW = CJSWscaled*PSeff + CJGATEscaled*Weff

C0BD_SW = CJSWscaled*PDeff + CJGATEscaled*Weff
Source Diode Capacitance

If (C0BS + C0BS_SW) > 0, then:

For vbs < 0,

ibs
vbs M
pbs = TT ----------- + C0BS 1 --------

vbs
PB
vbs MJSW
+ C0BS_SW 1 ------------

PHP
For vbs > 0,

ibs
vb
pbs = TT ----------- + C0BS 1 + MJ ---
vbs
P
vbs
+ C0BS_SW 1 + MJSW -----------
PHP
Otherwise, if (C0BS + C0BS_SW) 0, then:
For vbs < 0,

15-50

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

51 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using MOS Diode Equations

ibs
vbs MJ
capbs = TT ----------- + M CBS 1 --------

vbs
PB
For vbs > 0,

ibs
vb
pbs = TT ----------- + M CBS 1 + MJ ----
vbs
PB
Drain Diode Capacitance

If (C0BD + C0BD_SW) > 0, then:

For vbd < 0,

ibd
vbd MJ
capbd = TT ------------ + C0BD 1 ---------

vbd
PB
vbd MJSW
+ PDeff C0BD_SW 1 ------------

PHP
For vbd > 0,

ibd
vb
pbd = TT ------------ + C0BD 1 + MJ ---
vbd
P
vbd

+ C0BD_SW 1 + MJSW -----------

PHP
Otherwise, if (ADeff CJscaled + PDeff CJSWscaled) 0, then:
For vbd < 0,

bd
vbd M
capbd = TT ------------ + M CBD 1 ---------

vbd
PB
For vbd > 0,

ibd
vb
apbd = TT ------------ + M CBD 1 + MJ -----
vbd
PB

Star-Hspice Manual, Release 1998.2

15-51

[Link] : hspice.ch16

52 Thu Jul 23 19:10:43 1998

Using Common Threshold Voltage Equations

Introducing MOSFET

Using Common Threshold Voltage Equations

This section describes the common threshold voltage equations.

Common Threshold Voltage Parameters

The parameters described in this section are applicable to all MOSFET models
except Levels 5 and 13.

Name(Alias)

Units

Default

Description

DELVTO

0.0

zero-bias threshold voltage shift

GAMMA

V1/2

0.5276
25

body effect factor. If GAMMA is not set, it is calculated

from NSUB.

NGATE

cm3

NSS

1/cm2

1.0

surface state density

NSUB (DNB,
NB)

1/cm3

1e15

substrate doping

PHI

0.5760
36

surface potential. NSUB default=1e15.

1.0

type of gate material, used for analytical model only

Level 4 TPG default=0 where
TPG = 0 al-gate
TPG = 1 gate type same as source-drain diffusion
TPG = -1 fate type opposite to source-drain diffusion

TPG (TPS)

VTO (VT)

15-52

polysilicon gate doping, used for analytical model only.

Undoped polysilicon is represented by a small value. If
NGATE 0.0, it is set to 1e+18.

zero-bias threshold voltage

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

53 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Common Threshold Voltage Equations

Calculation of PHI, GAMMA, and VTO

The model parameters PHI, GAMMA, and VTO are used in threshold voltage
calculations. If these parameters are not user-specified, they are calculated as
follows, except for the Level 5 model.
If PHI is not specified, then,
NSUB
PHI = 2 vt ln ----------------
ni
If GAMMA is not specified, then,
( 2 q si NSUB ) 1 2
GAMMA = ------------------------------------------------------COX
The energy gap, eg, and intrinsic carrier concentration for the above equations
are determined by:
tnom 2
eg = 1.16 - 7.02e-4 ------------------------------tnom + 1108
tnom
ni = 1.45e+10 -------------
300

32

q eg 1
1
------------- --------- -------------
2 k 300 tnom

( 1/cm )

where,
tnom = TNOM + 273.15
If VTO is not specified, then for Al-Gate (TPG=0), the work function ms is
determined by:
eg
PHI
ms = ------ type ----------- 0.05
2
2
where type is +1 for n-channel and -1 for p-channel.
For Poly-Gate (TPG=1), the work function is determined by:
If the model parameter NGATE is not specified,

Star-Hspice Manual, Release 1998.2

15-53

[Link] : hspice.ch16

54 Thu Jul 23 19:10:43 1998

Using Common Threshold Voltage Equations

Introducing MOSFET

eg PHI
ms = type TPG ------ -----------

2
2
Otherwise,
NGATE 1e6 PHI
ms = type TPG vt ln ---------------------------------- ----------

ni
2
Then VTO voltage is determined by:
VTO = vfb + type ( GAMMA PH I 1 2 + PHI )
where,
q NSS
vfb = ms ------------------ + DELVTO
COX
If VTO is specified, then,
VTO = VTO + DELVTO

15-54

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

55 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Performing MOSFET Impact Ionization

The impact ionization current for MOSFETs is available for all levels. The
controlling parameters are ALPHA, VCR, and IIRAT. The parameter IIRAT
sets the fraction of the impact ionization current that goes to the source.
Ids = Ids_normal + IIRATI_impact
Idb = Idb_diode + (1-IIRAT)I_impact
IIRAT defaults to zero, which sends all impact ionization current to bulk. Leave
IIRAT at its default value unless data is available for both drain and bulk current.

Impact Ionization Model Parameters

Name(Alias)

Units

Defa
ult

Description

ALPHA

1/V

0.0

impact ionization current coefficient

LALPHA

m/V

0.0

ALPHA length sensitivity

WALPHA

m/V

0.0

ALPHA width sensitivity

VCR

0.0

critical voltage

LVCR

m V

0.0

VCR length sensitivity

WVCR

m V

0.0

VCR width sensitivity

0.0

portion of impact ionization current that goes to source

IIRAT

Impact Ionization Equations

The current I_impact due to impact ionization effect is calculated as follows:
I_impact = Ids ALPHAeff ( vds vdsat )

VCReff
---------------------------vds
e vdsat

where

Star-Hspice Manual, Release 1998.2

15-55

[Link] : hspice.ch16

56 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

1
1
ALPHAeff = ALPHA + LALPHA 1e-6 ----------- -----------------------
Leff LREFeff
1
1
WALPHA 1e-6 ------------ ------------------- Weff WREFef
1
1
VCReff = VCR + LVCR 1e-6 ----------- -----------------------
Leff LREFeff
1
1
WVCR 1e-6 ------------ --------------------- Weff WREFef
where
LREFeff = LREF + XLREF 2 LD and
WREFeff = WREF + XWREF 2 WD

Effective Output Conductance

The element template output allows gds to be output directly, for example,
.PRINT I(M1) gds=LX8(M1)
However, when using impact ionization current, it is important to note that gds
is the derivative of Ids only, rather than the total drain current, which is Ids+Idb.
The complete drain output conductance is
I ds I db
I ds I bd
I d
- = ----------+ ------------ = ----------+ ------------ = g ds + g bd
g dd = --------V d
V ds V db
V ds V bd
G dd = LX 8 + LX 10
For example, to print the drain output resistance of device M1,
.PRINT rout=PAR(1.0/(LX8(M1)+LX10(M1)))

15-56

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

57 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Figure 15-15: Drain, Source, and Bulk Currents for vgs=3, with
IIRAT=0.5

Cascode Example
Drain to bulk impact ionization current limits the use of cascoding to increase
output impedance. The following cascode example shows the affect of changing
IIRAT. When IIRAT is less than 1.0, the drain to bulk current lowers the output
impedance of the cascode stage.

in

ref

Figure 15-16: Low-frequency AC Analysis Measuring Output

Impedance
Star-Hspice Manual, Release 1998.2

15-57

[Link] : hspice.ch16

58 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Cascode Circuit
Example

iirat
0.0
0.5
1.0

gout_ac
8.86E-6
4.30E-6
5.31E-8

rout
113 K
233 K
18.8 Meg

Input File:

$ cascode test
.param pvds=5.0 pvref=1.4 pvin=3.0
vdd dd 0 pvds ac 1
$ current monitor vd
vd dd d 0
vin in 0 pvin
vref ref 0 pvref
x1 d in ref cascode
.macro cascode out in ref
m1 out in 1 0
n L=1u W=10u
mref 1 ref 0 0
n L=1u W=10u
.eom
.param xiirat=0
.ac dec 2 100k 1x sweep xiirat poi 3
.print ir(vd)
.measure gout_ac avg ir(vd)

0, 0.5, 1.0

.model n nmos level=3

+ tox=200 vto=0.8 gamma=0.7 uo=600 kappa=0.05
+ alpha=1 vcr=15 iirat=xiirat
.end

15-58

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

59 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

MOS Gate Capacitance Models

Capacitance model parameters can be used with all MOSFET model statements.
Model charge storage using fixed and nonlinear gate capacitances and junction
capacitances. Gate-to-drain, gate-to-source, and gate-to-bulk overlap
capacitances are represented by three fixed-capacitance parameters: CGDO,
CGSO, and CGBO. The algorithm used for calculating nonlinear, voltagedependent MOS gate capacitance depends on the value of model parameter
CAPOP.
Model MOS gate capacitances, as a nonlinear function of terminal voltages,
using Meyers piece-wise linear model for all MOS levels. The charge
conservation model is also available for MOSFET model Levels 2, 3, 4, 5, 6, 7,
13, and 27. For Level 1, the model parameter TOX must be specified to invoke
the Meyer model. The Meyer, Modified Meyer, and Charge Conservation MOS
Gate Capacitance models are described in detail in the following subsections.
Some of the charge conserving models (Ward-Dutton or BSIM) can cause
timestep too small errors when no other nodal capacitances are present.

Capacitor Model Selection

Gate capacitance model selection has been expanded to allow various
combinations of capacitor models and DC models. Older DC models can now be
incrementally updated with the new capacitance equations without having to
move to a new DC model. You can select the gate capacitance with the CAPOP
model parameter to validate the effects of different capacitance models.
The capacitance model selection parameter CAPOP is associated with the MOS
models. Depending on the value of CAPOP, different capacitor models are used
to model the MOS gate capacitance: the gate-to-drain capacitance, the gate-tosource capacitance, or the gate-to-bulk capacitance. CAPOP allows for the
selection of several versions of the Meyer and charge conservation model.
Some of the capacitor models are tied to specific DC models (DC model level in
parentheses below). Others are designated as general and can be used by any DC
model.

Star-Hspice Manual, Release 1998.2

15-59

[Link] : hspice.ch16

60 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

CAPOP=0

SPICE original Meyer model (general)

CAPOP=1

modified Meyer model (general)

CAPOP=2

parameterized Modified Meyer model (general default)

CAPOP=3

parameterized Modified Meyer model with Simpson

integration (general)

CAPOP=4

charge conservation model (analytic), Levels 2, 3, 6, 7, 13,

28, and 39 only

CAPOP=5

no capacitor model

CAPOP=6

AMI capacitor model (Level 5)

CAPOP=9

charge conservation model (Level 3)

CAPOP=13

generic BSIM model (default for Levels 13, 28, 39)

CAPOP=11

Ward-Dutton model (specialized, Level 2)

CAPOP=12

Ward-Dutton model (specialized, Level 3)

CAPOP=39

BSIM 2 Capacitance model (Level 39)

CAPOP=4 selects the recommended charge-conserving model from among

CAPOP=11, 12, or 13 for the given DC model.

15-60

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

61 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Table 15-6: CAPOP = 4 Selections

MOS Level

Default
CAPOP

CAPOP=4
selects:

11

12

13, 28, 39

13

13

other levels

11

The proprietary models, Level 5, 17, 21, 22, 25, 31, 33, and the SOS model Level
27, have their own built-in capacitance routines.

Introduction to Transcapacitance
If you have a capacitor with two terminals, 1 and 2 with charges Q1 and Q2 on
the two terminals that sum to zero, for example, Q1=Q2, the charge is a
function of the voltage difference between the terminals, V12=V1V2. The
small-signal characteristics of the device are completely described by one
quantity, C=dQ1/dV12.
If you have a four-terminal capacitor, the charges on the four terminals must sum
to zero (Q1+Q2+Q3+Q4=0), and they can only depend on voltage differences,
but they are otherwise arbitrary functions. So there are three independent
charges, Q1, Q2, Q3, that are functions of three independent voltages V14, V24,
V34. Hence there are nine derivatives needed to describe the small-signal
characteristics.
It is convenient to consider the four charges separately as functions of the four
terminal voltages, Q1(V1,V2,V3,V4), ... Q4(V1,V2,V3,V4). The derivatives
form a four by four matrix, dQi/dVj, i=1,.4, j=1,.4. This matrix has a direct
interpretation in terms of AC measurements. If an AC voltage signal is applied
to terminal j with the other terminals AC grounded, and AC current into terminal
i is measured, the current is the imaginary constant times 2*pi*frequency times
dQi/dVj.

Star-Hspice Manual, Release 1998.2

15-61

[Link] : hspice.ch16

62 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

The fact that the charges sum to zero requires each column of this matrix to sum
to zero, while the fact that the charges can only depend on voltage differences
requires each row to sum to zero.
In general, the matrix is not symmetrical:
dQi/dVj need not equal dQj/dVi
This is not an expected event because it does not occur for the two terminal case.
For two terminals, the constraint that rows and columns sum to zero
dQ1 dQ2
----------- + ----------- = 0
dV 1 dV 1
dQ1 dQ1
----------- + ----------- = 0
dV 1 dV 2
forces dQ1/dV2 = dQ2/dV1. For three or more terminals, this relation does not
hold in general.
The terminal input capacitances are the diagonal matrix entries
Cii = dQi/dVi
i=1,.4
and the transcapacitances are the negative of off-diagonal entries
Cij = -dQi/dVj
i not equal to j
All of the Cs are normally positive.

15-62

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

63 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

CGG
CGS

CGD

Gate
CSG

CDG

Source

Drain

CSS

CDD
CBG

CGB

CSB
CBS

CDB
CBB

CBD

Figure 15-17: MOS Capacitances

In Figure 15-17:, Cij determines the current transferred out of node i from a voltage change
on node j. The arrows, representing direction of influence, point from node j to node i.

A MOS device with terminals D G S B provides the following:

dQg
CGG = ----------dVG
dQg
CGD = ----------dVD
dQD
CDG = -----------dVG
CGG represents input capacitance: a change in gate voltage requires a current
equal to CGGdVG/dt into the gate terminal. CGD represents Miller feedback:
a change in drain voltage gives a current equal to CGGdVG/dt out of the gate
terminal. CDG represents Miller feedthrough, capacitive current out of the drain
due to a change in gate voltage.

Star-Hspice Manual, Release 1998.2

15-63

[Link] : hspice.ch16

64 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

To see how CGD might not be equal to CDG, the following example presents
a simplified model with no bulk charge, with gate charge a function of VGS
only, and 50/50 partition of channel charge into QS and QD:
QG = Q ( vgs )
QS = 0.5 Q ( vgs )
QD = 0.5 Q ( vgs )
QB = 0
As a result of this:
dQG
CGD = ------------ = 0
dVD
dQ
dQD
CGD = ------------ = 0.5 -----------dvgs
dVG
Therefore, in this model there is Miller feedthrough, but no feedback.

Operating Point Capacitance Printout

Six capacitances are reported in the operating point printout:
cdtot

dQD/dVD

cgtot

dQG/dVG

cstot

dQS/dVS

cbtot

dQB/dVB

cgs

-dQG/dVS

cgd

-dQG/dVD

15-64

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

65 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

These capacitances include gate-drain, gate-source, and gate-bulk overlap

capacitance, and drain-bulk and source-bulk diode capacitance. Drain and
source refer to node 1 and 3 of the MOS element, that is, physical instead of
electrical.
For the Meyer models, where the charges QD and so on are not well defined, the
printout quantities are
cdtot

cgd+cdb

cgtot

cgs+cgd+cgb

cstot

cgs+csb

cbtot

cgb+csb+cdb

cgs

cgs

cgd

cgd

Element Template Printout

The MOS element template printouts for gate capacitance are LX18 LX23 and
LX32 LX34. From these nine capacitances the complete four by four matrix
of transcapacitances can be constructed. The nine LX printouts are:
LX18(m) = dQG/dVGB = CGGBO
LX19(m) = dQG/dVDB = CGDBO
LX20(m) = dQG/dVSB = CGSBO
LX21(m) = dQB/dVGB = CBGBO
LX22(m) = dQB/dVDB = CBDBO
LX23(m) = dQB/dVSB = CBSBO
LX32(m) = dQD/dVG = CDGBO
LX33(m) = dQD/dVD = CDDBO
LX34(m) = dQD/dVS = CDSBO
These capacitances include gate-drain, gate-source, and gate-bulk overlap
capacitance, and drain-bulk and source-bulk diode capacitance. Drain and
source refer to node 1 and 3 of the MOS element, that is, physical instead of
electrical.

Star-Hspice Manual, Release 1998.2

15-65

[Link] : hspice.ch16

66 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

For an NMOS device with source and bulk grounded, LX18 represents the input
capacitance, LX33 the output capacitance, -LX19 the Miller feedback
capacitance (gate current induced by voltage signal on the drain), and -LX32
represents the Miller feedthrough capacitance (drain current induced by voltage
signal on the gate).
A device that is operating with node 3 as electrical drain, for example, an NMOS
device with node 3 at higher voltage than node 1 is said to be in reverse mode.
The LXs are physical, but you can translate them into electrical definitions by
interchanging D and S:
CGG(reverse) = CGG = LX18
CDD(reverse) = CSS = dQS/dVS = d(-QG-QB-QD)/dVS = LX20-LX23-LX34
CGD(reverse) = CGS = -LX20
CDG(reverse) = CSG = -dQS/dVG = d(QG+QB+QD)/dVG =
LX18+LX21+LX32
For the Meyer models, the charges QD, and so forth, are not well defined. The
formulas LX18= CGG, LX19= -CGD, and so forth, are still true, but the
transcapacitances are symmetrical; for example, CGD=CDG. In terms of the six
independent Meyer capacitances, cgd, cgs, cgb, cdb, csb, cds, the LX printouts
are:
LX18(m) = CGS+CGD+CGB
LX19(m) = LX32(m) = -CGD
LX20(m) = -CGS
LX21(m) = -CGB
LX22(m) = -CDB
LX23(m) = -CSB
LX33(m) = CGD+CDB+CDS
LX34(m) = -CDS

15-66

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

67 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Example Gate Capacitance Calculation

This example shows a gate capacitance calculation in detail for a BSIM model.
TOX is chosen so that
2
eox
--------- = 1e 3F m
tox

Vfb0, phi, k1 are chosen so that vth=1v. The AC sweep is chosen so that
1
2 freq = 1e6s for the last point.
HSPICE Input File

$
m d g 0 b nch l=0.8u w=100u ad=200e-12 as=200e-12
vd d 0 5
vg g 0 5 ac 1
vb b 0 0
.ac dec 1 1.59155e4 1.59155e5
.print
CGG=lx18(m) CDD=lx33(m) CGD=par(-lx19(m))
CDG=par(-lx32(m))
.print
ig_imag=ii2(m) id_imag=ii1(m)
.model nch nmos level=13 update=2
+ xqc=0.6 toxm=345.315 vfb0=-1 phi0=1 k1=1.0 muz=600
mus=650 acm=2
+ xl=0 ld=0.1u meto=0.1u cj=0.5e-4 mj=0 cjsw=0
.alter
vd d 0 5 ac 1
vg g 0 5
.end
Calculations

Leff = 0.6u
2
eox
--------- = 1e 3F m
tox

Star-Hspice Manual, Release 1998.2

15-67

[Link] : hspice.ch16

68 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Leff Weff eox

Cap = ------------------------------------------ = 60e 15F
tox
BSIM equations for internal capacitance in saturation with xqc=0.4:
K1
1
body = 1 + 0.5 1 -------------------------------------------------------------------------------- -------------------------------------
( 1.744 + 0.8364 ( PHI 0 + vsb ) ) ( PHI 0 + vsb )
1
1 + 0.5 1 ----------------------------------------- = 1.30

( 1.744 + 0.8364 )
1
cgg = Cap 1 ------------------------- = Cap 0.7448 = 44.69F

( 3 body )
cgd = 0
4
cdg = ------ Cap = 16F
15
cdd = 0
Gate-drain overlap = ( ld

eox
+ meto ) Weff --------- = 20e 15F
tox

Adding the overlaps,

cgg = 44.69F + 2 20F = 84.69F
cgd = 20F
cdg = 36F
cdd = 20F
Drain-bulk diode cap cj

ad = ( 0.5e 4 ) ( 200e 12 ) = 1

Adding the diodes,

cgg = 84.69F

15-68

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

69 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

cgd = 20F
cdg = 36F
cdd = 30F
HSPICE Results

subckt
element 0:m
model
0:nch
cdtot
30.0000f
cgtot
84.6886f
cstot
74.4684f
cbtot
51.8898f
cgs
61.2673f
cgd
20.0000f
freq
cgg
cdd
cgd
15.91550k 84.6886f
30.0000f 20.0000f
159.15500k 84.6886f
30.0000f
20.0000f
freq
ig_imag
id_imag
15.91550k
8.4689n
-3.6000n
159.15500k 84.6887n
-35.9999n
Alter results
freq
ig_imag
id_imag
15.91550k
-2.0000n
3.0000n
159.15500k
-20.0000n 30.0000n

cdg
35.9999f
35.9999f

The calculation and the HSPICE results match.

Plotting Gate Capacitances
This input file shows how to plot gate capacitances as a function of bias. The
.OPTION DCCAP needs to be set to turn on capacitance calculations for a DC
sweep. The model used is the same as for the above calculations.

Star-Hspice Manual, Release 1998.2

15-69

[Link] : hspice.ch16

70 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Example

$ gate capacitance plots

.option dccap=1 post
m d g 0 b nch l=0.8u w=100u ad=200e-12 as=200e-12
vd d 0 0
vg g 0 5
vb b 0 0
.dc vd 0 5 .1
.print
vds=v(d) CGG=lx18(m)
+
CGD=par(-lx19(m)) CDG=par(-lx32(m))
+
CGS=par(-lx20(m))
CSG=par(lx18(m)+lx21(m)+lx32(m))
+
CGB=par(lx18(m)+lx19(m)+lx20(m))
CBG=par(-lx21(m))
.model nch nmos
+ level=13 update=2 xqc=0.6 toxm=345.315
+ vfb0=-1 phi0=1 k1=1.0 muz=600 mus=650
+ acm=2 xl=0 ld=0.1u meto=0.1u
+ cj=0.5e-4 mj=0 cjsw=0
.end

15-70

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

71 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Figure 15-18: Gate Capacitance

Capacitance Control Options
The control options affecting the CAPOP models are SCALM, CVTOL,
DCSTEP, and DCCAP. SCALM scales the model parameters, CVTOL controls
the error tolerance for convergence for the CAPOP=3 model (see CAPOP=3
Gate Capacitances (Simpson Integration) on page 15-90). DCSTEP models
capacitances with a conductance during DC analysis. DCCAP invokes
calculation of capacitances in DC analysis.

Star-Hspice Manual, Release 1998.2

15-71

[Link] : hspice.ch16

72 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Scaling
The parameters scaled by the option SCALM are: CGBO, CGDO, CGSO, COX,
LD, and WD. SCALM scales these parameters according to fixed rules that are
a function of the parameters units. When the model parameters units are in
meters, the parameter is multiplied by SCALM. For example, the parameter LD
has units in meters, its scaled value is obtained by multiplying the value of LD
by SCALM. When the units are in meters squared, the parameter is multiplied
by SCALM2. If the units are in reciprocal meters, the parameters value is
divided by SCALM. For example, since CGBO is in farads/meter the value of
CGBO is divided by SCALM. When the units are in reciprocal meters squared,
then the parameter is divided by SCALM2. The scaling equations specific to
each CAPOP level are given in the individual CAPOP subsections.

MOS Gate Capacitance Model Parameters

Basic Gate Capacitance Parameters

Name(Alias)

Units

CAPOP

Default

Description

2.0

capacitance model selector

COX (CO)

F/m2

3.453e4

oxide capacitance. If COX is not input, it is calculated

from TOX. The default value corresponds to the TOX
default of 1e-7:
COXscaled = COX/SCALM2

TOX

1e-7

represents the oxide thickness, calculated from COX

when COX is input. Program uses default if COX is not
specified. For TOX>1, unit is assumed to be
Angstroms. There can be a level-dependent default
that overrides.

15-72

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

73 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Gate Overlap Capacitance Model Parameters

Name(Alias)

Units

Default

Description

CGBO (CGB)

F/m

0.0

gate-bulk overlap capacitance per meter channel length. If

CGBO is not set but WD and TOX are set, then CGBO is
calculated.
CGBOscaled = CGBO/SCALM

CGDO (CGD,
C2)

F/m

0.0

gate-drain overlap capacitance per meter channel width. If

CGDO is not set but LD or METO and TOX are set, then
CGDO is calculated.
CGDOscaled = CGDO/SCALM

CGSO (CGS,
C1)

F/m

0.0

gate-source overlap capacitance per meter channel width.

If CGSO is not set but LD or METO and TOX are set, then
CGSO is calculated.
CGSOscaled = CGSO/SCALM

LD (LATD,
DLAT)

lateral diffusion into channel from source and drain

diffusion. When both LD and XJ are unspecified: LD
default=0.0. If LD is not set but XJ is specified, then LD is
calculated from XJ. LD default=0.75 XJ for all levels
except Level 4, for which LD default=0.75.

LDscaled = LD SCALM

Level 4: LDscaled = LD XJ SCALM

METO

0.0

fringing field factor for gate-to-source and gate-to-drain

overlap capacitance calculation METOscaled = METO
SCALM

WD

0.0

lateral diffusion into channel from bulk along width

WDscaled = WD SCALM

Star-Hspice Manual, Release 1998.2

15-73

[Link] : hspice.ch16

74 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Meyer Capacitance Parameters CAPOP=0, 1, 2

Name(Alias)

Units

Default

Description

CF1

0.0

modified MEYER control for transition of cgs from

depletion to weak inversion for CGSO (only for
CAPOP=2)

CF2

0.1

modified MEYER control for transition of cgs from

weak to strong inversion region (only for
CAPOP=2)

CF3

1.0

modified MEYER control for transition of cgs and

cgd from saturation to linear region as a function of
vds (only for CAPOP=2)

CF4

50.0

modified MEYER control for contour of cgb and cgs

smoothing factors

CF5

0.667

modified MEYER control capacitance multiplier for

cgs in saturation region

CF6

500.0

modified MEYER control for contour of cgd

smoothing factor

CGBEX

0.5

cgb exponent (only for CAPOP=1)

Charge Conservation Parameter, CAPOP=4

Name(Alias)
XQC

15-74

Units

Default

Description

0.5

coefficient of channel charge share attributed to drain;

its range is 0.0 to 0.5. This parameter applies only to
CAPOP=4 and some of its level-dependent aliases.

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

75 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

XQC & XPART Specification for CAPOP=4, 9, 11, 12 and 13

Parameter rule for gate capacitance charge sharing coefficient, XQC & XPART,
in the saturation region:
If neither XPART or XQC is specified, the 0/100 model is used.
If both XPART and XQC are specified, XPART overrides XQC.
If XPART is specified:
XPART=0 40/60
XPART=0.4 40/60
XPART=0.5 50/50
XPART=1 0/100
XPART = any other value less than 1 40/60
XPART >1 0/100If XQC is specified:
XQC=0 0/100
XQC=0.4 40/60
XQC=0.5 50/50
XQC=1 0/100
XQC = any other value less than 1 40/60
XQC>1 0/100
The only difference is the treatment of the parameter value 0.
After XPART/XQC is specified, the gate capacitance is ramped from 50/50 at
Vds=0 volt (linear region) to the value (with Vds sweep) in the saturation region
specified by XPART/XQC. This charge sharing coefficient ramping will assure
the smoothness of the gate capacitance characteristic.

Star-Hspice Manual, Release 1998.2

15-75

[Link] : hspice.ch16

76 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Overlap Capacitance Equations

The overlap capacitors are common to all models. You can input them explicitly,
or the program calculates them. These overlap capacitors are added into the
respective voltage-variable capacitors before integration and the DC operating
point reports the combined parallel capacitance.
Gate to Bulk Overlap Capacitance

If CGBO is specified,
CGBOeff = M Leff CGBOscaled
Otherwise,
CGBOeff = 2 WDscaled Leff COXscaled M
Gate to Source Overlap Capacitance

If CGSO is specified,
CGSOeff = Weff CGSOscaled
Otherwise,
CGSOeff = Weff ( LDscaled + METOscaled ) COXscaled
Gate to Drain Overlap Capacitance

If CGDO is specified,
CGDOeff = Weff CGDOscaled
Otherwise,
CGDOeff = Weff ( LDscaled + METOscaled ) COXscaled

15-76

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

77 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

The Leff is calculated for each model differently, and it is given in the
corresponding model section. The Weff calculation is not quite the same as weff
given in the model Level 1, 2, 3, 6, 7 and 13 sections.
Weff = M ( Wscaled WMLT + XWscaled )
The 2WDscaled factor is not subtracted.

CAPOP=0 SPICE Meyer Gate Capacitances

Definition:

cap = COXscaled Weff Leff

Gate-Bulk Capacitance (cgb)
Accumulation, vgs vth-PH1

cgb = cap
Depletion, vgs < vth

vth vgs
cgb = cap ---------------------PH 1
Strong Inversion, vgs vth

cgb = 0

Star-Hspice Manual, Release 1998.2

15-77

[Link] : hspice.ch16

78 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Gate-Source Capacitance (cgs)

PHI
2

Accumulation, vgs vth -----------

cgs = 0
Depletion, vgs vth

cap ( vgs cth )

cgs = CF5 cap + ----------------------------------------0.75 PHI
Strong Inversion Saturation Region, vgs > vth and vds vdsat

cgs = CF5 cap

Strong Inversion Linear Region, vgs > vth and vds < vdsat
2
vdsat vds
1 ---------------------------------------------------------------------
cgs = CF5 cap
2 ( vdsat + vsb ) vds vsb

Gate-Drain Capacitance (cgd)

The gate-drain capacitance has value only in the linear region.
Strong Inversion Linear Region, vgs > vth and vds < vdsat
2
vdsat + vsb
1 ---------------------------------------------------------------------
cgd = CF5 cap
2 ( vdsat + vsb ) vds vsb

Example

*file [Link]---capop=0 capacitances

*
*this file is used to create spice meyer gate c-v

15-78

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

79 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

plots
**
*(capop=0) for low vds and high vds
*
.options acct=2 post=2 dccap=1 nomod
.dc vg1 -1 4 .01
.print dc cgb_vdsp05=par(-lx21(m1))
cgd_vdsp05=par(-lx19(m1))
+ cgs_vdsp05=par(-lx20(m1))
.print dc cgb_vdsp8=par(-lx21(m2)) cgd_vdsp8=par(lx19(m2))
+ cgs_vdsp8=par(-lx20(m2))
*******************************************
m1 d1 g1 0 0 mn l=5e-6 w=20e-6 $ create capacitances
for vds=0.05
m2 d2 g1 0 0 mn l=5e-6 w=20e-6 $ create capacitances
for vds=0.80
*******************************************
vd1 d1 0 dc 0.05
vd2 d2 0 dc 0.80
vg1 g1 0 dc 0.0
*
*********************************************
*
.model mn nmos ( level = 2
+ vto = 1.0 gamma = 1.40 nsub = 7.20e15
+ uo = 817 ucrit = 3.04e4 phi=.6
+ uexp = 0.102 neff = 1.74 vmax = 4.59e5
+ tox = 9.77e-8 cj = 0 cjsw = 0 js = 0
+ capop=0 )
.end

Star-Hspice Manual, Release 1998.2

15-79

[Link] : hspice.ch16

80 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Figure 15-19: CAPOP=0 Capacitances

CAPOP=1 Modified Meyer Gate Capacitances

Define
cap = COXscaled Weff Leff
In the following equations, G , G + , D , and D + are smooth factors. They are
not user-defined parameters.
Gate-Bulk Capacitance (cgb)
Accumulation, vgs vfb vsb

cgb = cap

15-80

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

81 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Depletion, vgs vth

cap
cgb = --------------------------------------------------------------------------vgs + vsb vfb CGBEX
1 + 4 ------------------------------------GAMM A 2
Strong Inversion, vgs > vth

G + cap
cgb = ---------------------------------------------------------------------------------------------------------------------------------GAMMA ( vsb + PHI ) 2 + vsb + PHI CGBEX
1 + 4 -------------------------------------------------------------------------------------------GAMM A 2
Note: In the above equations, GAMMA is replaced by effective for model
level higher than 4.
Gate-Source Capacitance (cgs)
Low vds (vds < 0.1)
Accumulation, vgs vth

cgs = CF5 cap G D

Weak Inversion, vgs < vth + 0.1

vgs vth

0.1 vds 2
cgs = CF5 cap ---------------------- 1 ---------------------- D + D
0.2 vds
0.1

Strong Inversion, vgs vth + 0.1

2

vgs vth vds

cgs = CF5 cap 1 -------------------------------------------------
2 ( vgs vth ) vds

Star-Hspice Manual, Release 1998.2

15-81

[Link] : hspice.ch16

82 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

High vds (vds 0.1)

Accumulation, vgs vth

cgs = CF5 cap G

Saturation Region, vgs < vth + vds

cgs = CF5 cap

Linear Region, vgs vth + vds
2
vgs vth vds

cgs = CF5 cap 1 -------------------------------------------------

2 ( vgs vth ) vds

Gate-Drain Capacitance (cgd)

Low vds (vds < 0.1)
Accumulation, vgs vth

cgd = CF5 cap G D +

Weak Inversion, vgs < vth + 0.1

vgh
0.1 2
D + + vgs
--------------------- D +
----------------------max
0
,
1

cgd = CF5 cap

0.2 vds
0.1

Strong Inversion, vgs vth + 0.1

2
vgs vth
+

cgd = CF5 cap max D , 1 ------------------------------------------------2 ( vgs vth ) vds

15-82

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

83 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

High vds (vds 0.1)

Accumulation, vgs vth

cgd = CF5 cap G D +

Saturation Region, vgs < vth + vds

cgd = CF5 cap D +

Strong Inversion, vgs vth + vds
2

vgs vth
cgd = CF5 cap max D +, 1 -------------------------------------------------
2 ( vgs vth ) vds

Example

*file [Link]---capop1 capacitances

*
*this file creates the modified meyer gate c-v plots
*(capop=1) for low vds and high vds.
*
.options acct=2 post=2 dccap=1 nomod
.dc vg1 -1 4 .01
.print dc cgb_vdsp05=par(-lx21(m1))
cgd_vdsp05=par(-lx19(m1))
+ cgs_vdsp05=par(-lx20(m1))
.print dc cgb_vdsp8=par(-lx21(m2)) cgd_vdsp8=par(lx19(m2))
+ cgs_vdsp8=par(-lx20(m2))
*******************************************
m1 d1 g1 0 0 mn l=5e-6 w=20e-6 $creates capacitances
for vds=0.05
m2 d2 g1 0 0 mn l=5e-6 w=20e-6 $creates capacitances

Star-Hspice Manual, Release 1998.2

15-83

[Link] : hspice.ch16

84 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

for vds=0.80
*******************************************
vd1 d1 0 dc 0.05
vd2 d2 0 dc 0.80
vg1 g1 0 dc 0.0
*
*********************************************
*
.model mn nmos ( level = 2
+ vto = 1.0 gamma = 1.40 nsub = 7.20e15
+ tox = 9.77e-8 uo = 817 ucrit = 3.04e4
+ uexp = 0.102 neff = 1.74 vmax = 4.59e5
+ phi = 0.6 cj = 0 cjsw = 0 js = 0
+ capop=1 )
.end

Figure 15-20: CAPOP=1 Capacitances

15-84

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

85 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

CAPOP=2 Parameterized Modified Meyer Capacitances

The CAPOP=2 Meyer capacitance model is the more general form of Meyer
capacitance. The CAPOP=1 Meyer capacitance model is the special case of
CAPOP=2 when CF1=0, CF2=0.1, and CF3=1.
In the following equations, G , G + , D , and DD + are smooth factors. They are
not user-defined parameters.
Definition

cap = COXscaled Weff Leff

Gate-Bulk Capacitance (cgb)
Accumulation, vgs vfb - vsb

cgb = cap
Depletion, vgs vth

cap
cgs = -----------------------------------------------------------------vgs + vsb vfb 1 2
1 + 4 ------------------------------------
GAMM A 2
Inversion, vgs > vth

G + cap
cgb = ------------------------------------------------------------------------------------------------------------------------------GAMMA ( PHI + vsb ) 1 2 + PHI + vsb 1 2
1 + 4 -------------------------------------------------------------------------------------------------GAMM A 2
Note: In the above equations, GAMMA is replaced by effective for model
level higher than 4.

Star-Hspice Manual, Release 1998.2

15-85

[Link] : hspice.ch16

86 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Gate-Source Capacitance (cgs)

Low vds (vds < 0.1)
Accumulation, vgs < vth CF1

cgs = CF5 cap G D

Depletion, vgs vth + CF2 CF1
2
vgs vth + CF1

vds
cgs = CF5 cap ---------------------------------------- 1 CF2 --------------------------------- D + D
CF2
2 CF2 vds

Strong Inversion, vgs > vth + max (CF2 CF1, CF3 vds) UPDATE=0
Strong Inversion, vgs > vth + CF2 CF1,UPDATE=1
2
vgs vth + CF1 vds

------------------------------------------------------------------
1
cgs = CF5 cap
2 ( vgs vth + CF1 ) vds

High vds (vds 0.1)

Accumulation, vgs < vth CF1

cgs = CF5 cap G D +,

CF1 0

cgs = CF5 cap G ,

CF1 = 0

Weak Inversion, vgs < vth + CF2 CF1, CF1 0

vgs vth + CF1

cgs = CF5 cap max ----------------------------------------, D +

CF2

15-86

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

87 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Saturation Region, vgs < vth + CF3 vds

cgs = CF5 cap

Linear Region, vgs > vth + CF3 vds
2
vgs vth vds

cgs = CF5 cap 1 ------------------------------------------------- , UPDATE=0, CF1=0

2 ( vgs vth ) vds

2
vgs vth CF3 vds

cgs = CG5 cap 1 ------------------------------------------------------------------ , UPDATE=1

2 ( vgs vth ) CF3 vds

Gate-Drain Capacitance (cgd)

Low vds, (vds < 0.1)
Accumulation, vgs vth CF1

cgd = CF5 cap G D

Weak Inversion, vgs < vth + CF2 CF1
2
CF2
vgs vth + CF1- max 0, 1 -------------------------------- D
cgd = CF5 cap D + --------------------------------------
2 CF2 vds
CF2

Strong Inversion, vgs vth + CF2 CF1

2
vgs vth + CF1
D , 1 ------------------------------------------------------------------
cgd = CF5 cap max
2 ( vgs vth + CF1 ) vds

High vds (vds > 0.1)

Star-Hspice Manual, Release 1998.2

15-87

[Link] : hspice.ch16

88 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Accumulation, vgs vth CF1

cgd = CF5 cap G DD +

Saturation Region, vgs vth + CF3 vds

cgd = CF5 cap DD +

Note: In the above equation, DD+ is a function of CF3, if UPDATE=1.
Linear Region, vgs > vth + CF3 vds
2

vgs vth
cgd = CF5 cap max DD +, 1 ------------------------------------------------------------------
2 ( vgs vth ) CF3 vds

Example

*file [Link] capop=2 capacitances

*
*this file creates parameterized modified gate
capacitances
*(capop=2) for low and high vds.
*
.options acct=2 post=2 dccap=1 nomod
.dc vg1 -1 4 .01
.print dc cgb_vdsp05=par(-lx21(m1))
cgd_vdsp05=par(-lx19(m1))
+ cgs_vdsp05=par(-lx20(m1))
.print dc cgb_vdsp8=par(-lx21(m2)) cgd_vdsp8=par(lx19(m2))
+ cgs_vdsp8=par(-lx20(m2))
*******************************************
m1 d1 g1 0 0 mn l=5e-6 w=20e-6 $creates capacitances
for vds=0.05

15-88

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

89 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

m2 d2 g1 0 0 mn l=5e-6 w=20e-6 $creates capacitances

for vds=0.80
*******************************************
vd1 d1 0 dc 0.05
vd2 d2 0 dc 0.80
vg1 g1 0 dc 0.0
*
*********************************************
*
.model mn nmos ( level = 2
+ vto = 1.0 gamma = 1.40 nsub = 7.20e15
+ tox = 9.77e-8 uo = 817 ucrit = 3.04e4
+ uexp = 0.102 neff = 1.74 phi = 0.6
+ vmax = 4.59e5 cj = 0 cjsw = 0 js = 0
+ capop=2 cf1=0.15 cf2=.2 cf3=.8 cf5=.666)
.end

Figure 15-21: CAPOP=2 Capacitances

Star-Hspice Manual, Release 1998.2

15-89

[Link] : hspice.ch16

90 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

CAPOP=3 Gate Capacitances (Simpson Integration)

The CAPOP 3 model is the same set of equations and parameters as the CAPOP
2 model. The charges are obtained by Simpson numeric integration instead of the
box integration found in CAPOP models 1, 2, and 6.
Gate capacitances are not constant values with respect to voltages. The
capacitance values can best be described by the incremental capacitance:
dq(v)
C(v) = -----------dv
where q(v) is the charge on the capacitor and v is the voltage across the capacitor.
The formula for calculating the differential is often intractable or difficult to
derive. Furthermore, the voltage is required as the accumulated capacitance over
time. The timewise formula is:
dv(t)
dq(v)
i(t) = ------------ = C(v) ----------dt
dt
The charge is:
v

q(v) =

C(v) dv
0

For the calculation of current:

v

d
dq(v)
i(t) = ------------ = C(v) dv
d t
dt
0

For small intervals:

1
dq(v)
I (n + 1) = ------------ = -------------------------------t(n + 1) t(n)
dt

V (n + 1)

C(v) dv

V (n)

The integral has been approximated in SPICE by:

15-90

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

91 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

V (n + 1) V (n)
C [ V (n + 1) ] + C [ V (n) ]
I (n + 1) = ------------------------------------- --------------------------------------------------------
t(n + 1) t(n)

2
This last formula is the trapezoidal rule for integration over two points. The
charge is approximated as the average capacitance times the change in voltage.
If the capacitance is nonlinear, this approximation can be in error. The charge
can be estimated accurately by using Simpsons numerical integration rule. This
method provides charge conservation control.
To use this model, set the model parameter CAPOP to 3 and use the existing
CAPOP=2 model parameters. The OPTIONS settings RELV (relative voltage
tolerance), RELMOS (relative current tolerance for MOSFETs), and CVTOL
(capacitor voltage tolerance) might have to be modified. The default of 0.5 is a
good nominal value for CVTOL. The option CVTOL sets the number of
integration steps with the formula:
V (n + 1) V (n)
n = ---------------------------------------CVTOL
The effect of using a large value for CVTOL is to decrease the number of
integration steps for the time interval n to n+1; this yields slightly less accurate
integration results. Using a small CVTOL value increases the computational
load, in some instances severely.

CAPOP=4 Charge Conservation Capacitance Model

The charge conservation method (See Ward, Donald E. and Robert W. Dutton
A Charge-Oriented Model for MOS Transistor) is not implemented correctly
into the SPICE2G.6 program. There are errors in the derivative of charges,
especially in Level 3 models. Also channel charge partition is not continuous
going from linear to saturation regions.
In HSPICE the above problems are corrected. By specifying model parameter
CAPOP=4, the level-dependent recommended charge conservation model is
selected. The ratio of channel charge partitioning between drain and source is
selected by the model parameter XQC. For example, if XQC=.4 is set, then the
saturation region 40% of the channel charge is associated to drain and the

Star-Hspice Manual, Release 1998.2

15-91

[Link] : hspice.ch16

92 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

remaining 60% is associated to the source. In the linear region, the ratio is 50/
50. In HSPICE an empirical equation is used to make the transition from 50/50
(linear region) to 40/60 (saturation region) smoothly.
Also, the capacitance coefficients which are the derivative of gate, bulk, drain,
and source charges are continuous. Model Levels 2, 3, 4, 6, 7, and 13 have a
charge conservation capacitance model which is invoked by setting CAPOP=4.
In the following example the charge conservation capacitances CAPOP=4 and
the improved charge conservation capacitance CAPOP=9 for the model Level 3
only is compared. The capacitances CGS and CGD for CAPOP=4 model
(SPICE2G.6) show discontinuity at the saturation and linear region boundary
while the CAPOP=9 model does not have discontinuity. For the purpose of
comparison the modified Meyer capacitances (CAPOP=2) also is provided. The
shape of CGS and CGD capacitances resulting from CAPOP=9 are much closer
to those of CAPOP=2.
Example

FILE [Link] CHARGE CONSERVATION

CAPOP=4,9 LEVEL=3
*
* CGGB = LX18(M) DERIVATIVE OF QG
VGB.
* CGDB = LX19(M) DERIVATIVE OF QG
VDB.
* CGSB = LX20(M) DERIVATIVE OF QG
VSB.
* CBGB = LX21(M) DERIVATIVE OF QB
VGB.
* CBDB = LX22(M) DERIVATIVE OF QB
VDB.
* CBSB = LX23(M) DERIVATIVE OF QB
VSB.
* CDGB = LX32(M) DERIVATIVE OF QD
VGB.
* CDDB = LX33(M) DERIVATIVE OF QD

15-92

MOSFET CAPS.,

WITH RESPECT TO
WITH RESPECT TO
WITH RESPECT TO
WITH RESPECT TO
WITH RESPECT TO
WITH RESPECT TO
WITH RESPECT TO
WITH RESPECT TO

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

93 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

VDB.
* CDSB = LX34(M) DERIVATIVE OF QD WITH RESPECT TO
VSB.
* THE SIX NONRECIPROCAL CAPACITANCES CGB, CBG, CGS,
CSG, CGD, AND CDG
* ARE DERIVED FROM THE ABOVE CAPACITANCE FACTORS.
*
.OPTIONS DCCAP=1 POST NOMOD
.PARAM XQC=0.4 CAPOP=4
.DC VGG -2 5 .02
.print CGB=PAR(LX18(M)+LX19(M)+LX20(M))
+ CBG=PAR(-LX21(M))
+ CGS=PAR(-LX20(M))
+ CSG=PAR(LX18(M)+LX21(M)+LX32(M))
+ CGD=PAR(-LX19(M))
+ CDG=PAR(-LX32(M))
.print
+ CG =par(LX14(M))
VDD D 0 2.5
VGG G 0 0
VBB B 0 -1
M D G 0 B MOS W=10U L=5U
.MODEL MOS NMOS LEVEL=3 COX=1E-4 VTO=.3 CAPOP=CAPOP
+ UO=1000 GAMMA=.5 PHI=.5 XQC=XQC
+ THETA=0.06 VMAX=1.9E5 ETA=0.3 DELTA=0.05 KAPPA=0.5
XJ=.3U
+ CGSO=0 CGDO=0 CGBO=0 CJ=0 JS=0 IS=0
*
.ALTER
.PARAM CAPOP=9
.END

Star-Hspice Manual, Release 1998.2

15-93

[Link] : hspice.ch16

94 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Figure 15-22: CAPOP=4, 9 Capacitances for Level 3 Model

15-94

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

95 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

Figure 15-23: CAPOP=2 Capacitances for Level 3 Model

The following example tests the charge conservation capacitance model (Yang,
P., B.D. Epler, and P.K. Chaterjee An Investigation of the Charge Conservation
Problem) and compares the Meyer model and charge conservation model. As the
following graph illustrates, the charge conservation model gives more accurate
results.
Example

*FILE:[Link] CHARGE CONSERVATION TEST FOR CHARGE

PUMP CIRCUIT
*TEST CIRCUIT OF A MOSFET CAPACITOR AND A LINEAR
CAPACITOR
.OPTIONS ACCT LIST NOMOD POST
+ RELTOL=1E-3 ABSTOL=1E-6 CHGTOL=1E-14
.PARAM CAPOP=2

Star-Hspice Manual, Release 1998.2

15-95

[Link] : hspice.ch16

96 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

.OP
.TRAN 2NS 470NS SWEEP CAPOP POI 2 2,9
.IC V(S)=1
*
VIN G 0 PULSE 0 5 15NS 5NS 5NS 50NS 100NS
VBB 0 B PULSE 0 5 0NS 5NS 5NS 50NS 100NS
VDD D D- PULSE 0 5 25NS 5NS 5NS 50NS 100NS
*
RC D- S 10K
C2 S 0 10P
M1 D G S B MM W=3.5U L=5.5U
+AD=100P AS=100P PD=50U PS=50U NRD=1 NRS=1
*
.MODEL MM NMOS LEVEL=3 VTO=0.7 KP=50E-6 GAMMA=0.96
+PHI=0.5763 TOX=50E-9 NSUB=1.0E16 LD=0.5E-6
+VMAX=268139 THETA=0.05 ETA=1 KAPPA=0.5 CJ=1E-4
+CJSW=0.05E-9 RSH=20 JS=1E-8 PB=0.7
+CGD=0 CGS=0 IS=0 JS=0
+CAPOP=CAPOP
*
.PRINT TRAN VOUT=V(S) VIN=V(D) VBB=V(B)
+ VDD=V(D,D-)
.END

15-96

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

97 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

D
B

VBB

+
-

+
-

VDD
DRc

VIN

+
-

Figure 15-24: Charge Pump Circuit

Star-Hspice Manual, Release 1998.2

15-97

[Link] : hspice.ch16

98 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

Figure 15-25: Charge Conservation Test: CAPOP=2 or 9

The following example applies a pulse through a constant capacitance to the gate
of MOS transistor. Ideally, if the model conserves charge, the voltage at node 20
should becomes zero when the input pulse goes to zero. Consequently, the model
that provides voltage closer to zero for node 20 conserves charge better. As
results indicate, the CAPOP=4 model is better than the CAPOP=2 model.
This example also compares the charge conservation models in SPICE2G.6 and
HSPICE. The results indicate that HSPICE is more accurate.
Example

FILE MCAP2_A.SP
.OPTIONS SPICE NOMOD DELMAX=.25N
.PARAM CAPOP=4
.TRAN 1NS 40NS SWEEP CAPOP POI 2 4 2
.PRINT TRAN V(1) V(20)
VIN 1 0 PULSE (0V, 5V, 0NS, 5NS, 5NS, 5NS, 20NS)

15-98

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

99 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

CIN 1 20 1PF
RLEAK 20 0 1E+12
VDD 10 0 1.3
VBB 30 0 -1
M 10 20 0 30 MOS W=10U L=5U
.MODEL MOS NMOS LEVEL=2 TOX=250E-10 VTO=.3
+ UO=1000 LAMBDA=1E-3 GAMMA=.5 PHI=.5 XQC=.5
+ THETA=0.067 VMAX=1.956E5 XJ=.3U
+ CGSO=0 CGDO=0 CGBO=0
+ CJ=0 JS=0 IS=0
+ CAPOP=CAPOP
.END

VDD=2.5v
10

1PF
20

VIN

30
VBB= -1V

1E12

Figure 15-26: Charge Conservation Test Circuit

Star-Hspice Manual, Release 1998.2

15-99

[Link] : hspice.ch16

100 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

CAPOP=5 Gate Capacitance

Use CAPOP=5 for no capacitors, and HSPICE will not calculate gate
capacitance.

CAPOP=6 AMI Gate Capacitance Model

Define:
( vth + vfb )
vgst = vgs --------------------------2
ox
cox = ------------------------------- Weff Leff
TOX 1e-10
The gate capacitance cgs is calculated according to the equations below in the
different regions.
0.5 (vth + vfb) > vgs

cgs = 0
0.5 (vth + vfb) <vgs <vth

For vgst < vds,

4 cox vgst
cgs = --- -----------------------3 vth vfb
For vgst > vds,
4 cox vgst
cgs = arg --- -----------------------3 vth vfb
vgs > vth

For vgst < vds,

2
cgs = --- cox
3

15-100

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

101 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

For vgst > vds,

2
cgs = arg --- cox
3
( 3 vgst 2 vds )
arg = vgst --------------------------------------------( 2 vgst vds ) 2
The gate capacitance cgd is calculated according to the equations below in the
different regions.
vgs < vth

cgd = 0
vgs > vth and vgst < vds

cgd = 0
vgs > vth and vgst > vds

2
cgd = arg --- cox
3
( vgst vds )
arg = ( 3 vgst vds ) ---------------------------------------2( 2 vgst vds )
The gate capacitance cgb is combined with the calculation of both oxide
capacitance and depletion capacitance as shown below.
cgbx cd
cgb = -----------------------cgbx + cd
Oxide capacitance cgbx, is calculated as:
cgbx = cox cgs cgd
Depletion capacitance cd is voltage-dependent.

Star-Hspice Manual, Release 1998.2

15-101

[Link] : hspice.ch16

102 Thu Jul 23 19:10:43 1998

Performing MOSFET Impact Ionization

Introducing MOSFET

si
cd = ------- Weff Leff
wd
2 si vc 1 2
wd = -------------------------
q NSUB
vc = The effective voltage from channel to substrate (bulk)
The following shows the equations for vc under various conditions:
vgs + vsb < vfb

vc = 0
vgs + vsb > vfb

vc = vgs + vsb vfb

vgst > 0, vgs < vth, vgst < vds

1
3
vc = --- ( vth vfb ) + --- vgst + vsb
2
2
vgst > 0, vgs < vth, vgst > vds

1
1
vc = --- ( vth vfb ) + vgst + --- vds + vsb
2
2
vgs > vth, vgst < vds

1
vc = vth vfb + --- vgst + vsb
2
vgs > vth, vgst > vds

1
vc = vth vfb + --- vds + vsb
2

15-102

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

103 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Performing MOSFET Impact Ionization

CAPOP=13 BSIM 1-based Charge-Conserving Gate

Capacitance Model
See Level 13 BSIM Model on page 16-104.

CAPOP=39 BSIM2 Charge-Conserving Gate

Capacitance Model
See Level 39 BSIM2 Model on page 16-183.

Effective Length and Width for AC Gate Capacitance

Calculations
For some MOS processes and parameter extraction methods, it is helpful to
allow different Leff and Weff values for AC analysis than for DC analysis. For
AC gate capacitance calculations, model parameters LDAC and WDAC can be
substituted for LD and WD in Leff and Weff calculations. LD and WD are still
used in Leff and Weff calculations for DC current.
To use LDAC and WDAC, enter XL, LD, LDAC, XW, WD, WDAC in the
.MODEL statement. The model uses the following equations for DC current
calculations
Leff = L + XL 2 LD
Weff = W + XW 2 WD
and uses the following equations for AC gate capacitance calculations

Leff = L + XL 2 LDAC
Weff = W + XW 2 WDAC
The noise calculations use the DC Weff and Leff values.

Use LDAC and WDAC with the standard HSPICE parameters XL, LD, XW, and
WD. They should not be used with other parameters such as DL0 and DW0.

Star-Hspice Manual, Release 1998.2

15-103

[Link] : hspice.ch16

104 Thu Jul 23 19:10:43 1998

Using Noise Models

Introducing MOSFET

Using Noise Models

This section describes how to use noise models.

Noise Parameters

Name(Alias)

Units

Default

Description

AF

1.0

flicker noise exponent

KF

0.0

flicker noise coefficient. Reasonable values for KF

are in the range 1e-19 to 1e-25 V2F.

NLEV

2.0

noise equation selector

GDSNOI

1.0

channel thermal noise coefficient (use with

NLEV=3)

Noise Equations
The HSPICE MOSFET model noise equations have a selector parameter NLEV
that is used to select either the original SPICE flicker noise or an equation
proposed by Gray and Meyer.
Thermal noise generation in the drain and source resistors is modeled by the two
sources inrd and inrs (units amp/(Hz)1/2), as shown in Figure 15-4. The values
of these sources can be determined by:
4kt 1 / 2
inrs = --------
rs
4kt 1 / 2
inrd = --------
rd
Channel thermal noise and flicker noise are modeled by the current source ind
and defined by the equation:
15-104

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

105 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Noise Models

ind = ( channel thermal noise ) + ( flicker noise )

If the model parameter NLEV is less than 3, then

8kT gm 1 / 2
channel thermal noise = ----------------------

3
The above formula is used in both saturation and linear regions, which can lead
to wrong results in the linear region. For example, at VDS=0, channel thermal
noise becomes zero because gm=0. This calculation is physically impossible. If
NLEV model parameter is set to 3, HSPICE uses a different equation which is
valid in both linear and saturation regions. See Tsivids, Yanis P., Operation and
Modeling of the MOS Transistor, McGraw-Hill, 1987, p. 340.
For NLEV=3,
2

8kt
1+a+a
channel thermal noise = -------- ( vgs vth ) ------------------------ GDSNOI
3

1+a

12

where
vds
a = 1 -------------vdsat
a = 0

Linear region
Saturation region

The two parameters AF and KF are used in the small-signal AC noise analysis
to determine the equivalent flicker noise current generator connected between
drain and source.
NLEV=0 (SPICE):

KF Ids AF 1 / 2
flicker noise = --------------------------------------- COX Lef f 2 f

Star-Hspice Manual, Release 1998.2

15-105

[Link] : hspice.ch16

106 Thu Jul 23 19:10:43 1998

Using Noise Models

Introducing MOSFET

For NLEV=1 the Leff2 in the above equation is replaced by Weff Leff.
NLEV=2, 3:
1/2
KF gm 2

flicker noise = ---------------------------------------------------------- COX Weff Leff f AF

Noise Summary Printout Definitions

RD, V2/Hz

output thermal noise due to drain resistor

RS, V2/Hz

output thermal noise due to source resistor

RX

transfer function of channel thermal or flicker noise to the

output. This is not a noise, it is a transfer coefficient, reflecting
the contribution of channel thermal or flicker noise to the
output.

ID, V2/Hz

output channel thermal noise: ID = RX2 (channel thermal noise)2

FN, V2/Hz

output flicker noise: FN = RX2 (flicker noise)2

TOT, V2/Hz

total output noise: TOT = RD + RS + ID + FN

15-106

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

107 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Temperature Parameters and Equations

Using Temperature Parameters and Equations

Temperature Parameters
The following temperature parameters apply to all MOSFET model levels and
the associated bulk-to-drain and bulk-to-source MOSFET diode within the
MOSFET model. The temperature equations used for the calculation of
temperature effects on the model parameters are selected by the TLEV and
TLEVC parameters.
Temperature Effects Parameters

Name(Alias)

Units

BEX

Default

Description

-1.5

low field mobility, UO, temperature exponent

CTA

1/K

0.0

junction capacitance CJ temperature coefficient. Set

TLEVC to 1 to enable CTA to override default HSPICE
temperature compensation.

CTP

1/K

0.0

junction sidewall capacitance CJSW temperature

coefficient. Set TLEVC to 1 to enable CTP to override
default HSPICE temperature compensation.

EG

eV

energy gap for pn junction diode. Set default=1.11, for

TLEV=0 or 1 and default=1.16, for TLEV=2.

1.17 silicon
0.69 Schottky barrier diode
0.67 germanium
1.52 gallium arsenide
F1EX

Star-Hspice Manual, Release 1998.2

bulk junction bottom grading coefficient

15-107

[Link] : hspice.ch16

108 Thu Jul 23 19:10:43 1998

Using Temperature Parameters and Equations

Introducing MOSFET

Name(Alias)

Units

Default

Description

GAP1

eV/K

7.02e-4

first bandgap correction factor (from Sze, alpha term)

7.02e-4 silicon
4.73e-4 silicon
4.56e-4 germanium
5.41e-4 gallium arsenide
GAP2

1108

second bandgap correction factor (from Sze, beta term)

1108 silicon
636 silicon
210 germanium
204 gallium arsenide
LAMEX

1/K

LAMBDA temperature coefficient

1.0

emission coefficient

MJ

0.5

bulk junction bottom grading coefficient

MJSW

0.33

bulk junction sidewall grading coefficient

PTA

V/K

0.0

junction potential PB temperature coefficient. Set

TLEVC to 1 or 2 to enable PTA to override default
HSPICE temperature compensation.

PTC

V/K

0.0

Fermi potential PHI temperature coefficient. Set TLEVC

to 1 or 2 to enable PTC to override default HSPICE
temperature compensation.

PTP

V/K

0.0

junction potential PHP temperature coefficient. Set

TLEVC to 1 or 2 to enable PTP to override default
HSPICE temperature compensation.

TCV

V/K

0.0

threshold voltage temperature coefficient. Typical values

are +1mV for n-channel and -1mV for p-channel.

15-108

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

109 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Name(Alias)

Units

TLEV

Using Temperature Parameters and Equations

Default

Description

0.0

temperature equation level selector. Set TLEV=1 for

ASPEC style default is SPICE style.

When option ASPEC is invoked, the program sets TLEV

for ASPEC.
TLEVC

0.0

temperature equation level selector for junction

capacitances and potentials, interacts with TLEV. Set
TLEVC=1 for ASPEC style. Default is SPICE style.

When option ASPEC is invoked, the program sets

TLEVC for ASPEC.
TRD

1/K

0.0

temperature coefficient for drain resistor

TRS

1/K

0.0

temperature coefficient for source resistor

0.0

saturation current temperature exponent. Use XTI=3 for

silicon diffused junction. Set XTI=2 for Schottky barrier
diode.

XTI

Star-Hspice Manual, Release 1998.2

15-109

[Link] : hspice.ch16

110 Thu Jul 23 19:10:43 1998

Using Temperature Parameters and Equations

Introducing MOSFET

MOS Temperature Coefficient Sensitivity Parameters

Model levels 13 (BSIM1), 39 (BSIM2), and 28 (METAMOS) have length and
width sensitivity parameters associated with them as shown in the following
table. These parameters are used in conjunction with the Automatic Model
Selector capability and enable more accurate modelling for various device sizes.
The default value of each sensitivity parameter is zero to ensure backward
compatibility.
Table 15-7:
Sensitivity Parameters
Parameter

Description

Length

Width

Product

BEX

low field mobility, UO, temperature exponent

LBEX

WBEX

PBEX

FEX

velocity saturation temperature exponent

LFEX

WFEX

PFEX

TCV

threshold voltage temperature coefficient

LTCV

WTCV

PTCV

TRS

temperature coefficient for source resistor

LTRS

WTRS

PTRS

TRD

temperature coefficient for drain resistor

LTRD

WTRD

PTRD

Temperature Equations
This section describes how to use temperature equations.
Energy Gap Temperature Equations
To determine energy gap for temperature compensation use the following
equations.
TLEV = 0 or 1:

tnom 2
egnom = 1.16 7.02e4 ----------------------------------tnom + 1108.0
t2
eg(t) = 1.16 7.02e4 -----------------------t + 1108.0

15-110

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

111 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Temperature Parameters and Equations

TLEV = 2:

tnom 2
egnom = EG GAP1 ----------------------------------tnom + GAP2
t2
eg(t) = EG GAP1 ----------------------t + GAP2
Saturation Current Temperature Equations
isbd(t) = isbd(tnom) e facln / N
isbs(t) = isbs(tnom) e facln / N
where
t
egnom eg(t)
facln = --------------------- ----------- + XTI ln -------------

tnom
vt(tnom) vt(t)
These isbd and isbs are defined in Using a MOSFET Diode Model on page 1529.
MOS Diode Capacitance Temperature Equations
TLEVC selects the temperature equation level for MOS diode capacitance.
TLEVC=0:

t
t
egnom eg(t)
PB(t) = PB ------------- vt(t) 3 ln ------------- + --------------------- ---------- tnom
tnom vt(tnom) vt(t)
t
t
egnom eg(t)
PH P(t) = PHP ------------- vt(t) 3 ln ------------- + --------------------- ---------- tnom
tnom vt(tnom) vt(t)
PB(t)
CBD(t) = CBD 1 + MJ 400u t ------------- + 1

PB

Star-Hspice Manual, Release 1998.2

15-111

[Link] : hspice.ch16

112 Thu Jul 23 19:10:43 1998

Using Temperature Parameters and Equations

Introducing MOSFET

PB(t)
CBS(t) = CBS 1 + MJ 400u t ------------- + 1

PB
PB(t)
CJ (t) = CJ 1 + MJ 400u t ------------- + 1

PB
PH P(t)
CJSW (t) = CJSW 1 + MJSW 400u t ------------------ + 1

PHP
TLEVC=1:

PB ( t ) = PB PTA t
PHP ( t ) = PHP PTP t
CBD ( t ) = CBD ( 1 + CTA t )
CBS ( t ) = CBS ( 1 + CTA t )
CJ = CJ ( 1 + CTA t )
CJSW = CJSW ( 1 + CTP t )
TLEVC=2:

PB ( t ) = PB PTA t
PHP ( t ) = PHP PTP t
PB MJ
CBD ( t ) = CBD --------------
PB ( t )
PB MJ
CBS ( t ) = CBS --------------
PB ( t )

15-112

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

113 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Temperature Parameters and Equations

PB MJ
CJ ( t ) = CJ --------------
PB ( t )
PHP MJSW
CJSW ( t ) = CJSW -------------------
PHP ( t )
TLEVC=3:

PB ( t ) = PB + dpbdt t
PHP ( t ) = PHP + dphpdt t
t
CBD ( t ) = CBD 1 0.5 dpbdt -------

PB
t
CBS ( t ) = CBS 1 0.5 dpbdt -------

PB
t
CJ ( t ) = CJ 1 0.5 dpbdt -------

PB
t
CJSW ( t ) = CJSW 1 0.5 dphpdt ------------

PHP
where for TLEV=0 or 1:

tnom
egnom + 3 vt ( tnom ) + ( 1.16 egnom ) 2 ------------------------------- PB

tnom + 1108
dpbdt = -----------------------------------------------------------------------------------------------------------------------------------------------------------------------tnom
tnom
egnom + 3 vt ( tnom ) + ( 1.16 egnom ) 2 ------------------------------- PHP

tnom + 1108
dphpdt = ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------tnom

Star-Hspice Manual, Release 1998.2

15-113

[Link] : hspice.ch16

114 Thu Jul 23 19:10:43 1998

Using Temperature Parameters and Equations

Introducing MOSFET

and TLEV=2:

tnom
egnom + 3 vt ( tnom ) + ( EG egnom ) 2 ----------------------------------- PB

tnom + GAP2
dpbdt = ------------------------------------------------------------------------------------------------------------------------------------------------------------------------tnom
tnom
egnom + 3 vt ( tnom ) + ( EG egnom ) 2 ----------------------------------- PHP

tnom + GAP2
dphpdt = -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------tnom
Surface Potential Temperature Equations
TLEVC=0:

t
t
egnom
eg ( t )
PHI ( t ) = PHI ------------- vt ( t ) 3 ln ------------- + ----------------------- ------------ tnom
tnom vt ( tnom ) vt ( t )
TLEVC=1:

PHI ( t ) = PHI PTC t

If the PHI parameter is not specified, it is calculated as follows:
NSUB
PHI ( t ) = 2 vt ( t ) ln ----------------
ni
The intrinsic carrier concentration, ni, must be temperature updated, and it is
calculated from the silicon bandgap at room temperature.
1
t 3/2
t
ni = 145e16 ------------- exp EG ------------- 1 -------------------
tnom
2 vt ( t )
tnom
TLEVC=2:

PHI ( t ) = PHI PTC t

15-114

Star-Hspice Manual, Release 1998.2

[Link] : hspice.ch16

115 Thu Jul 23 19:10:43 1998

Introducing MOSFET

Using Temperature Parameters and Equations

TLEVC=3:

PHI ( t ) = PHI + dphidt t

where for TLEV=0 or 1:

tnom
egnom + 3 vt ( tnom ) + ( 1.16 egnom ) 2 ------------------------------- PHI

tnom + 1108
dphidt = --------------------------------------------------------------------------------------------------------------------------------------------------------------------------tnom
and for TLEV=2:

tnom
egnom + 3 vt ( tnom ) + ( EG egnom ) 2 ----------------------------------- PHI

tnom + GAP2
dphidt = ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------tnom
Threshold Voltage Temperature Equations
The threshold temperature equations are:
TLEV=0:

PHI ( t ) PHI egnom eg ( t )

vbi ( t ) = vbi ( tnom ) + ----------------------------------- + -----------------------------------2
2
VTO ( t ) = vbi ( t ) + GAMMA ( PHI ( t ) ) 1 / 2
TLEV=1:

VTO ( t ) = VTO TCV t

vbi ( t ) = VTO ( t ) GAMMA ( PHI ( t ) ) 1 / 2
TLEV=2:

Star-Hspice Manual, Release 1998.2

15-115

[Link] : hspice.ch16

116 Thu Jul 23 19:10:43 1998

Using Temperature Parameters and Equations

Introducing MOSFET

GAMMA
dphidt t
VTO ( t ) = VTO + 1 + ------------------------
2 PH I 1 / 2
vbi ( t ) = VTO ( t ) GAMMA ( PHI ( t ) ) 1 / 2
Mobility Temperature Equations
The MOS mobility temperature equations are:
t BEX
UO ( t ) = UO -------------
tnom
t BEX
KP ( t ) = KP -------------
tnom
t F1EX
F1 ( t ) = F1 -------------
tnom
Channel Length Modulation Temperature Equation
The LAMBDA is modified with temperature if model parameter LAMEX is
specified.
LAMBDA ( t ) = LAMBDA ( 1 + LAMEX t )
Diode Resistance Temperature Equations
Effective drain and source resistance:
RD ( t ) = RS ( 1 + TRD t )
RS ( t ) = RS ( 1 + TRS t )

15-116

Star-Hspice Manual, Release 1998.2