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EGR 265 Final Exam Instructions and Questions

The document is instructions for an EGR 265 final exam to be taken at home and submitted by email by December 20, 2009. It states the exam is open book and notes, calculators are allowed, and students cannot consult others for answers. Violating these rules will result in failure of the course and possible dismissal. Students must print and sign their name, acknowledging they understand the instructions. The exam contains 7 questions involving digital logic design topics like shift registers, memory addressing, counters, sequential circuits, and programmable logic arrays.

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20 views6 pages

EGR 265 Final Exam Instructions and Questions

The document is instructions for an EGR 265 final exam to be taken at home and submitted by email by December 20, 2009. It states the exam is open book and notes, calculators are allowed, and students cannot consult others for answers. Violating these rules will result in failure of the course and possible dismissal. Students must print and sign their name, acknowledging they understand the instructions. The exam contains 7 questions involving digital logic design topics like shift registers, memory addressing, counters, sequential circuits, and programmable logic arrays.

Uploaded by

compuguy1088
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

EGR 265 Final Exam

Date: December 19, 2009

Instructions:

1. This exam is a take-home exam. It is open book and notes. Calculators are allowed.
2. All answers need to be justified (show all your work).
3. You can not consult with anyone for the exam. Violation of the rule including giving or receiving information
will result in an F for the course and possible dismissal from the school. See the student handbook.
4. The exam must be submitted via email by 12 pm, December 20, 2009. No exceptions.

I have read and understand the above instructions.

Student ID:

Name: (Print clearly)

1. The contents of a five-bit register are initially 10010. The register is shifted six times to the right, with the
serial input being 100110. What are the contents of the register after each shift? (2 points)

2. The memory units that follow are specified by the number of words times the number of bits per word. How
many address lines and input-output data lines are needed in each case? And give the number of bytes stored
in the memories. (2 points)

(a) 2G×32
(b) 256K×16

1
3. Design a counter with the following repeated binary sequence: 1, 3, 5, 7. (8 points)
(State diagram, state table, simplified flip-flops I/O equations and logic diagram should be included. If there
are odd number of letters in your last name, use JK flip-flops; otherwise, use D flip-flops. )

2
4. A sequential circuit has two JK flip-flops A and B, two inputs x and y. The circuit is described by the
following flip-flop input equations: (8 points)
JA=Bx+y KA=By
JB=Ay+x KB=A+xy
(a) Draw the logic diagram of the circuit.
(b) Tabulate the state table.
(c) Derive the state equations for A and B.

3
5. A digital system has a clock generator that produces pulses at a frequency of 160 MHz. Design a circuit
(draw the logic diagram) that provides a clock with a cycle time of 50 ns. (2 points)

6. Tabulate the truth table for an 8×4 ROM that implements the Boolean functions
A(x,y,z)=(1,3,5,7)
B(x,y,z)=(2,3,5, 6)
C(x,y,z)=(1,4,6)
D(x,y,z)=(0,2,5)
Considering now the ROM as a memory, specify the memory contents at address 1, 2 and 7. (3 points)

4
7. The following is a truth table of a three-input, four-output combinational circuit:

Inputs Outputs
x y z A B C D
0 0 0 0 1 0 1
0 0 1 0 1 1 0
0 1 0 1 0 0 1
0 1 1 1 1 0 0
1 0 0 0 1 0 1
1 0 1 1 0 1 1
1 1 0 1 0 1 0
1 1 1 0 1 0 1

Tabulate the PAL programming table for the circuit, and mark the fuse map in a PAL diagram shown in Fig. 1.
(5 points)

AND Gates Inputs


Product Term x y z Outputs
1 A=
2
3
4
5 B=
6
7
8
9 C=
10
11
12
13 D=
14
15
16

Fig. 1

5
x x' y y' z z'

2
A
3

6
B
7

10

C
11

12

13

14

D
15

16 x
X Fuse intact
+ Fuse blown
x x' y y' z z'

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