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VLSI Physical Design Interview Questions

This document lists frequently asked interview questions in physical design (PD) for fresh VLSI graduates. It includes questions about the input databases for the PD flow, such as the contents of a netlist and LEF/MW files. It also includes questions related to specific PD stages like floorplanning, power planning, placement, clock tree synthesis, and routing. Example questions asked are about floorplan targets, congestion reduction techniques, buffer insertion, and global versus detailed routing.

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Rohith Raj
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0% found this document useful (0 votes)
37 views3 pages

VLSI Physical Design Interview Questions

This document lists frequently asked interview questions in physical design (PD) for fresh VLSI graduates. It includes questions about the input databases for the PD flow, such as the contents of a netlist and LEF/MW files. It also includes questions related to specific PD stages like floorplanning, power planning, placement, clock tree synthesis, and routing. Example questions asked are about floorplan targets, congestion reduction techniques, buffer insertion, and global versus detailed routing.

Uploaded by

Rohith Raj
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

An essential Guide For VLSI Aspirants: Frequently Asked Interview Questions in Physical Design (PD)

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This blog is meant for fresh college grads who are interested to know, explore and eventually work in the field of
VLSI.
An essential Guide For VLSI
Aspirants
Wednesday, February 13, 2013
Frequently Asked Interview Questions in
Physical Design (PD)
I would like to put the most frequently asked interview questions related to Physical
Design.
Questions on the database required for PD flow:
1. What are the various input database required for backend design flow?
2. What does a netlist consist of?
3. What is PVT? Where do we have information about PVT?
4. What is lookup table?
5. What is LEF/MW?
6. What are various LEF files? What do they contain?
7. What are various MW formats? Why do we different formats?
8. What is captable?
9. What is LVT and HVT? How do they vary in their layout?
10. What are major contents of SDC file?
11. How does the delay of a cell vary with temperature?
Questions on Floorplan:
1. What is a dataflow diagram? Why do we need it?
2. What are floorplan targets?
3. How do you calculate die area for a given design?
4. What are floorplan guidelines?
5. How do you decide the spacing between two macros?
6. What extra care you need to take when you have analog and digital logic both in your
design?
7. What will you do if you have pretiming issues?
8. What would you do if you have huge LOL?
9. What are tap cells and end cap cells? Why do we need them?
10. How do we calculate distance between two latchup cells?
Questions on PowerPlan:
1. What are the targets of Power Plan?
2. What are various power networks required for your design?
3. How do you decide stripe width and spacing?
4. Why are only top metal layers used for power planning?
5. What is Electonmigration? How do we take care while doing power plan?
Mahboob
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An essential Guide For VLSI Aspirants: Frequently Asked Interview Questions in Physical Design (PD)
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Posted by Mahboob at 11:41 PM
Questions on Placement:
1. What are the targets of placement?
2. What is congestion? What are various means of reducig congestion?
3. What are various types of Placement blockages? Explain their usage?
4. What is cell padding? When do we use them?
5. What are various operations that happen while doing placement optimization?
6. What is scan reordering? How does it affect in congestion?
Questions on CTS:
1. What are CTS targets?
2. What is CTS spec file? what does it contain?
3. What do you mean by insertion and skew? How do they affect in timing?
4. Why is it required to balance insertion delay?
5. What is single point and multipoint CTS? What are relative pros and cons?
6. What is the difference between normal buffer and a clock buffer?
7. What is a stop pin, exclude pin, ignore pin in CTS?
8. What is float pin and how it is used?
Questions on Routing:
1. What are routing targets?
2. What is global and detail routing?

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