Subcode EC2254
Subject
Name
Linear Integrated Circuits
Sem IV
Degree B.E.
Branch Electronics and Communication
Sta
Name
Dr.!eeba
"s. #ansi and $.Suja
Date o
%&dation
'art %nit (rou& ).
No
)uestion
* + + + ,hat are the limitations o basic dierentiator-
* + + 2 ,hat is the limitation o basic integrator-
* + + . ,hat are the eatures o an instrumentation am&liier-
* + + 4 ,h/ are acti0e ilters &reerred-
* + + 5 ,hat is the roll1o rate o a irst order ilter-
22.
* + 2 + 3n 4hat does the dam&ing co1eicient o a ilter de&end-
* + 2 2 Dra4 the transer characteristics o an ideal com&arator and a
&ractical com&arator.
* + 2 . Dra4 the circuit diagram o an o&1am& dierentiator circuit.
* + 2 4 5o4 does &recision rectiier dier rom the con0entional rectiier-
* + 2 5 (i0e an a&&lication o in0erting am&liier.
222
B + + + 6i7Design a circuit to im&lement V
8
98.545V
.
:8.2;.V
4
1+.25V
+
12V
2
6<7
6ii7Dra4 and e=&lain a sim&le 3&1am& dierentiator. "ention its
limitations. E=&lain 4ith a neat diagram ho4 it can be o0ercome in
a &ractical dierentiator. Design an o&1am& dierentiator that 4ill
dierentiate an in&ut signal 4ith ma=imum re>uenc/
ma=
9+885?.
6<7
B + + 2 i7 ,hat do /ou understand b/ an Integrator- 627
6ii7 Dra4 and e=&lain an ideal acti0e o&1am& Integrator circuit.647
6iii7 Dra4 the I@3 4a0eorms or integrator 6. A B 9 + B 7
6i07 Deri0e the e=&ression or change in out&ut 0oltage. 6.7
607 List the a&&lications o &ractical Integrator. 6+ B 7
60i7 Design a &ractical integrator circuit 4ith a dc gain o +8C to
integrate a s>uare 4a0e o +8 $5D 647
B + + . ,ith the hel& o circuits and necessar/ e>uationsC e=&lain ho4 log
and antilog com&utations are &erormed using IC ;4+.
B + + 4 (i) Short note on: Differential amplifier and Schmitt trigger.
6ii7Dra4 an adder1subtractor t/&e o circuit 4ith o&1am& to obtain
the relation V
8
96V
+
:V
2
716V
.
:V
4
7 647
6iii7Calculate the out&ut o the ollo4ing circuit. 647
222.
B + 2 + With a neat circuit diagram, Explain second order Low pass
filter and derive the expression for its standard transfer
function and otain the fre!uenc" response.
B + 2 2 6i7 ,hat do /ou understand b/ an instrumentation am&liier. 627
6ii7 State the re>uirements o a good Instrumentation *m&liier. 647
6iii7 Dra4 the circuit diagram and e=&lain the 4orEing o
instrumentation am&liier. 6F7
6i07 "ention the s&eciic ad0antages o three o&1am&
Instrumentation *m&liier circuit.647
B + 2 . 6i)Design a first order #igh$pass filter for cut$off fre!uenc" of
%&#' and pass$and gain of %.(()
6ii7E=&lain a &ositi0e cli&&er circuit using an o&1am& and a diode
4ith neat diagrams.6<7
B + 2 4 6i7Design an o&1am& based second order acti0e lo4 &ass ilter 4ith
cut1o re>uenc/ 2Eh?.6<7
6ii7Dra4 and e=&lain the circuit o a 0oltage to current con0ertor i
the load is
6+7Gloating 647
627(rounded 647
222
* 2 + + Deine Ca&ture rangeC LocE in rangeC 'ull in time.
* 2 + 2 List the a&&lications o the 'LL.
* 2 + . ,hat is the basic &rinci&le o VC3-
* 2 + 4 List the ad0antages o a 0ariable transconductance techni>ue.
* 2 + 5 * 'LL re>uenc/ translator has a center re>uenc/ and in&ut
re>uenc/ +C 4hat 4ill be the out&ut re>uenc/-
222.
* 2 2 + E=&lain the use o L'G in 'LL.
* 2 2 2 ,hat are the a&&lications o 'LL as 0oltage out&ut and as
re>uenc/ out&ut-
* 2 2 . 5o4 0oltage out&ut o a 'LL can be used as re>uenc/
discriminator-
* 2 2 4 ,hat is a t4o >uadrant multi&lier-
* 2 2 5 * 'LL re>uenc/ multi&lier has an in&ut re>uenc/ o HI and a
decade counter is included in the loo&. ,hat 4ill be the re>uenc/
o the 'LL out&ut-
222
22.
B 2 + + Dra4 the unctional blocE schematic o a NE5F5 'LL and e=&lain
the roles o the lo4 &ass ilter and VC3. Deri0e the e=&ression or
the ca&ture range and locE in range o the 'LL.6+F7
B 2 + 2 E=&lainC 4ith necessar/ e>uationsC the basic circuits o
JLineari?ed transconductance multi&lierK and JDierential V1I
con0ertorK. 5ence e=&lain the JGour >uadrant 0ariable
transconductance multi&lierK circuit.
B 2 + . 6i7Dra4 the circuit and e=&lain the 4orEing o one >uadrant
0ariable transconductance analog multi&lier. 6<7
6ii7Dra4 the circuit o a 'LL used as *" detector and e=&lain its
o&eration.6<7
22.
B 2 2 + ,ith suitable blocE diagramC e=&lain the o&eration o 5F5 0oltage
controlled oscillator. *lso deri0e an e=&ression or the re>uenc/
o the out&ut 4a0eorm generated.
B 2 2 2 E=&lain 4ith diagram ho4 'LL can be used as
6i7G" detector6<7
6ii7Gre>uenc/ s/nthesi?er 6E=&lain &rinci&leC characteristics and
4orEing6<7
B 2 2 . 6i7List and deine the 0arious &erormance &arameters o a
multi&lier IC. 6.7
6ii75o4 multi&lier is used as 0oltage di0ider657
6iii7 Dra4 the circuit and e=&lain the 4orEing o one >uadrant
0ariable transconductance analog multi&lier. 6<7
B 2 2 4 ,hat are im&ortant building blocE o &hase locEed loo& 6'LL7 and
e=&lain its 4orEing-647
SEetch and e=&lain the ollo4ing a&&lications o multi&liers.
6a7S>uaring 647
6b7inding s>uare root647
6c7re>uenc/ doubler647
2222