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Addressing Modes in TMS320C54x

This document summarizes a lecture on the addressing modes of the TMS320C54x processor. It discusses seven data addressing modes: immediate, absolute, accumulator, direct, indirect, memory-mapped register, and stack addressing. Indirect addressing uses the eight address registers and allows for offset, indexed, and circular addressing. The next session will continue covering addressing modes and discuss the instruction set.

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0% found this document useful (0 votes)
43 views24 pages

Addressing Modes in TMS320C54x

This document summarizes a lecture on the addressing modes of the TMS320C54x processor. It discusses seven data addressing modes: immediate, absolute, accumulator, direct, indirect, memory-mapped register, and stack addressing. Indirect addressing uses the eight address registers and allows for offset, indexed, and circular addressing. The next session will continue covering addressing modes and discuss the instruction set.

Uploaded by

vipulugale
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd

EEE C415:

DIGITAL SIGNAL
PROCESSING

Lecture 09

Addressing Modes of TMS320C54x


Last Session
¾CPU registers : ST1,PMST
¾ALU
¾Barrel Shifter, MAC units
¾Exponent encoder

27 January 2009 EEE C415 / Shikha Tripathi 2


Today’s Session
¾Addressing Modes

27 January 2009 EEE C415 / Shikha Tripathi 3


Barrel Shifter

ALU

MAC Unit
27 January 2009 EEE C415 / Shikha Tripathi CSSU
4
Architecture Cont…(External blocks)
• External Bus Interface
• Data-Address Generation Logic (DAGEN)
• Program Address Generation Logic (PAGEN)

27 January 2009 EEE C415 / Shikha Tripathi 5


27 January 2009 EEE C415 / Shikha Tripathi 6
Data Addressing modes

• Immediate Addressing
• Absolute Addressing
• Accumulator Addressing
• Direct Addressing
• Indirect Addressing
• Memory-Mapped Register Addressing
• Stack Addressing

27 January 2009 EEE C415 / Shikha Tripathi 7


Immediate addressing
• Value encoded in the instruction.
• Two types of values:
– Short immediate (3/5/8/9 bits)
– Long immediate (16 bits)
• # indicates immediate.

27 January 2009 EEE C415 / Shikha Tripathi 8


Example

• LD #05, ARP ; 3-bit constant

• LD #143, DP ; 9-bit constant

• LD #80h, A ; 8-bit constant

• LD #1000h, A ; 16-bit constant

27 January 2009 EEE C415 / Shikha Tripathi 9


Absolute Addressing
• Complete address is specified
• Address always is of 16-bits
• So, instruction is of 2 words
• 4 types:
– dmad addressing
– pmad addressing
– PA addressing
– *(lk) addressing

27 January 2009 EEE C415 / Shikha Tripathi 10


Example

• MVKD SAMPLE, *AR5 ;dmad addr

• MVDK *AR3, DATA1 ; dmad addr

• MVPD COEFF, *AR7 ; pmad addr

• PORTR FIFO, *AR5 ; PA addr

• LD *(BUFFER), A; *(lk) addr

27 January 2009 EEE C415 / Shikha Tripathi 11


Accumulator Addressing
• Use Acc content as address.

• Used to address program mem as data.

• Two instructions:

– READA Smem

– WRITA Smem

27 January 2009 EEE C415 / Shikha Tripathi 12


Direct Addressing
• Lower 7-bit dma is an address offset

• CPL in ST1 used for selection.

• Types:
– DP-Referenced Direct addressing
– SP-Referenced Direct addressing

27 January 2009 EEE C415 / Shikha Tripathi 13


27 January 2009 EEE C415 / Shikha Tripathi 14
Indirect Addressing
• Uses 8 ARs; AR0-AR7
• Used to step-through sequential locations in
mem in fixed-size steps
• AR modified by:
– Increment / Decrement
– Offset
– Index
• Special modes:
– Circular addressing
– Bit-reserved addressing
27 January 2009 EEE C415 / Shikha Tripathi 15
27 January 2009 EEE C415 / Shikha Tripathi 16
27 January 2009 EEE C415 / Shikha Tripathi 17
Offset address modification
• 16-bit offset added to AR.
• Two types:
– AR not updated
• Useful in accessing an element in array / structure
– AR updated to new address
• Useful in stepping thro’ an array in fixed step-size.
• See Table: MOD 12 & 13.

27 January 2009 EEE C415 / Shikha Tripathi 18


Indexed address modification
• AR0 is used for Index.
• AR0 added to/subtracted from any other
AR.
• Advantage:
– It does not require additional word for the
instruction Step size / Index can be determined
at run time.

27 January 2009 EEE C415 / Shikha Tripathi 19


Circular addressing
• Circular buffer: sliding window containing most
recent data
• Uses decrement/increment by 1 or increment by
index
• BK: Circular buffer size register
• A circular buffer of size R must start an a N-bit
boundary (2N > R) (N LSBs of base address
must be zero)

27 January 2009 EEE C415 / Shikha Tripathi 20


Circular Addressing Block Diagram

27 January 2009 EEE C415 / Shikha Tripathi 21


Circular addressing
• Rules to be followed:

27 January 2009 EEE C415 / Shikha Tripathi 22


Next Session
• Addressing modes Cont..
• Instruction set

27 January 2009 EEE C415 / Shikha Tripathi 23


Thank You

27 January 2009 EEE C415 / Shikha Tripathi 24

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