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LM193-N, LM2903-N, LM293-N, LM393-N

SNOSBJ6F – OCTOBER 1999 – REVISED DECEMBER 2014

LMx93-N, LM2903-N Low-Power, Low-Offset Voltage, Dual Comparators

1 Features 3 Description
1 • Wide Supply The LM193-N series consists of two independent
precision voltage comparators with an offset voltage
– Voltage Range: 2.0 V to 36 V specification as low as 2.0 mV max for two
– Single or Dual Supplies: ±1.0 V to ±18 V comparators which were designed specifically to
• Very Low Supply Current Drain (0.4 mA) — operate from a single power supply over a wide range
Independent of Supply Voltage of voltages. Operation from split power supplies is
also possible and the low power supply current drain
• Low Input Biasing Current: 25 nA is independent of the magnitude of the power supply
• Low Input Offset Current: ±5 nA voltage. These comparators also have a unique
• Maximum Offset voltage: ±3 mV characteristic in that the input common-mode voltage
• Input Common-Mode Voltage Range Includes range includes ground, even though operated from a
single power supply voltage.
Ground
• Differential Input Voltage Range Equal to the Application areas include limit comparators, simple
Power Supply Voltage analog to digital converters; pulse, squarewave and
time delay generators; wide range VCO; MOS clock
• Low Output Saturation Voltage: 250 mV at 4 mA timers; multivibrators and high voltage digital logic
• Output Voltage Compatible with TTL, DTL, ECL, gates. The LM193-N series was designed to directly
MOS and CMOS logic systems interface with TTL and CMOS. When operated from
• Available in the 8-Bump (12 mil) DSBGA Package both plus and minus power supplies, the LM19-N
series will directly interface with MOS logic where
• See AN-1112 (SNVA009) for DSBGA their low power drain is a distinct advantage over
Considerations standard comparators.
• Advantages
The LM393 and LM2903 parts are available in TI’s
– High Precision Comparators innovative thin DSBGA package with 8 (12 mil) large
– Reduced VOS Drift Over Temperature bumps.
– Eliminates Need for Dual Supplies
Device Information(1)
– Allows Sensing Near Ground
PART NUMBER PACKAGE BODY SIZE (NOM)
– Compatible with All Forms of Logic LM193-N
– Power Drain Suitable for Battery Operation TO-99 (8) 9.08 mm x 9.08 mm
LM293-N
LM393-N
2 Applications LM2903-N
SOIC (8) 4.90 mm x 3.91 mm

• Battery powered applications (1) For all available packages, see the orderable addendum at
• Industrial applications the end of the datasheet.

4 Simplified Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM193-N, LM2903-N, LM293-N, LM393-N
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Table of Contents
1 Features .................................................................. 1 8 Detailed Description ............................................ 10
2 Applications ........................................................... 1 8.1 Overview ................................................................. 10
3 Description ............................................................. 1 8.2 Functional Block Diagram ....................................... 10
4 Simplified Schematic ............................................. 1 8.3 Feature Description................................................. 10
8.4 Device Functional Modes........................................ 10
5 Revision History..................................................... 2
6 Pin Configuration and Functions ......................... 3 9 Application and Implementation ........................ 11
9.1 Application Information............................................ 11
7 Specifications......................................................... 4
9.2 Typical Applications ................................................ 11
7.1 Absolute Maximum Ratings ..................................... 4
7.2 ESD Ratings ............................................................ 4
10 Power Supply Recommendations ..................... 18
7.3 Recommended Operating Conditions....................... 4 11 Layout................................................................... 18
7.4 Thermal Information .................................................. 5 11.1 Layout Guidelines ................................................. 18
7.5 Electrical Characteristics: LM193A V+= 5 V, TA = 11.2 Layout Example .................................................... 18
25°C ........................................................................... 5 12 Device and Documentation Support ................. 19
7.6 Electrical Characteristics: LM193A (V+ = 5 V) ......... 5 12.1 Related Links ........................................................ 19
7.7 Electrical Characteristics: LMx93 and LM2903 V+= 5 12.2 Trademarks ........................................................... 19
V, TA = 25°C .............................................................. 6 12.3 Electrostatic Discharge Caution ............................ 19
7.8 Electrical Characteristics: LMx93 and LM2903 (V+ = 12.4 Glossary ................................................................ 19
5 V) (1) ......................................................................... 7
13 Mechanical, Packaging, and Orderable
7.9 Typical Characteristics: LMx93 and LM193A............ 8
Information ........................................................... 19
7.10 Typical Characteristics: LM2903 ............................ 9

5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (March 2013) to Revision F Page

• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

Changes from Revision D (March 2013) to Revision E Page

• Changed layout of National Data Sheet to TI format ............................................................................................................ 1

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6 Pin Configuration and Functions

8-Pin TO-99 8-Pin CDIP, PDIP, SOIC

LMC Package P and D Package
Top View Top View

8-Pin DSBGA
YZR Package
Top View

Pin Functions
PIN
NO.
I/O DESCRIPTION
NAME PDIP/SOIC/
DSBGA
TO-99
OUTA 1 A1 O Output, Channel A
-INA 2 B1 I Inverting Input, Channel A
+INA 3 C1 I Noninverting Input, Channel A
GND 4 C2 P Ground
+INB 5 C3 I Noninverting Input, Channel B
-INB 6 B3 I Inverting Input, Channel B
OUTB 7 A3 O Output, Channel B
V+ 8 A2 P Positive power supply

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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2) (3)
MIN MAX UNIT
(4)
Differential Input Voltage 36 V
Input Voltage −0.3 36 V
Input Current (VIN<−0.3 V) (5)
50 mA
Power PDIP 780 mW
(6)
Dissipation
TO-99 660 mW
SOIC 510 mW
DSBGA 568 mW
(7)
Output Short-Circuit to Ground Continu
ous
Lead Temperature (Soldering, 10 seconds) 260 °C
Soldering PDIP Package Soldering (10 seconds) 260 °C
Information
SOIC Package Vapor Phase (60 seconds) 215 °C
Infrared (15 seconds) 220 °C
Storage temperature, Tstg -65 150 °C

(1) Absolute Maximum Ratings indicate limits beyond which damage may occur. Recommended Operating Conditions indicate conditions
for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and test
conditions, see the Electrical Characteristics.
(2) Refer to RETS193AX for LM193AH military specifications and to RETS193X for LM193H military specifications.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(4) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3V (or 0.3V below the
magnitude of the negative power supply, if used).
(5) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is
also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go
to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive
and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than −0.3V.
(6) For operating at high temperatures, the LM393 and LM2903 must be derated based on a 125°C maximum junction temperature and a
thermal resistance of 170°C/W which applies for the device soldered in a printed circuit board, operating in a still air ambient. The
LM193/LM193A/LM293 must be derated based on a 150°C maximum junction temperature. The low bias dissipation and the “ON-OFF”
characteristic of the outputs keeps the chip dissipation very small (PD≤100 mW), provided the output transistors are allowed to saturate.
(7) Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 20 mA independent of the magnitude of V+.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±1300 V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply Voltage (V+) - Single Supply 2.0 36 V
Supply Voltage (V+) - Dual Supply ±1.0 ±18 V
Operating Input Voltage on (VIN pin) 0 (V+) -1.5V V
Operating junction temperature, TJ : LM193/LM193A -55 125 °C
Operating junction temperature, TJ : LM2903 -40 85 °C
Operating junction temperature, TJ : LM293 -25 85 °C
Operating junction temperature, TJ : LM393 0 70 °C

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7.4 Thermal Information

LMx93
THERMAL METRIC (1) TO-99 UNIT
8 PINS
RθJA Junction-to-ambient thermal resistance 170 °C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics: LM193A V+= 5 V, TA = 25°C

Unless otherwise stated.
LM193A
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
(1)
Input Offset Voltage See . 1.0 2.0 mV
Input Bias Current IIN(+) or IIN(−) with Output In Linear Range, VCM = 0 V (2)
25 100 nA
Input Offset Current IIN(+)−IIN(−) VCM = 0 V 3.0 25 nA
Input Common Mode Voltage Range V+ = 30 V (3)
0 V −1.5
+
V
Supply Current RL=∞ V+=5 V 0.4 1 mA
V+=36 V 1 2.5 mA
Voltage Gain RL≥15 kΩ, V =15 V +
50 200 V/mV
VO = 1 V to 11 V
Large Signal Response Time VIN=TTL Logic Swing, VREF=1.4 V 300 ns
VRL=5V, RL=5.1 kΩ
Response Time VRL=5V, RL=5.1 kΩ (4)
1.3 μs
Output Sink Current VIN(−)=1V, VIN(+)=0, VO≈1.5 V 6.0 16 mA
Saturation Voltage VIN(−)=1V, VIN(+)=0, ISINK≤4 mA 250 400 mV
Output Leakage Current VIN(−)=0, VIN(+)=1V, VO=5 V 0.1 nA

(1) At output switch point, VO≃1.4V, RS= 0 Ω with V from 5V to 30V; and over the full input common-mode range (0V to V −1.5V), at 25°C.
+ +

(2) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(3) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5 V at 25°C, but either or both inputs can go to 36 V without damage, independent of the
magnitude of V+.
(4) The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see
LMx93 and LM193A Typical Characteristics .

7.6 Electrical Characteristics: LM193A (V+ = 5 V) (1)

LM193A
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
(2)
Input Offset Voltage See 4.0 mV
Input Offset Current IIN(+)−IIN(−), VCM=0 V 100 nA
Input Bias Current IIN(+) or IIN(−) with Output in Linear Range, VCM=0 V (3)
300 nA
Input Common Mode Voltage Range V+=30 V (4)
0 V+−2.0 V
Saturation Voltage VIN(−)=1V, VIN(+)=0, ISINK≤4 mA 700 mV
Output Leakage Current VIN(−)=0, VIN(+)=1V, VO=30 V 1.0 μA
−
Differential Input Voltage Keep All VIN's≥0 V (or V , if Used), (5)
36 V

(1) These specifications are limited to −55°C≤TA≤+125°C, for the LM193/LM193A. With the LM293 all temperature specifications are limited
to −25°C≤TA≤+85°C and the LM393 temperature specifications are limited to 0°C≤TA≤+70°C. The LM2903 is limited to
−40°C≤TA≤+85°C.
(2) At output switch point, VO≃1.4V, RS= 0 Ω with V+ from 5V to 30V; and over the full input common-mode range (0V to V+−1.5V), at 25°C.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5 V at 25°C, but either or both inputs can go to 36 V without damage, independent of the
magnitude of V+.
(5) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3V (or 0.3V below the
magnitude of the negative power supply, if used).
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7.7 Electrical Characteristics: LMx93 and LM2903 V+= 5 V, TA = 25°C

Unless otherwise stated.
LM193-N LM293-N, LM393- LM2903-N
PARAMETER TEST CONDITIONS N UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX
(1)
Input Offset Voltage See 1.0 5.0 1.0 5.0 2.0 7.0 mV
Input Bias Current IIN(+) or IIN(−) with Output In 25 100 25 250 25 250 nA
Linear Range, VCM = 0 V (2)
Input Offset Current IIN(+)−IIN(−) VCM = 0 V 3.0 25 5.0 50 5.0 50 nA
Input Common Mode V+ = 30 V (3)
0 V+−1. 0 V+−1 0 V+−1 V
Voltage Range 5 .5 .5
Supply Current RL=∞ V+=5 V 0.4 1 0.4 1 0.4 1.0 mA
V+=36 V 1 2.5 1 2.5 1 2.5 mA
Voltage Gain RL≥15 kΩ, V+=15 V 50 200 50 200 25 100 V/mV
VO = 1 V to 11 V
Large Signal Response VIN=TTL Logic Swing, VREF=1.4 V 300 300 300 ns
Time VRL=5 V, RL=5.1 kΩ
Response Time VRL=5 V, RL=5.1 kΩ (4)
1.3 1.3 1.5 μs
Output Sink Current VIN(−)=1 V, VIN(+)=0, VO≤1.5 V 6.0 16 6.0 16 6.0 16 mA
Saturation Voltage VIN(−)=1 V, VIN(+)=0, ISINK≤4 mA 250 400 250 400 250 400 mV
Output Leakage Current VIN(−)=0, VIN(+)=1V, VO=5 V 0.1 0.1 0.1 nA

(1) At output switch point, VO≃1.4V, RS= 0 Ω with V+ from 5V to 30V; and over the full input common-mode range (0V to V+−1.5V), at 25°C.
(2) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(3) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5 V at 25°C, but either or both inputs can go to 36 V without damage, independent of the
magnitude of V+.
(4) The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see
LMx93 and LM193A Typical Characteristics .

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7.8 Electrical Characteristics: LMx93 and LM2903 (V+ = 5 V) (1)

LM193-N LM293-N, LM393- LM290-N
PARAMETER TEST CONDITIONS N UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX
(2)
Input Offset Voltage See 9 9 9 15 mV
Input Offset Current IIN(+)−IIN(−), VCM=0 V 100 150 50 200 nA
Input Bias Current IIN(+) or IIN(−) with Output in 300 400 200 500 nA
Linear Range, VCM=0 V
(3)

Input Common Mode V+=30V (4)

0 V+−2 0 V+−2 0 V+−2. V
Voltage Range .0 .0 0
Saturation Voltage VIN(−)=1V, VIN(+)=0, 700 700 400 700 mV
ISINK≤4 mA
Output Leakage Current VIN(−)=0, VIN(+)=1V, VO=30 V 1.0 1.0 1.0 μA
Differential Input Voltage Keep All VIN's≥0 V (or V−, if 36 36 36 V
Used), (5)

(1) These specifications are limited to −55°C≤TA≤+125°C, for the LM193/LM193A. With the LM293 all temperature specifications are limited
to −25°C≤TA≤+85°C and the LM393 temperature specifications are limited to 0°C≤TA≤+70°C. The LM2903 is limited to
−40°C≤TA≤+85°C.
(2) At output switch point, VO≃1.4V, RS= 0 Ω with V+ from 5V to 30V; and over the full input common-mode range (0V to V+−1.5V), at 25°C.
(3) The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the
state of the output so no loading change exists on the reference or input lines.
(4) The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is V+−1.5 V at 25°C, but either or both inputs can go to 36 V without damage, independent of the
magnitude of V+.
(5) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than −0.3V (or 0.3V below the
magnitude of the negative power supply, if used).

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7.9 Typical Characteristics: LMx93 and LM193A

Figure 1. Supply Current Figure 2. Input Current

Figure 3. Output Saturation Voltage Figure 4. Response Time for Various Input
Overdrives—Negative Transition

Figure 5. Response Time for Various Input Overdrives—Positive Transition

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7.10 Typical Characteristics: LM2903

Figure 7. Input Current

Figure 6. Supply Current

Figure 9. Response Time for Various Input

Overdrives—Negative Transition
Figure 8. Output Saturation Voltage

Figure 10. Response Time for Various Input Overdrives—Positive Transition

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8 Detailed Description

8.1 Overview
The LM139 provides two independently functioning, high-precision, low VOS drift, low input bias current
comparators in a single package. The low power consumption of 0.4mA at 5V and the 2.0V supply operation
makes the LM139 suitable for battery powered applications.

8.2 Functional Block Diagram

Figure 11. Basic Comparator

8.3 Feature Description

The input bias current of 25 nA enables the LM193 to use even very high impedance nodes as inputs. The
differential voltage input range equals the supply voltage range.
The LM193 can be operated with a single supply, where V+ can be from 2.0 V to 36 V, or in a dual supply
voltage configuration, where GND pin is used as a V– supply. The supply current draws only 0.4 mA for both
comparators.
The output of each comparator in the LM193 is the open collector of a grounded-emitter NPN output transistor
which can typically draw up to 16mA.

8.4 Device Functional Modes

A basic comparator circuit is used for converting analog signals to a digital output. The output is HIGH when the
voltage on the non-inverting (+IN) input is greater than the inverting (-IN) input. The output is LOW when the
voltage on the non-inverting (+IN) input is less than the inverting (-IN) input. The inverting input (-IN) is also
commonly referred to as the "reference" or "VREF" input. All pins of any unused comparators should be tied to
the negative supply.

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9 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

9.1 Application Information

The LM193 series are high gain, wide bandwidth devices which, like most comparators, can easily oscillate if the
output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only
during the output voltage transition intervals as the comparator change states. Power supply bypassing is not
required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling.
Reducing the input resistors to < 10 kΩ reduces the feedback signal levels and finally, adding even a small
amount (1.0 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to
stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input-
output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse
waveform, with relatively fast rise and fall times, hysteresis is not required.
All input pins of any unused comparators should be tied to the negative supply.
The bias network of the LM193 series establishes a drain current which is independent of the magnitude of the
power supply voltage over the range of from 2.0 VDC to 30 VDC.
The differential input voltage may be larger than V+ without damaging the deviceTypical Applications . Protection
should be provided to prevent the input voltages from going negative more than −0.3 VDC (at 25°C). An input
clamp diode can be used as shown in Typical Applications .
The output of the LM193 series is the uncommitted collector of a grounded-emitter NPN output transistor. Many
collectors can be tied together to provide an output OR'ing function. An output pullup resistor can be connected
to any available power supply voltage within the permitted supply voltage range and there is no restriction on this
voltage due to the magnitude of the voltage which is applied to the V+ terminal of the LM193 package. The
output can also be used as a simple SPST switch to ground (when a pullup resistor is not used). The amount of
current which the output device can sink is limited by the drive available (which is independent of V+) and the β
of this device. When the maximum current limit is reached (approximately 16mA), the output transistor will come
out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the
approximately 60Ω rSAT of the output transistor. The low offset voltage of the output transistor (1.0mV) allows the
output to clamp essentially to ground level for small load currents.

9.2 Typical Applications

9.2.1 Basic Comparator

Figure 12. Basic Comparator

[Link] Design Requirements

The basic usage of a comparator is to indicate when a specific analog signal has exceeded some predefined
threshold. In this application, the negative input (IN–) is tied to a reference voltage, and the positive input (IN+) is
connected to the input signal. The output is pulled up with a resistor to the logic supply voltage, V+ with a pullup
resistor.
For an example application, the supply voltage is 5V. The input signal varies between 1 V and 3 V, and we want
to know when the input exceeds 2.5 V±1%. The supply current draw should not exceed 1 mA.
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Typical Applications (continued)

[Link] Detailed Design Procedure
First, we determine the biasing for the 2.5-V reference. With the 5-V supply voltage, we would use a voltage
divider consisting of one resistor from the supply to IN- and an second resistor from IN–. The 25 nA of input
current bias should be < 1% of the bias current for Vref. With a 100-kΩ resistor from IN– to V+ and an additional
100-KΩ resistor from IN– to ground, there would be 25 µA of current through the two resistors. The 3-kΩ pullup
shown will need 5 V/3 kΩ → 1.67 mA, which exceeds our current budget.
With the 400-µA supply current and 25 µA of VREF bias current, there is 575 µA remaining for output pullup
resistor; with 5-V supply, we need a pullup larger than 8.7 kΩ. A 10-kΩ pullup is a value that is commonly
available and can be used here.

[Link] Application Curve

Figure 13. Basic Comparator Response

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Typical Applications (continued)

9.2.2 System Examples

[Link] Split-Supply Application

(V+=-15 VDC and V-=-15 VDC)

Figure 14. MOS Clock Driver

[Link] V+ = 5.0 VDC Application Circuits

Figure 15. Driving CMOS Figure 16. Driving TTL

* For large ratios of R1/R2,

D1 can be omitted.
Figure 17. Squarewave Oscillator Figure 18. Pulse Generator

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Typical Applications (continued)

V* = +30 VDC
+250 mVDC ≤ VC ≤ +50 VDC
700Hz ≤ fo ≤ 100kHz
Figure 19. Crystal Controlled Oscillator Figure 20. Two-Decade High Frequency VCO

Figure 21. Basic Comparator Figure 22. Non-Inverting Comparator With

Hysteresis

Figure 23. Inverting Comparator With Hysteresis Figure 24. Output Strobing

14 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM193-N LM2903-N LM293-N LM393-N

 LM193-N, LM2903-N, LM293-N, LM393-N
[Link] SNOSBJ6F – OCTOBER 1999 – REVISED DECEMBER 2014

Typical Applications (continued)

Figure 25. And Gate Figure 26. Or Gate

Figure 27. Large Fan-In and Gate Figure 28. Limit Comparator

Figure 29. Comparing Input Voltages of Opposite Figure 30. Oring the Outputs
Polarity

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 15

Product Folder Links: LM193-N LM2903-N LM293-N LM393-N
LM193-N, LM2903-N, LM293-N, LM393-N
SNOSBJ6F – OCTOBER 1999 – REVISED DECEMBER 2014 [Link]

Typical Applications (continued)

Figure 31. Zero Crossing Detector (Single Power Figure 32. One-Shot Multivibrator
Supply)

Figure 33. Bi-Stable Multivibrator Figure 34. One-Shot Multivibrator With Input Lock
Out

Figure 35. Zero Crossing Detector Figure 36. Comparator With a Negative Reference

16 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM193-N LM2903-N LM293-N LM393-N

 LM193-N, LM2903-N, LM293-N, LM393-N
[Link] SNOSBJ6F – OCTOBER 1999 – REVISED DECEMBER 2014

Typical Applications (continued)

Figure 37. Time Delay Generator

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 17

Product Folder Links: LM193-N LM2903-N LM293-N LM393-N
LM193-N, LM2903-N, LM293-N, LM393-N
SNOSBJ6F – OCTOBER 1999 – REVISED DECEMBER 2014 [Link]

10 Power Supply Recommendations

Even in low frequency applications, the LM139-N can have internal transients which are extremely quick. For this
reason, bypassing the power supply with 1.0μF to ground will provide improved performance; the supply bypass
capacitor should be placed as close as possible to the supply pin and have a solid connection to ground. The
bypass capacitor should have a low ESR and also a SRF greater than 50MHz.

11 Layout

11.1 Layout Guidelines

Try to minimize parasitic impedances on the inputs to avoid oscillation. Any positive feedback used as hysteresis
should place the feedback components as close as possible to the input pins. Care should be taken to ensure
that the output pins do not couple to the inputs. This can occur through capacitive coupling if the traces are too
close and lead to oscillations on the output. The optimum placement for the bypass capacitor is closest to the V+
and ground pins. Take care to minimize the loop area formed by the bypass capacitor connection between V+
and ground. The ground pin should be connected to the PCB ground plane at the pin of the device. The
feedback components should be placed as close to the device as possible minimizing strays.

11.2 Layout Example

Figure 38. Layout Example

18 Submit Documentation Feedback Copyright © 1999–2014, Texas Instruments Incorporated

Product Folder Links: LM193-N LM2903-N LM293-N LM393-N

 LM193-N, LM2903-N, LM293-N, LM393-N
[Link] SNOSBJ6F – OCTOBER 1999 – REVISED DECEMBER 2014

12 Device and Documentation Support

12.1 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 1. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
LM193-N Click here Click here Click here Click here Click here
LM2903-N Click here Click here Click here Click here Click here
LM293-N Click here Click here Click here Click here Click here
LM393-N Click here Click here Click here Click here Click here

12.2 Trademarks
All trademarks are the property of their respective owners.
12.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

12.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 19

Product Folder Links: LM193-N LM2903-N LM293-N LM393-N
 PACKAGE OPTION ADDENDUM

[Link] 29-May-2015

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

LM193AH ACTIVE TO-99 LMC 8 500 TBD Call TI Call TI -55 to 125 ( LM193AH ~
LM193AH)
LM193AH/NOPB ACTIVE TO-99 LMC 8 500 Green (RoHS Call TI Level-1-NA-UNLIM -55 to 125 ( LM193AH ~
& no Sb/Br) LM193AH)
LM193H ACTIVE TO-99 LMC 8 500 TBD Call TI Call TI -55 to 125 ( LM193H ~ LM193H)

LM193H/NOPB ACTIVE TO-99 LMC 8 500 Green (RoHS Call TI Level-1-NA-UNLIM -55 to 125 ( LM193H ~ LM193H)
& no Sb/Br)
LM2903ITL/NOPB ACTIVE DSBGA YZR 8 250 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 C
& no Sb/Br) 03
LM2903ITLX/NOPB ACTIVE DSBGA YZR 8 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 C
& no Sb/Br) 03
LM2903M ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM
2903M
LM2903M/NOPB ACTIVE SOIC D 8 95 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 LM
& no Sb/Br) 2903M
LM2903MX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM
2903M
LM2903MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 LM
& no Sb/Br) 2903M
LM2903N/NOPB ACTIVE PDIP P 8 40 Green (RoHS CU SN Level-1-NA-UNLIM -40 to 85 LM
& no Sb/Br) 2903N
LM293H ACTIVE TO-99 LMC 8 500 TBD Call TI Call TI -25 to 85 ( LM293H ~ LM293H)

LM293H/NOPB ACTIVE TO-99 LMC 8 500 TBD Call TI Call TI -25 to 85 ( LM293H ~ LM293H)

LM393M NRND SOIC D 8 95 TBD Call TI Call TI 0 to 70 LM

393M
LM393M/NOPB ACTIVE SOIC D 8 95 Green (RoHS CU SN Level-1-260C-UNLIM 0 to 70 LM
& no Sb/Br) 393M
LM393MX NRND SOIC D 8 2500 TBD Call TI Call TI 0 to 70 LM
393M
LM393MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS CU SN Level-1-260C-UNLIM 0 to 70 LM
& no Sb/Br) 393M

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

[Link] 29-May-2015

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

LM393N/NOPB ACTIVE PDIP P 8 40 Green (RoHS CU SN Level-1-NA-UNLIM 0 to 70 LM

& no Sb/Br) 393N
LM393TL/NOPB ACTIVE DSBGA YZR 8 250 Green (RoHS SNAGCU Level-1-260C-UNLIM 0 to 70 C
& no Sb/Br) 02
LM393TLX/NOPB ACTIVE DSBGA YZR 8 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM 0 to 70 C
& no Sb/Br) 02

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check [Link] for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 2
 PACKAGE OPTION ADDENDUM

[Link] 29-May-2015

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 3
 PACKAGE MATERIALS INFORMATION

[Link] 9-Oct-2014

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2903ITL/NOPB DSBGA YZR 8 250 178.0 8.4 1.7 1.7 0.76 4.0 8.0 Q1
LM2903ITLX/NOPB DSBGA YZR 8 3000 178.0 8.4 1.7 1.7 0.76 4.0 8.0 Q1
LM2903MX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM2903MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM393MX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM393MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM393TL/NOPB DSBGA YZR 8 250 178.0 8.4 1.7 1.7 0.76 4.0 8.0 Q1
LM393TLX/NOPB DSBGA YZR 8 3000 178.0 8.4 1.7 1.7 0.76 4.0 8.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

[Link] 9-Oct-2014

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2903ITL/NOPB DSBGA YZR 8 250 210.0 185.0 35.0
LM2903ITLX/NOPB DSBGA YZR 8 3000 210.0 185.0 35.0
LM2903MX SOIC D 8 2500 367.0 367.0 35.0
LM2903MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM393MX SOIC D 8 2500 367.0 367.0 35.0
LM393MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM393TL/NOPB DSBGA YZR 8 250 210.0 185.0 35.0
LM393TLX/NOPB DSBGA YZR 8 3000 210.0 185.0 35.0

Pack Materials-Page 2
 MECHANICAL DATA
YZR0008xxx

D
0.600±0.075

TLA08XXX (Rev C)

D: Max = 1.54 mm, Min = 1.479 mm

E: Max = 1.54 mm, Min = 1.479 mm

4215045/A 12/12

NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.

[Link]
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