Chapter 12

RISC vs CISC
Architectures
Chapter 12

RICS VS CISC ARCHITECHTURES

Introduction

In computer architecture, RISC (Reduced Instruction Set Computer) and CISC

(Complex Instruction Set Computer) represent two distinct design philosophies for how a
processor executes instructions.

Both architectures were developed to improve the efficiency and performance of

computers, but they do so in opposite ways.

⚫ RISC emphasizes a small set of simple instructions that execute very quickly—usually
one per clock cycle. It focuses on speed, simplicity, and efficient use of hardware.
⚫ CISC, on the other hand, emphasizes a large set of complex instructions, where a
single instruction can perform multiple low-level operations. It focuses on reducing the
number of instructions per program, even if each one takes longer to execute.

These two architecture differ in design philosophy, instruction complexity, and

performance approach.

Specific Objectives

At the end of the lesson, the students should be able to:

1. Define and explain the concepts of RISC and CISC architectures.

2. Analyze examples of processors that use each architecture.
3. Identify the key features and differences between RISC and CISC.
4. Discuss the advantages and disadvantages of RISC and CISC designs.
5. Apply knowledge through guided comparison and evaluation activities.

Duration
Chapter 12: RISC vs CISC Architecture = ___ hours

Lesson Proper
What is RISC AND CISC Architechture?

RISC stands for ‘Reduced Instruction Set Computer.’ These were introduced
in the 1980s by David Patterson and John Hennessy to overcome the complexities of
CISC processors. RISC processors work with more instructions; however, the number
of cycles an instruction may take to execute is minimized. In general terms, a RISC
machine takes one CPU cycle to complete one instruction. This may equate to the
‘sleep’ instruction you gave your trained pet.

RISC simplifies processor design by employing a small, consistent set of

instructions. Each instruction performs a fundamental action (e.g., load, compute,
store) and is meant to run in a single clock cycle, allowing for efficient pipelining and
simpler hardware.

For example, you need to load the numbers from memory through a LOAD
instruction, followed by an ADD instruction that adds them, and finally, a STORE
instruction that stores the result in memory.

Load X, 1600

Load Y, 1601

ADD X, Y

Store 1600, X

In this example, the ‘Load’ instruction loads data at memory location 1600
into register X. Similarly, the second ‘Load’ instruction picks up data from 1601 and
loads it into register Y. Later, the values in registers X and Y are added. Lastly, the
result X of addition is stored at memory location 1600 or any other location. It is
worth noting that operations in RISC-type processors are performed on ‘registers’
rather than directly on memory.

Characteristics of RISC

⚫ Simpler instruction, hence simple instruction decoding.

⚫ Instruction comes in the form of one word.

⚫ An instruction takes a single clock cycle to get executed.

⚫ More general-purpose registers for register-to-register operations.

⚫ Simple Addressing Modes.

⚫ Optimized for pipelining due to uniform instruction size and simplicity.

 CISC stands for ‘Complex Instruction Set Computer.’ This architecture was
introduced in the 1970s by Intel Corporation when the earliest computers focused on
enhancing CPU speed by minimizing the number of instructions per program (as per
equation 1). This objective was achieved by combining multiple simple commands
into one complex instruction.

CISC decreases the number of instructions required for a program by

employing a high number of complicated, variable-length instructions. A single
instruction can execute numerous actions (for example, load, calculate, and store),
each of which may require several clock cycles.

In the pet analogy, the command ‘run’ can be referred to as a CISC instruction.
When you instruct your pet to run, it performs a set of instructions such as ‘track the
toy,’ then ‘pick the toy up,’ followed by ‘get back to the owner,’ and finally, ‘hand
over the toy to the owner.’ As the example reveals, it is a lot more convenient and
faster to give a single ‘run’ instruction to your pet rather than giving it four
independent commands. This is exactly why tech companies such as Intel preferred
designing CISC processors in the initial computing years.

1. Memory locations of two numbers essential for an addition

2. Perform addition and store the result in the first memory location

ADD 1800, 1801

The ADD instruction picks up numbers from memory locations 1800 and 1801
or registers. Later, the picked-up numbers are added and eventually stored in location
1800.

The image shows a comparison between CISC and RISC architectures,

focusing on how instructions are processed inside each CPU. It illustrates the internal
structure and control flow of both architectures, specifically how the controller,
program memory, and data path interact when executing instructions.

Characteristics of CISC

⚫ Complex instruction, hence complex instruction decoding.

⚫ Instructions are larger than one-word size.

⚫ Instruction may take more than a single clock cycle to get executed.

⚫ Less number of general-purpose registers as operations get performed in memory

itself.

⚫ Complex Addressing Modes.

Difference of RISC and CISC Architecture

RISC: A reduced instruction set computer (RISC) is a microprocessor architecture

that values simplicity and speed. RISC primary principle is to optimize instruction
execution by using a smaller, more clear set of directives. This strategy allows for
speedier instruction execution and promotes pipe-lining, a technique in which many
instructions are executed concurrently.

CISC: The complicated Instruction Set Computer (CISC) is a microprocessor

architecture that uses complicated instructions to boost performance. It can carry out
more sophisticated actions within a single instruction, lowering the number of
instructions required per task and thus the amount of code necessary, although it takes
more than one clock cycle to execute each instruction.
What are the Advantages and Disadvantages of RISC and CISC Architectures?

Advantages of RISC

⚫ Simpler instructions: RISC processors use a smaller set of simple instructions,

which makes them easier to decode and execute quickly. This results in faster
processing times.

⚫ Faster execution: Because RISC processors have a simpler instruction set, they
can execute instructions faster than CISC processors.

⚫ Lower power consumption: RISC processors consume less power than CISC
processors, making them ideal for portable devices.

Disadvantages of RISC

⚫ More instructions required: RISC processors require more instructions to

perform complex tasks than CISC processors.

⚫ Increased memory usage: More instructions may need more memory to store
programs.

⚫ Compiler Dependency: RISC relies on optimized compilers to generate efficient

code.

Advantages of CISC

⚫ Reduced code size: CISC processors use complex instructions that can perform
multiple operations, reducing the amount of code needed to perform a task.

⚫ More memory efficient: Because CISC instructions are more complex, they
require fewer instructions to perform complex tasks, which can result in more
memory-efficient code.

⚫ Widely used: CISC processors have been in use for a longer time than RISC
processors, so they have a larger user base and more available software.

Disadvantages of CISC

⚫ Slower execution: CISC processors take longer to execute instructions because

they have more complex instructions and need more time to decode them.

⚫ More complex design: CISC processors have more complex instruction sets,
which makes them more difficult to design and manufacture.

⚫ Higher power consumption: CISC processors consume more power than RISC
processors because of their more complex instruction sets.

RICS vs CISC Key Comparison

RICS AND CICS are two processor design. Here a comparison table between them.

RISC CISC

RISC refers to Reduced Instruction Set CISC is the short form for Complex
Computer. Instruction Set Computer.

The RISC architecture executes simple The CSIC architecture processes complex
yet optimized instructions in a single instructions that require several clock
clock cycle. It processes instructions at an cycles for execution. On average, it takes
average speed of 1.5 clock cycles per two to five clock cycles per instruction
instruction (CPI). (CPI).

RISC focuses more on software such as CISC focuses on hardware, such as

codes or compilers to execute transistors, to execute instructions.
instructions.

RISC lacks special memory and thus Implementation of complex instructions

utilizes specialized hardware to execute is enabled through memory units.
instructions.

RISC devices are embedded with a CISC devices are installed with a micro-
hardwired programming unit. programming unit.

RISC is provided with a reduced CISC uses a variety of instructions to

instruction set, which is typically accomplish complex tasks.
primitive in nature.

RISC processors use hardwired units to CISC processors are generally micro-
control CPU. coded, thereby allowing ROM-based
CPU control. However, modern CISC
processors also use hardwired units for
easy CPU control.

RISC processors rely on a register-to- CISC processors use a memory-to-

register mechanism to execute ADD, memory framework to execute
STORE, and independent LOAD instructions such as ADD, LOAD, and
instructions. even STORE.

The RISC architecture utilizes multiple The CISC architecture uses only one
registers sets. register set.

Since RISC machines operate on single Since CISC devices operate in a multi-
clock cycles, it has limited addressing clock environment, it supports addressing
modes. modes in the range of 12 to 24.

Since RISC processors support a limited CISC processors are capable of

set of addressing modes, complex processing high-level programming
instructions are synthesized through language statements more efficiently,
software codes. thanks to the support of complex
addressing modes.

Activity 1
Direction: Answer the following questions given. 10 points equivalent on each question.

1. Discuss the advantage and dis-advantage of RISC and CISC.

Answer:

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2. Explain the RISC and CISC Architecture.

Answer:

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