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DLD_Assignment_2

The document outlines an assignment for a Digital Logic Design course at the National University of Computer & Emerging Sciences, detailing tasks related to Boolean expressions, logic circuit design, Karnaugh maps, and combinational circuits. It includes specific problems requiring the implementation of circuits using NAND and NOR gates, as well as waveform analysis for given input signals. Additionally, it covers concepts like half-adders, full-adders, and the functionality of a 4-bit adder/subtractor circuit.

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faisaltahir742
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1 views3 pages

DLD_Assignment_2

The document outlines an assignment for a Digital Logic Design course at the National University of Computer & Emerging Sciences, detailing tasks related to Boolean expressions, logic circuit design, Karnaugh maps, and combinational circuits. It includes specific problems requiring the implementation of circuits using NAND and NOR gates, as well as waveform analysis for given input signals. Additionally, it covers concepts like half-adders, full-adders, and the functionality of a 4-bit adder/subtractor circuit.

Uploaded by

faisaltahir742
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

National University

of Computer & Emerging Sciences

Program: BS(CS)
Date: 15 April, 20256
Course: Digital Logic Design (DLD)
TA: Arisha Zubair, Muhammad Mazhar Saeed
Instructor: M. Asif Khan
Due Date: 23rd April, 2026

Assignment #02

1. Write the output expression for each circuit

2. For the following Boolean expressions, design the corresponding logic circuit and derive the
truth table for each:
(a) F = AB'CD' + A'BCD + ABCD' + A'B'C'D
(b) Y = ABC'D + A'B'CD' + AB'C'D'
(c) X = (AB + C')(A' + BD')

3. Simplify the following Boolean function using a Karnaugh Map and write the minimum SOP
expression:
(a) F(A, B, C) = Σm(1, 3, 5, 7)
(b) The following combinational logic expression is given: X = ABC + ABC' + A'BC. Minimize
this expression using Boolean algebra and/or a Karnaugh map, then make logic circuit for the
minimized circuit using only NAND gates.

4.
(a) Using only NAND gates, implement the Boolean function: F = AB + CD. Show the complete
circuit with all gate connections, input labels, and intermediate signal names.

(b) Repeat part (a) using only NOR gates to implement the same function F = AB + CD. How
does the NOR-based implementation differ structurally from the NAND-based one?

5.
The combinational logic circuit has expression X = AC + B'C. Input waveforms A, B, and C are
given below. The output row X is intentionally left blank.
Questions:

(a) Draw the waveform for the intermediate signal B' (complement of B) above the blank X row
— add it as a new row.
(b) Determine and draw the waveforms for AC and B'C separately, then combine to get X. Show
on the same diagram.
(c) For each HIGH interval of X, state which product term (AC or B'C or both) causes it.
(d) [Propagation Delay] If each gate has a propagation delay of 8 ns, and the NOT gate (for B')
also has 8 ns delay, at which exact times will the actual X transitions occur compared to the
ideal waveform? Identify any pulse that would be suppressed (too narrow to pass through).

6. A combinational circuit has the output Y = A'B + AB'. Identify the type of gate this
represents. If A has a period of 8 ns and B has a period of 16 ns, sketch the output waveform Y
for one full cycle of B.

7.
(a) State the functional difference between a half-adder and a full-adder. Under what condition
is a half-adder sufficient in a multi-bit addition circuit?
(b) Derive the Sum (S) and Carry-out (Cout) Boolean expressions for a full-adder from its truth
table. Show that Sum can be expressed as S = A ⊕ B ⊕ Cin.

8. Draw the complete logic diagram of a full-adder using only two XOR gates, two AND gates,
and one OR gate. Label all signals.

9.
The input waveforms in Figure are applied to a 2-bit adder. Determine the waveforms for the
sum and the output carry in relation to the inputs by constructing a timing diagram.

10. The circuit shown is a 4-bit circuit that can add or subtract numbers in a form used in
computers (positive numbers in true form; negative numbers in complement form).
(a) Explain what happens when the Add/Subt. input is HIGH.
(b) What happens when Add/Subt. is LOW?
Q11.
For the 4-bit comparator in Figure, plot each output waveform for the inputs shown. The
outputs are active-HIGH.

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