Table of Contents

1. Exp 02 — I-V Characteristics: General-purpose Diode & Zener Diode

2. Exp 03 — Half-Wave & Full-Wave Bridge Rectifier
3. Exp 04 — Clipper & Clamper Circuits
4. Exp 05 — CE/CB BJT Input-Output Characteristics & Biasing
5. Exp 06 — CE BJT Amplifier: Gain, Frequency Response, h-parameters
6. Exp 07 — MOSFET Drain & Transfer Characteristics
7. Exp 08 — 741 Op-Amp: Inverting/Non-Inverting/Differentiator/Integrator/Filter
8. Last-Minute Revision Sheet (All Formulas + Key Points)
 Exp 02: Diode & Zener Diode I-V Characteristics
Theory (Simple Explanation)
A diode is a two-terminal device made from a p-n junction. It conducts current in one direction only (like a one-way valve).
When forward biased (p-side +ve, n-side -ve), current flows easily once the voltage crosses the knee/cut-in voltage. When
reverse biased, almost no current flows (only a tiny leakage current in µA/pA range) — the diode acts like an open switch,
until breakdown voltage is reached.
• Cut-in (knee) voltage: Silicon ≈ 0.7 V, Germanium ≈ 0.3 V.
• Forward bias: p-side to +ve terminal, n-side to -ve terminal → diode conducts.
• Reverse bias: diode blocks current (only leakage current flows).
• Zener diode is a specially made diode designed to operate safely in the reverse breakdown region — used as a
voltage regulator.
• In a Zener diode, current enters the cathode and cathode is +ve w.r.t. anode during normal (regulator) operation.

Key Formulas
Static Resistance: R = V / I (forward: R_dc = V_f / I_f , reverse: R_dc = V_r / I_r)

Dynamic Resistance: r = ΔV / ΔI (r_ac = ΔV_f/ΔI_f or ΔV_r/ΔI_r)

Zener relation: ΔV = r_z · ΔI (r_z = incremental / dynamic resistance of Zener, few Ω to tens of
Ω)

Circuit & Procedure

Forward Bias: Diode anode → +ve supply through 1 kΩ resistor; ammeter in series; voltmeter across diode. Vary V from
0→0.6 V in 0.1 V steps, then 0.6→0.76 V in 0.02 V steps; note I each time.
Reverse Bias: Reverse the diode polarity. Vary V from 0→10 V in 1 V steps; note I (µA range).
Zener (reverse): Vary voltage 0→6 V in 1 V steps, then 0.1 V steps till breakdown; note current.
Graph: 4-quadrant graph. +X = V_F, −X = V_R, +Y = I_F, −Y = I_R. Plot forward curve in Quadrant I, reverse curve in
Quadrant III. Find knee voltage and breakdown voltage (V_BR) from the graph.

Precautions / Common Mistakes

• Never exceed diode rated current — always use a series current-limiting resistor (1 kΩ).
• Check polarity of ammeter/voltmeter before switching ON.
• Common mistake: swapping forward/reverse connections for the Zener diode.
• Common mistake: forgetting that reverse current is in µA while forward current is in mA — different scales!
1. The cut-in voltage of a silicon diode is approximately:
A) 0.3 V
B) 0.7 V
C) 1.2 V
D) 5 V
Answer: B) 0.7 V
2. Zener diodes are normally operated in:
A) Forward bias active region
B) Reverse breakdown region
C) Cut-off region
D) Saturation region
Answer: B) Reverse breakdown region
3. Dynamic resistance of a diode is given by:
A) V/I
B) ΔV/ΔI
C) I/V
D) ΔI/ΔV
Answer: B) ΔV/ΔI
4. In reverse bias, diode current is generally measured in:
A) Amperes
 B) milliamperes
C) microamperes/picoamperes
D) kiloamperes
Answer: C) microamperes/picoamperes
5. On the I-V graph, the reverse-biased Zener curve is plotted in:
A) Quadrant I
B) Quadrant II
C) Quadrant III
D) Quadrant IV
Answer: C) Quadrant III

Short Q&A
Q: What is knee voltage?
A: The forward voltage at which diode current starts increasing sharply (~0.7V for Si).
Q: Why is a series resistor used in the diode circuit?
A: To limit current and protect the diode from damage.
Q: What is breakdown voltage (V_BR)?
A: The reverse voltage at which current suddenly increases sharply (Zener/avalanche breakdown).

Viva Questions
Q1. Why does a diode conduct only in one direction?
Ans: Because the p-n junction allows majority carrier flow only when forward biased; reverse bias widens depletion
region and blocks current.
Q2. What is the material used for the diode in this lab?
Ans: Silicon (1N4007).
Q3. Why is Zener diode used as voltage regulator?
Ans: Because in breakdown region its voltage stays nearly constant despite current changes.
Q4. What happens if reverse voltage exceeds breakdown in a normal diode? Ans: It gets permanently
damaged (unless it's a Zener, designed for this).

Exp 03: Half-Wave & Full-Wave Bridge Rectifier

Theory (Simple Explanation)
A rectifier converts AC to DC using diodes. Half-wave rectifier uses 1 diode and passes only the positive half-cycle (output
= 0 during negative half). Full-wave bridge rectifier uses 4 diodes and passes both halves, giving a smoother, higher-
average output.
• Half-wave: diode conducts only during + half cycle of AC input.
• Full-wave bridge: On +half cycle D1 & D3 conduct; on −half cycle D2 & D4 conduct — output is always positive.
• A smoothing capacitor across the load reduces ripple (charges on rise, discharges on fall) — makes output more DC-
like.
• Actual peak output = Peak input − 0.7 V (diode drop) for HW; for bridge, 2 diodes conduct at once so drop ≈ 1.4V.

Key Formulas
Half-Wave: V_avg = V_p/π , V_rms = V_p/√2 , V_r(HW) = I/(C·f)

Half-Wave DC output: V_dc = V_p − (1/2)·V_r = V_p − I/(2Cf)

Full-Wave: V_avg = 2V_p/π (no capacitor) ; ripple freq = 2 × input freq

Full-Wave: V_r(FW) = I/(2Cf) , V_dc = V_p − I/(4Cf)

Ripple Factor: r = (V_r/V_dc) × 100% [Typical: HW r ≈ 1.21 (121%), FW r ≈

0.48 (48%)]

Procedure (both circuits)

• Connect circuit (HW: 1 diode + R_L; FW Bridge: 4 diodes + C + R_L).
• Set input = 10 V(p-p), 1 kHz sine wave from function generator.
• Connect multimeter across 1 kΩ load; measure V_AC and V_DC.
• Calculate ripple factor r = V_r/V_dc × 100%.
• Observe input & output waveform on oscilloscope (CH1 = input, CH2 = output).
• Note peak voltage and frequency of both waveforms.

Precautions / Common Mistakes

• Do not exceed diode current rating.
• Check diode orientation carefully in bridge circuit — wrong orientation gives no output or short circuit.
• Common mistake: confusing ripple frequency (FW = 2× input freq, HW = same as input freq).
• Remember output DC voltage of FW is always higher than HW for same input.
1. Ripple frequency of a full-wave rectifier compared to input frequency is:
A) Same
B) Half
C) Double
D) Four times
Answer: C) Double
2. Average DC output voltage of half-wave rectifier is:
A) V_p/π
B) 2V_p/π
C) V_p/2
D) V_p
Answer: A) V_p/π
3. Number of diodes used in a bridge rectifier is:
A) 1
B) 2
C) 2
D) 2
Answer: D)4. Typical ripple factor of full-wave rectifier is about: Error! Bookmark not defined.

A) 1.21
B) 0.48
C) 2.0
D) 0
Answer: B) 0.48
5. Function of the smoothing capacitor is to:
A) Increase ripple
B) Reduce ripple / smooth output
C) Rectify AC
D) Increase frequency
Answer: B) Reduce ripple / smooth output

Viva Questions
Q1. Why is full-wave rectifier preferred over half-wave?
Ans: Higher DC output, lower ripple factor, better efficiency.
Q2. What is ripple factor?
Ans: Ratio of AC ripple component to DC component in rectified output — measures smoothness.
Q3. Why does output peak = input peak − 0.7V in HW rectifier?
Ans: Because of the forward voltage drop across the conducting diode.
Q4. What happens if one diode in the bridge fails (open)? Ans: Circuit behaves
like a half-wave rectifier.
 Exp 04: Clipper & Clamper Circuits
Theory (Simple Explanation)
Clipper: Cuts off (clips) part of the input waveform above/below a reference level, without distorting the remaining part.
Used to protect circuits from over-voltage.
• Positive clipper: removes/clips the positive portion of signal.
• Negative clipper: removes/clips the negative portion of signal.
• Biased clipper: clipping level is shifted using a DC battery in series with diode.
• Combination clipper: clips both + and − sides at different levels (uses 2 diodes with 2 DC sources).
Clamper: Shifts the entire waveform up or down to a new DC level WITHOUT changing its shape. Uses a capacitor (in
series with input) + diode + resistor. Also called a 'DC restorer'.
• Positive clamper: shifts waveform upward (adds positive DC level).
• Negative clamper: shifts waveform downward (adds negative DC level).
• Capacitor charges to peak value and holds charge (time constant τ = RC must be large, ≥ 5×period).

Key Points
Clamper time constant: τ = R·C (must be ≫ time period of input signal, so capacitor doesn't
discharge much)

Positive clamper output ranges roughly from 0 to +2V_m (shifted up by V_m)

Negative clamper output ranges roughly from −2V_m to 0 (shifted down by V_m)

Procedure
• Clipper: Build combination clipper circuit (R + D1,D2 with V1,V2 bias). Vary V1 (1–5V) keeping V2 fixed=2V, note
output voltage & current; repeat varying V2 keeping V1 fixed=5V.
• Clamper: Build circuit (C=1µF, R_L=1MΩ or 250Ω, diode, V1 source). Vary V1 (1–5V); note output & capacitor voltage.
• Compare input sine wave (oscilloscope CH1) with output waveform (CH2) to see the shift/clipping.

Precautions / Common Mistakes

• Ensure capacitor value is large enough (per RC time constant rule) or output waveform will distort.
• Common mistake: mixing up clipper and clamper — clipper removes part of signal; clamper shifts DC level only, shape
stays same.
• Check diode direction — determines whether clipper/clamper is positive or negative type.
1. A clamper circuit changes the:
A) Shape of waveform
B) DC level of waveform
C) Frequency of waveform
D) Amplitude only
Answer: B) DC level of waveform
2. A clipper circuit is used to:
A) Shift DC level
B) Remove part of the waveform
C) Amplify signal
D) Rectify AC only
Answer: B) Remove part of the waveform
3. For proper clamping action, time constant RC should be:
A) Very small
B) Equal to input period
C) Much larger than input period
D) Zero
 Answer: C) Much larger than input period
4. A clamper circuit essentially consists of a diode, resistor and:
A) Inductor
B) Capacitor
C) Transformer
D) Transistor
Answer: B) Capacitor
5. The half-wave rectifier is an example of a:
A) Clamper
B) Simplest diode clipper
C) Amplifier
D) Filter
Answer: B) Simplest diode clipper

Viva Questions
Q1. Why is clamper also called a DC restorer?
Ans: Because it restores/adds a DC level to an AC signal without changing its shape.
Q2. What is the role of the capacitor in a clamper?
Ans: It stores charge equal to peak input and provides the DC shift.
Q3. Name two applications of clipper circuits.
Ans: Voltage limiting / circuit protection, and waveform shaping (e.g. TV sync separation).
Q4. What is a biased clipper?
Ans: A clipper with a DC voltage source added in series with the diode to set the clipping level away from 0V.
•
Theory (Simple Explanation)
BJT (Bipolar Junction Transistor) has 2 p-n junctions: emitter-base junction and collector-base junction. For amplifier (active)
operation: emitter junction forward biased, collector junction reverse biased.
Common Emitter (CE): emitter is common to input & output; gives high current and voltage gain, used most in
amplifiers.
• Common Base (CB): base is common; gives high voltage gain but current gain < 1 (α close to 1).
• Input characteristics: I_B vs V_BE (for various V_CE) — looks like a diode curve.
• Output characteristics: I_C vs V_CE (for various I_B) — shows saturation, active and cut-off regions.
• Load line: drawn from I_C(max)=V_S/R_L (on Y-axis) to V_CE=V_S (on X-axis); slope = −1/R_L. • Biasing
types: Fixed bias (simple, but Q-point depends heavily on β — not stable); Voltage-divider (self) bias — most
common, nearly independent of β, very stable.

Key Formulas
I_E = I_C + I_B = [(β+1)/β]·I_C

Common Emitter current gain: β = I_C / I_B (β ≫ 1, typically 50–300)

Common Base current gain: α = β/(β+1) (α close to 1, e.g. 0.98–0.99)

Relation: I_C = α·I_E

Saturation current: I_C(max) = V_S / R_L ; Load line slope = −1/R_L

Procedure
• Connect CE circuit: R_in sets base current I_B (keep V_in fixed so I_B constant).
• Vary V_CE, record V_out (=V_CE) and I_C for R_in = 500 kΩ, then repeat for R_in = 250 kΩ.
• Plot I_C vs V_CE for each I_B → output characteristic family of curves.
• For biasing: connect fixed-bias circuit (R_B=270k, R_C=5.6k, V1=3V, V2=15V); measure V_B, V_E, V_C, V_CE, I_B,
I_E, I_C.
• Calculate β = I_C/I_B from measured values.

Precautions / Common Mistakes

• Never exceed transistor's max V_CE or I_C rating (may damage BC107/2N3904).
• Correctly identify Emitter, Base, Collector pins before wiring — wrong pinout is the most common mistake.
• Keep I_B constant while varying V_CE for output characteristics (don't accidentally change R_in mid-experiment).
• Remember: in saturation region, V_CE ≈ 0 and I_C is max; in cut-off, I_C ≈ 0.
1. In active mode, the emitter-base junction is:
A) Reverse biased
B) Forward biased
C) Unbiased
D) Short circuited
Answer: B) Forward biased
2. Common Emitter current gain β is defined as:
A) I_E/I_B
B) I_C/I_E
C) I_C/I_B
D) I_B/I_C
Answer: C) I_C/I_B
3. The value of α (common base current gain) is:
A) Much greater than 1
B) Close to 1 (but less than 1)
C) Always negative
 D) Exactly 0
Answer: B) Close to 1 (but less than 1)
4. Which biasing method is least dependent on β?
A) Fixed bias
B) Voltage divider (self) bias
C) No bias
D) Emitter bias without R_E
Answer: B) Voltage divider (self) bias
5. Slope of the DC load line is:
A) R_L
B) 1/R_L
C) −1/R_L
D) −R_L
Answer: C) −1/R_L

Viva Questions
Q1. Why is fixed bias not used in practice?
Ans: Because Q-point strongly depends on β, which varies with temperature and between transistors — unstable.
Q2. What is Q-point?
Ans: The DC operating (quiescent) point on the load line — set by bias, defines I_C and V_CE with no input signal.
Q3. Why must collector junction be reverse biased in active mode?
Ans: So the collector can efficiently collect carriers injected by the emitter, without opposing/creating extra current.
Q4. Relation between α and β?
Ans: α = β/(β+1), and β = α/(1−α).

Exp 06: CE BJT Amplifier — Gain & Frequency Response

Theory (Simple Explanation)
The CE amplifier gives high voltage & current gain, and the output is 180° out of phase with input. A voltage divider bias
circuit sets the Q-point; coupling capacitors (C1, C2) block DC and pass AC; emitter bypass capacitor (C3) improves gain
at mid/high frequencies.
At low frequencies, coupling/bypass capacitors have high reactance → gain drops (lower cutoff f1).
• At high frequencies, internal transistor capacitances reduce gain → drops after upper cutoff f2.
• Between f1 and f2 is the 'mid-band' region where gain is maximum & flat.

Key Formulas
Voltage Gain: A_v = V_o / V_i

Gain in dB: A_v(dB) = 20·log10(V_o/V_i)

Bandwidth: BW = f2 − f1 (f1 = lower cutoff, f2 = upper cutoff, at −3dB points)

Gain-Bandwidth Product: GBW = Mid-band gain (linear, at 3dB down point) × Bandwidth

Procedure
• Build CE amplifier circuit (BC107, R1=33k, R2=3.3k, R3=1.5k, R4(RE)=330Ω, C1,C2=10µF, C3=100µF, Vcc=12V).
• Apply input 20 mV(p-p), 1 kHz sine from function generator.
• Measure output V_o; calculate gain A_v = V_o/V_i.
• Keep input constant at 20mV(p-p); vary frequency 100Hz → 1MHz; record V_o at each frequency.
• Calculate gain in dB for each frequency; plot Gain(dB) vs frequency on semi-log graph paper. • Identify −3dB points
from graph → these give f1 (lower) and f2 (upper) cutoff frequencies; BW = f2−f1.

Precautions / Common Mistakes

• Keep input amplitude constant (20mV p-p) while sweeping frequency — do NOT let it drift. • Use semi-log graph
(X-axis = log scale frequency, Y-axis = linear dB) — common mistake is using linear-linear graph.
• Common mistake: forgetting the −3dB point corresponds to gain = 0.707 × max gain (or max_dB − 3).
•
• CE amplifier output is 180° out of phase with input — remember this for phase-related questions.
1. CE amplifier output signal is __ out of phase with input:
A) 0°
B) 90°
C) 180°
D) 270°
Answer: C) 180°
2. Voltage gain in decibels is calculated as:
A) 10log(V_o/V_i)
B) 20log(V_o/V_i)
C) log(V_o/V_i)
D) 20log(V_i/V_o)
Answer: B) 20log(V_o/V_i)
3. Bandwidth of an amplifier is:
A) f1 + f2
B) f1 × f2
C) f2 − f1
D) f2/f1
Answer: C) f2 − f1
4. At the −3dB cutoff frequency, gain falls to what fraction of max value:
A) 0.5
B) 0.707
C) 0.9
D) 0.1
Answer: B) 0.707
5. What type of graph paper is used to plot frequency response?
A) Linear-linear
B) Log-log
C) Semi-log (freq on log axis)
D) Polar graph
Answer: C) Semi-log (freq on log axis)

Viva Questions
Q1. Why does gain drop at low frequencies?
Ans: Reactance of coupling/bypass capacitors increases at low f, blocking more AC signal.
Q2. Why does gain drop at high frequencies?
Ans: Internal (junction/stray) capacitances of the transistor start bypassing signal at high f.
Q3. What is the role of emitter bypass capacitor C3?
Ans: It bypasses AC signal around R_E, preventing gain loss due to emitter degeneration, improving mid-band gain.
Q4. What are h-parameters?
Ans: Hybrid parameters (h_ie, h_fe, h_re, h_oe) that model a transistor as a 2-port network for small-signal AC analysis.
 Theory (Simple Explanation)
MOSFET = Metal-Oxide-Semiconductor Field-Effect Transistor. It is a voltage-controlled device (unlike BJT which is
current-controlled). It has 3 terminals: Source, Drain, Gate. Gate is insulated from channel by a thin oxide layer, so gate
current ≈ 0.
Enhancement-type MOSFET is normally OFF; needs V_GS > threshold voltage V_T to start conducting.
• n-channel MOSFET needs positive V_GS (relative to source) to conduct.
• Two regions of operation: Triode/Ohmic region (V_DS small, acts like variable resistor) and Saturation region
(V_DS large, acts like constant current source).
• Condition for triode: (V_GS − V_DS) > V_T. Condition for saturation: (V_GS − V_DS) < V_T.

Key Formulas
Triode region: I_D ≈ μn·Cox·(W/L)·[(V_GS−V_T)·V_DS − (1/2)V_DS²]

Saturation region: I_D = μn·Cox·(W/L)·(V_GS−V_T)²·(1+λV_DS) [λ = 1/V_A]

Transconductance: g_m = ΔI_D / ΔV_GS (at constant V_DS)

Output (drain) resistance: r_o = ΔV_DS / ΔI_D (at constant V_GS)

Procedure
• Build circuit: MOSFET (IRF150 or similar), R1 = 1Ω (sense), V_DD = 20V, V_GS via separate variable supply.
• Set V_GS to a fixed value (e.g., 1.1V, 1.2V, 1.3V, 1.4V, 1.5V — near threshold).
• For each V_GS, vary V_DS and record I_D — repeat for each V_GS value.
• Plot family of I_D vs V_DS curves (one curve per V_GS) → drain characteristics.
• From graph, find V_T (threshold voltage), calculate g_m and r_o.

Precautions / Common Mistakes

• Identify Gate, Drain, Source pins correctly before connecting — wrong pinout can destroy MOSFET.
• Do not exceed max V_DS/V_GS ratings.
• Common mistake: confusing threshold voltage V_T (turns device ON) with cut-in voltage of a diode — different
concepts.
• MOSFET is voltage-controlled, gate draws ~0 current (unlike BJT base current) — common exam trap.
1. MOSFET is a __ controlled device:
A) Current
B) Voltage
C) Power
D) Resistance
Answer: B) Voltage
2. Gate current in an ideal MOSFET is approximately:
A) Very large
B) Equal to drain current
C) Zero (negligible)
D) Equal to source current only
Answer: C) Zero (negligible)
3. Enhancement MOSFET conducts only when:
A) V_GS = 0
B) V_GS < V_T
C) V_GS > V_T (threshold)
D) V_DS = 0
Answer: C) V_GS > V_T (threshold)
4. In saturation region, MOSFET acts approximately like a:
A) Variable resistor
B) Constant current source
C) Short circuit
•
D) Open circuit
Answer: B) Constant current source
5. Transconductance g_m is defined as:
A) ΔV_DS/ΔI_D
B) ΔI_D/ΔV_GS
C) ΔV_GS/ΔI_D
D) I_D/V_DS
Answer: B) ΔI_D/ΔV_GS

Viva Questions
Q1. What is threshold voltage?
Ans: The minimum gate-source voltage required to create a conducting channel and turn the MOSFET ON.
Q2. Name 2 advantages of MOSFET over BJT.
Ans: Very high input impedance (negligible gate current) and no minority-carrier storage delay → faster switching; also
simpler to fabricate at small sizes.
Q3. Is MOSFET voltage or current controlled?
Ans: Voltage controlled (drain current controlled by gate-source voltage).
Q4. What are the three terminals of MOSFET?
Ans: Source, Gate, Drain (plus body/substrate, often tied to source).
Exp 08: 741 Op-Amp — Amplifiers, Differentiator, Integrator, Filter
Theory (Simple Explanation)
An Op-amp (Operational Amplifier) is a very high-gain DC amplifier (open-loop gain 10⁴–10⁶) with 2 inputs (inverting −, non-
inverting +) and 1 output. Ideal op-amp: infinite input impedance, zero output impedance, infinite gain. External feedback
resistors set the actual (closed-loop) gain.

• Inverting amplifier: input at (−) pin through R_i; feedback R_f from output to (−) pin; (+) pin grounded. Output inverted
(180° shift).
• Non-inverting amplifier: input at (+) pin; R_i grounded, R_f feeds back to (−) pin. Output in phase, gain always > 1.
• Differentiator: output proportional to rate of change (derivative) of input — capacitor at input. • Integrator: output
proportional to the integral (area under curve) of input — capacitor in feedback path.
• Active filters use Op-amp + R + C to pass/block certain frequency ranges with amplification (unlike passive RC filters
which only attenuate).

Key Formulas
Inverting Amp Gain: A_cl = V_o/E_i = −R_f/R_i

Non-Inverting Amp Gain: A_cl = V_o/V_i = 1 + R_f/R_i

Integrator output: V_o(t) = −(1/R1·Cf) ∫V_i(t) dt [condition: T_i > R1·Cf]

Differentiator output: V_o(t) = −Rf·Ci·(dV_i/dt) [condition: Rf·Ci ≥ 10/(π·f_h)]

Gain in dB: A(dB) = 20·log10(V_o/V_i)

Procedure Summary
• Set bias supply to +15V (pin7) and −15V (pin4) for all op-amp circuits. Never exceed ±15V.
• Inverting amp: R_i=10k, R_f=100k → gain = −10. Apply 1V sine at various frequencies (50Hz–500kHz); record V_o
and calculate dB gain.
• Non-inverting amp: R_i=10k, R_f=100k → gain = 11. Input to (+) pin; repeat frequency sweep.
• Integrator: square wave input (500Hz, 5V amplitude) → triangular-ish output.
• Differentiator: triangular wave input (500Hz, 5V amplitude) → square-ish output (spikes at edges).
• Active filters: Sweep frequency, record V_o, plot Gain(dB) vs frequency (semi-log) → find cutoff frequency at −3dB
point.

Precautions / Common Mistakes

• Never exceed ±15V supply on 741 — this destroys the IC.
• Correctly identify pin numbers: Pin2=Inverting input, Pin3=Non-inverting input, Pin6=Output, Pin7=+V, Pin4=−V.
• Common mistake: swapping inverting/non-inverting inputs — completely changes circuit behavior/phase.
• For integrator/differentiator, input waveform TYPE matters (square for integrator input, triangular for differentiator
input) — don't mix up.
1. Closed loop gain of an inverting amplifier is:
A) 1 + R_f/R_i
B) −R_f/R_i
C) R_i/R_f
D) R_f × R_i
Answer: B) −R_f/R_i
2. Closed loop gain of a non-inverting amplifier is always:
A) Less than 1
B) Negative
C) Greater than or equal to 1
D) Zero
Answer: C) Greater than or equal to 1
3. In an ideal op-amp, input impedance is:
 A) Zero
B) Very low
C) Infinite
D) Equal to R_f
Answer: C) Infinite
4. Which pin of IC 741 is the inverting input?
A) Pin 2
B) Pin 3
C) Pin 6
D) Pin 7
Answer: A) Pin 2
5. An integrator circuit's output is proportional to the __ of the input:
A) Derivative
B) Integral
C) Square
D) Inverse
Answer: B) Integral
6. A differentiator circuit's output is proportional to the __ of the input:
A) Integral
B) Rate of change (derivative)
C) Amplitude only
D) Frequency squared
Answer: B) Rate of change (derivative)

Viva Questions
Q1. Why is the (−) input called a 'virtual ground' in inverting amplifier?
Ans: Because negative feedback forces V_(−) ≈ V_(+) = 0V (ground), even though no direct ground connection exists
there.
Q2. Why is op-amp gain very high in open loop?
Ans: Because it's designed as a general-purpose high-gain differential amplifier (10⁴–10⁶) meant to be tamed via external
feedback.
Q3. What is virtual short concept?
Ans: In an ideal op-amp with negative feedback, V+ ≈ V− (no current flows into inputs, but voltages are equal).
Q4. Why do we need active filters over passive filters?
Ans: Active filters (with op-amp) can provide gain besides filtering, and don't suffer loading effects/signal loss like passive
RC filters.

Last-Minute Revision Sheet

(Read this 20–30 minutes before the test — only the most critical points)

Exp 02 — Diode/Zener
• Si cut-in ≈ 0.7V, Ge cut-in ≈ 0.3V
• R_dc = V/I (static), r_ac = ΔV/ΔI (dynamic)
• Zener operates in REVERSE breakdown region (voltage regulator)
• Forward current: mA range; Reverse current: µA range

Exp 03 — Rectifiers
• V_avg(HW) = V_p/π ; V_avg(FW) = 2V_p/π
• Ripple factor r = V_r/V_dc × 100% → HW ≈1.21, FW ≈0.48
• FW ripple frequency = 2 × input frequency
• Bridge rectifier uses 4 diodes; HW uses 1 diode

Exp 04 — Clipper/Clamper
• Clipper = removes part of waveform (protection)
• Clamper = shifts DC level, shape unchanged (DC restorer)
• Clamper needs large τ=RC (≫ signal period)
• Half-wave rectifier = simplest diode clipper
 Exp 05 — BJT CE/CB
• Active mode: EB junction forward biased, CB junction reverse biased
• β = I_C/I_B (CE gain) ; α = I_C/I_E = β/(β+1) (CB gain)
• I_E = I_C + I_B
• Voltage-divider bias = most stable (β-independent); Fixed bias = least stable

Exp 06 — CE Amplifier
• Output is 180° out of phase with input
• A_v(dB) = 20 log10(V_o/V_i)
• BW = f2 − f1 (upper cutoff − lower cutoff, at −3dB points = 0.707×max gain)
• Plot Gain(dB) vs frequency on SEMI-LOG paper

Exp 07 — MOSFET
• Voltage-controlled device; Gate current ≈ 0
• Conducts only when V_GS > V_T (threshold voltage)
• Triode region: V_DS small (resistor-like); Saturation: V_DS large (current-source-like)
• g_m = ΔI_D/ΔV_GS ; r_o = ΔV_DS/ΔI_D

Exp 08 — 741 Op-Amp

• Inverting gain = −R_f/R_i (180° phase shift)
• Non-inverting gain = 1 + R_f/R_i (always ≥1, in phase)
• Pin2 = Inverting(−), Pin3 = Non-inverting(+), Pin6 = Output, Pin7=+V, Pin4=−V
• Integrator: capacitor in feedback; Differentiator: capacitor at input
• Max supply ±15V — never exceed

General Precautions (apply to ALL experiments)

• Always check circuit connections BEFORE switching ON power supply.
• Never exceed rated voltage/current of diode, BJT, MOSFET, or Op-amp.
• Connect voltmeter/ammeter with correct polarity.
• Identify component pins/terminals correctly before wiring (very common source of errors).
• Use semi-log graph paper whenever plotting Gain(dB) vs Frequency.
• Double check biasing voltage polarity (+15V/−15V for op-amp; V1/V2 for BJT/MOSFET circuits).
Good luck! Revise formulas, know pin diagrams (741 & BJT), and remember the shape of each characteristic curve (diode
I-V, BJT output curves, MOSFET drain curves, rectifier waveforms). You've got this!