Assignment 2
Tuesday, 28 July 2026 9:45 am
The feedback element is the 10 kΩ resistor in series with C₅, which connects the output V₀ back to node
X. C₅ is very large, so its impedance is negligible at signal frequencies and it only blocks DC. The feedback
element is therefore R_f = 10 kΩ.
Input side: the input end of R_f lands on node X, which is the source of Q1. The INPUT NODE is the gate
of Q1, so R_f is not connected to the INPUT NODE. The mixing at the input is therefore SERIES. This
agrees with the input loop (V_s → 0.1 kΩ → gate-source of Q1 → X → 0.2 kΩ → ground), which contains
node X, a node that is connected to the output.
Output side: the output end of R_f connects directly to V₀, which is the OUTPUT NODE. The sampling at
the output is therefore SHUNT. Check: setting V₀ = 0 makes the feedback signal zero, which confirms
that the output voltage is being sampled.
Topology: Series–Shunt (voltage–voltage) feedback. The basic amplifier is a voltage amplifier, so the
closed-loop input resistance R_if is high and the closed-loop output resistance R_of is low.
this is the closed-loop gain only if the
loop gain were large; here 𝛽𝐴!" =
0.354, so 𝐴# is far from 51
The feedback network consists of the 10 kΩ resistor (from V₀ to node X) and the 0.2 kΩ resistor (from
node X to node W). C₅ is very large and acts as a short circuit at signal frequencies, and W is bypassed to
ground by C₄, so at mid-band the 0.2 kΩ resistor sits between X and ground.
The two resistors form a voltage divider across V₀, with node X as the tap.
Q₃ has its drain (W) bypassed to ground by C₄ and its source tied to −5 V (also an AC ground), so Q₃ is
shorted out and does not appear. Q₄ and the 8.8 kΩ resistor are DC-bias only and are removed.
The 10 kΩ/1.5 kΩ base divider is bypassed to ground by C₂, so it is shorted out and removed. The base of
Q₂ becomes an AC ground, so Q₂ operates as a common-base stage.
The 100 kΩ/10 kΩ network around the op-amp is local feedback and is kept as part of the basic
amplifier; it forms an inverting stage of gain −10 with an input resistance of 10 kΩ and an output
resistance of about 0.011 Ω (from A = 10⁵ and r_o = 100 Ω), which is negligible.
Loading of the feedback network: the feedback network (R₁ = 0.2 kΩ, R₂ = 10 kΩ) is removed and
replaced by its h-parameters:
the loop gain is only 0.354, so the feedback is weak and Af is NOT close to 1/β = 51. The low RZ (dominated by the 1 kΩ) limits the cascode gain to 1.80 and hence AOL to 18.0.
The MOSFET gate draws no current
h11 carries no input current here because the gate is an open circuit
C2 dominates because it sees the smallest resistance (1.304 kΩ). The feedback lowers the low corner by
the factor 1.354, which together with ωfH = (1 + β·A_OL)ωH widens the bandwidth by the same factor.
Note: the C2 term dominates this sum, while the cascode makes Q2's emitter current
almost independent of the base bypassing. The pole it creates is therefore cancelled by
a nearby zero, and the simulation confirms that removing C2 entirely leaves fL
unchanged.
Conclusion: the inverting amplifier is not there only for gain — it provides the second
inversion that makes the loop negative. Removing it turns the circuit into a positive-
feedback amplifier with a much lower, less stable gain, a lower input resistance, a much
higher output resistance, a narrower bandwidth and more distortion.
Figure 1 — Fig. 1(a) built in LTspice. The three .model lines are the ones supplied with
the assignment with four values corrected (see Section X). The op-amp is a subcircuit
with a gain of 100000 and a 100 Ω output resistance, matching the specification in the
question.
Figure 2 — Simulated frequency response at Vo. Mid-band gain 22.46 dB, lower corner
1.40 Hz, upper corner 453 MHz.
Figure 3 — Operating point and measured corner frequencies from the SPICE
error log.
Simulation of Fig. 1(a)
The circuit was entered in LTspice using the mode supplied with the assignment, with
the four corrections listed in Section X. Figure 1 shows the schematic and Figure 2 shows
the frequency response at Vo. The corner frequencies were measured with .meas
statements rather than read off the plot with a cursor, so the numbers in Table 2 come
straight from the simulator.
The bias point agrees closely. Every quantity in Table 1 sits within about 2 % of the hand
calculation, while the largest single difference is V_Z at 3.7 %. The reported f_T of Q2 is
2.03 GHz against the 2 GHz given in the question, which confirms the corrected BJT
model does describe the specified device.
The mid-band gain came out at 13.27 V/V against the calculated 13.23 V/V, a difference
of 0.3 %. This is the closest of the three results and it confirms both the bias point and
the small signal analysis.
The two bandwidth figures need more explanation and these are dealt with below.
The simulated fL is 1.40 Hz against the calculated 5.92 Hz. The short-circuit time
constant method counts one pole per capacitor and takes no account of zeros. C2
bypasses the base of Q2, while Q2 sits in a cascode and draws its emitter current from
the drain of Q1, which has an output resistance of 49.6 kΩ against an emitter input
resistance of only 26 Ω. Bypassing the base changes the gain by 0.026%, so the pole and
its zero sit on top of each other and cancel. Dropping the C2 term from the sum gives
1.41 Hz, which agrees with the simulation to 0.7%. Simulations run with C2 shorted and
with C2 removed both return the same 1.4017 Hz, which confirms this
.
The simulated fH is 453 MHz against the calculated 260 MHz. Each individual open-
circuit time constant was checked against a simulation with the other three capacitances
set to zero, and all four agree. The gap comes from the step where 1/(2πΣτ) is taken as
fH, which assumes a single dominant pole and no zeros. Neither holds here — Cgd1 and
Cμ2 provide feedforward paths that place zeros near the corner. The evidence for this is
that the circuit with only Cgs1 present rolls off at 360 MHz, while the full circuit with all
four capacitances rolls off at 453 MHz. Adding capacitance widened the bandwidth,
which only zeros can do. The open-circuit time constant estimate is a lower bound by
construction.
Figure 4 — Fig. 1(b) built in LTspice. The inverting op-amp stage has been removed,
while the 1 kΩ load and the 10 kΩ / C5 feedback branch now both connect directly to
Vo. Everything else is identical to Figure 1.
Figure 5 — Frequency response, bandwidth drop from 452.9M to 264.4M
Simulation of Fig. 1(b)
Figure 4 shows the circuit with the inverting op-amp stage taken out. The bias point in Figure 6 is
identical to Fig. 1(a) down to the last digit reported, which is expected because C3 blocks any DC path
between the cascode and the output stage. Removing that stage therefore changes nothing about the
operating point and only affects the signal path.
Table 3 lists the three measured quantities. The mid-band gain falls from 13.27 V/V to 1.83 V/V, while
f_L rises from 1.40 Hz to 1.96 Hz and f_H falls from 453 MHz to 264 MHz. Both corners move inwards
and the bandwidth narrows.
That combination is the important one. Negative feedback lowers f_L, raises f_H and widens the
bandwidth, which is what Fig. 1(a) does. Here every one of those moves in the opposite direction, so
the feedback has become positive. The cause is the missing 180 degrees: the signal fed back to X
through the 10 kΩ resistor and C5 now adds to the gate-source voltage of Q1 rather than subtracting
from it.
Working backwards from the measured closed-loop gain confirms the size of the effect. With A_f =
1.83 and β = 0.2 / (0.2 + 10) = 0.0196, solving A_f = A / (1 − βA) gives A = 1.76 and a loop gain of 0.035.
That is well below unity, so the circuit stays stable and does not oscillate. The measured gpk equals
gmid, which shows there is no peaking either. What the amplifier loses is every benefit the negative
feedback was providing, while gaining nothing in return.
As a check on the feedback factors themselves, the ratio of the two low corner frequencies is 1.9592 /
1.3975 = 1.402. The predicted ratio is (1 + βA) for Fig. 1(a) divided by (1 − βA) for Fig. 1(b), which is
1.3502 / 0.9654 = 1.399. The two agree to within 0.2 %, so the shift in f_L really is the feedback factor
and not something else in the circuit.