Faculty of Science, Agriculture and Engineering

Engineering Module

Planned 2025 Module Handout:

Module Name: Embedded Systems I

SAQA Credits: 16
Code 5EEE222
Department Engineering
Pre-requisites: 5EEE112
Co-requisites: None
Module convener: Dr O.E. Oni and Dr. Oyebode Kazeem
Email address: OniE@unuzulu@[Link]
Office location: Richards Bay Campus
Lecture venue: Bay Lodge
Lecture days and time: 3 lectures a week
Lab venue As per the timetable
Lab day and time As per the timetable

Aim This module aims to give students a strong foundation in embedded systems by
introducing them to digital system fundamentals, including information
representation, Boolean algebra, logic gate behavior, combinational and sequential
digital circuits, digital building blocks, and algorithmic state machines. The module
also provides a basic understanding of what a microcontroller is, how it works
internally, and what it can be used for. These objectives will be carried out through a
combination of theoretical instruction and practical hands-on activities that reinforce
design thinking, simulation, and system implementation, ultimately preparing
students to design and analyze embedded digital systems for real-world applications.
The goal in convening this module is to impart elementary knowledge and a basic
understanding of logic and computer design and the advances in the underlying
technology that have had an impact on the application of these fundamentals. We
also aim to enable the student to design a prescribed digital system and finite state
machine. At the end of the study, the student must be able to appreciate the role of •
digital electronics in computer and automation systems.
Content The topic sequence to bring this about consists mainly of the following:
• Digital systems and information representation, Binary logic, Boolean Algebra,
• Combinational circuits, combinational design concepts and procedures, arithmetic
functions, sequential circuits, combinational design concepts and procedures.
• Digital storage and representation of data in a memory architecture.
• The purpose and capabilities of a simple ARM CPU.
• Instruction sets, op codes and operands. Compiling, assembling, linking and loading of
code using a command line tool chain. Debugging code in execution.
• Assembly conditional statements, loops and interrupts.
• Peripherals: GPIO, ADC, Timers, SPI.
• These concepts will then be re-iterated using the C language. An IDE will be used.
Functions, pointers, function pointers, while, for, if, logic operations
 Outcomes Design and implement AI-powered embedded systems to solve real-world Electrical
and Computer Engineering problems.
Apply signal processing and machine learning techniques to develop intelligent
features such as sound, image, or facial recognition.
Integrate hardware and software components effectively in the development of smart
systems.
Manage project constraints including cost, performance, and resource limitations
through practical design choices.
Demonstrate the ability to work through the full design cycle—from problem
definition, prototyping, and testing to evaluation.
Utilize prior knowledge from design, programming, electronics, and AI-related
courses to deliver a functional solution.
Communicate technical findings effectively through reports, presentations, and
system demonstrations.

Assessment Plan
Activity Date/period Format Learning Content
Test 1 18th or 21st of August Sit-in Lectures 1- 6
Test 2 TBA Sit-in Lectures 7 - 10
Group Project TBA Report + Various
presentation
Final TBA Sit-in All learning units
Examination

DP requirements:
40% Class Record, 80% attendance
Assessment:
Practical’s (15%); Project (15%); Tests (70%); Exam (50%)

Knowledge areas

Mathematics Basic Sciences Engineering Sciences Design and Synthesis Complementary

Studies

0 0 70 30 0

Prescribed Books/Reading Materials/Notes

"Digital Design and Computer Architecture" by David Money Harris & Sarah Harris
• Highly recommended for beginner to intermediate level.
• Covers: Boolean algebra, combinational and sequential logic, state machines,
instruction sets, and computer architecture fundamentals.

General assessment strategy

Assessment Task Weighting The following DP rules apply:
Laboratory practical’s 20%
Class Test 60% 15 marks each
Written Final Proj. 20% Completion of all project milestones with a minimum 30%
average mark for all milestones (excluding acceptance test and
final report and code handin). Breakdown of milestones:
Total 100%

DP Marks 40% min

Learning Environment
24 Lectures
6 Practical
2 Class Tests
1 Project
1 Examination

SM = 15% of Practical + 15% of Project + 70% of Test

Exam admission is DP of 40% and Practical attendance
Final marks = 50% of SM + 50% of Exam

ECSA Credit Calculation

ECSA: Credits C = { LTLML + TTTMT + PTPMP + XTXMX + ATA + EME}/10

L = number of lectures TL = duration of lecture period ML = total work per lecture period
T = number of tutorials TT = duration of tutorial period MT = total work per tutorial period
P = total practical periods TP = duration of practical period MP = total work per practical period
X = total other contact periods TX = duration of other period MX = total work per other period
A = total assignment/project non-contact hours
E = assessment hours outside of time accounted for by L, T, P, X and A ME = total work per assessment hour

Type of Activity Time Unit in Contact Time Multiplier

hours
L = 4 lectures per week x 12 weeks = 48 TL = 0,83 ML = 2,5

T = 1 tutorial per week x 12 = 12 TT=0,83 MT =1,5

P = 4 practical session TP = 2 MP = 2
sX == 10
0

A=6 𝑇𝐴 = 1,00

E = 1 x 3 hour examination + 2 x 1.5 hour class tests = 6 hours TE=1 ME = 4

C = {(48x 0.83 x 2,5) + (12 x 0.83 x 1,5) + (4 x 2 x 2) + (6 x 1) + (6 x 4)}/10 = 16 credits