Chapter 3 Notes
Chapter 3 Notes
3.1 Timer/Counters :SFRs: TMOD, TCON, Timer/Counter - Logic and modes, Simple
programs on timer to generate time delay
3.2 Interrupts-SFRs:- IE, IP , Simple programs on interrupts
3.3 Serial communication - SFRs: SCON , SBUF , PCON, Modes of serial communication.
Simple programs on serial communication
3.4 I/O port structure and configuration - P0 , PI , P2 ,P3
As the frequency of the oscillator is precisely defined and very stable, pulses it generates are
always of the same width, which makes them ideal for time measurement. Such crystals are
also used in quartz watches. In order to measure time between two events it is sufficient to
count up pulses coming from this oscillator. That is exactly what the timer does. If the timer is
properly programmed, the value stored in its register will be incremented (or decremented)
with each coming pulse, i.e. once per each machine cycle. A single machine-cycle instruction
lasts for 12 quartz oscillator periods, which means that by embedding quartz with oscillator
frequency of 12MHz, a number stored in the timer register will be changed million times per
second, i.e. each microsecond.
The 8051 microcontroller has 2 timers/counters called Timer0 and Timer1. As their names
suggest, their main purpose is to measure time and count external events. Besides, they can be
used for generating clock pulses to be used in serial communication, so called Baud Rate.
a. Clock
Every Timer needs a clock to work, and 8051 provides it from an external crystal which is the
main clock source for Timer. The internal circuitry in the 8051 microcontrollers provides a
clock source to the timers which is 1/12th of the frequency of crystal attached to the
microcontroller, also called as Machine cycle frequency.
b. Counter Mode
In the counter mode, the external events are counted. In this mode, the timer register is
incremented for each 1 to 0 transition of the external input pin. This type of transitions is
treated as events. The external input pins are sampled once in each machine cycle, and to
determine the 1or 0 transitions, another machine cycle will be needed. So in this mode, at least
two machine cycles are needed. When the frequency is12MHz, then the maximum count
frequency will be 12MHz/24 = 500KHz. So for event counting the time duration is 2 µs.
There are two 16-bit timers and counters in 8051 microcontroller: timer 0 and timer 1. Both
timers consist of 16-bit register in which the lower byte is stored in TL and the higher byte is
stored in TH.
Timer T0
As seen in figure below, the timer T0 consists of two registers – TH0 and TL0 representing a
low and a high byte of one 16-digit binary number.
Accordingly, if the content of the timer T0 is equal to 0 (T0=0) then both registers it consists of
will contain 0. If the timer contains for example number 1000 (decimal), then the TH0 register
(high byte) will contain the number 3, while the TL0 register (low byte) will contain decimal
number 232.
Timer 1 :
Similarly TL1 and TH1 registers are available to load the count values for Timer 1.
The TMOD register selects the operational mode of the timers T0 and T1. As seen in figure
below, the low 4 bits (bit0 - bit3) refer to the timer 0, while the high 4 bits (bit4 - bit7) refer to
the timer 1. There are 4 operational modes and each of them is described herein.
If we want to timer as a timer , for delay generation, C/T is made 0 and it will count the on chip
clock frequency of 8051 oscillator divided by 12. The resultant timer clock is gated to the timer
by means of the circuit shown in Figure above. If C/T is made 1, the timer is clocked externally
through T0 or T1 pin.
If GATE bit of TMOD register is at logic 0, we must set Bit TRX in the TCON register to
'1' to run the timer. If GATE bit of TMOD register is at logic 1 , we must set Bit TRX in the
TCON register to '1' to run the timer and also external pin (INTX) must be a 1 . In short, the
timer is configured as a timer, then the timer pulses are gated to the timer by the run bit and the
gate bit or the external input bits (INTX).
In the following table, we will see the bit details and their different operations for high or low
value.
f. Modes of Timer:
Timer mode "0" is a 13-bit timer. This is a relic that was kept around in the 8051 to maintain
compatability with its predecesor, the 8048. Generally the 13-bit timer mode is not used in new
development.
When the timer is in 13-bit mode, TLx will count from 0 to 31. When TLx is incremented from
31, it will "reset" to 0 and increment THx. Thus, effectively, only 13 bits of the two timer bytes
are being used: bits 0-4 of TLx and bits 0-7 of THx. This also means, in essence, the timer can
only contain 8192 values. If you set a 13-bit timer to 0, it will overflow back to zero 8192
machine cycles later.
Timer mode "1" is a 16-bit timer. This is a very commonly used mode. It functions just like 13-
bit mode except that all 16 bits are used.
TLx is incremented from 0 to 255. When TLx is incremented from 255, it resets to 0 and
causes THx to be incremented by 1. Since this is a full 16-bit timer, the timer may contain up to
65536 distinct values. If you set a 16-bit timer to 0, it will overflow back to 0 after 65,536
machine cycles.
[Link] that XTAL = 11.0592 MHz, write a program to generate a square wave of 2
kHz frequency on pin P1.5.
Solution:
Timer 0 is used for delay generation.
(a) T = 1 / f = 1 / 2 kHz = 500 us the period of square wave.
(b) 1 / 2 of it for the high and low portion of the pulse is 250 us.
(c) 250 us / 1.085 us = 230 and 65536 – 230 = 65306 which in hex is FF1AH. (write full steps
as done in the lecture)
(d) TL = 1A and TH = FF, all in hex.
The program is as follow.
MOV TMOD,#01 ;Timer 0, 16-bitmode
AGAIN: MOV TL0,#1AH ;TL0=1A, low byte of timer
MOV TH0,#0FFH ;TH0=FF, the high byte
SETB TR0 ;Start timer 0
BACK: JNB TF0,BACK ;until timer rolls over
CLR TR0 ;Stop the timer 0
CPL P1.5 ;toggle for square wave
CLR TF0 ;Clear timer 0 flag
SJMP AGAIN ;Reload timer
Timer mode "2" is an 8-bit auto-reload mode. When a timer is in mode 2, THx holds the
"reload value" and TLx is the timer itself. Thus, TLx starts counting up. When TLx reaches
255 and is subsequently incremented, instead of resetting to 0 (as in the case of modes 0 and 1),
it will be reset to the value stored in THx.
The following are the characteristics and operations of mode 2:
1. It is an 8-bit timer; therefore, it allows only values of 00 to FFH to be loaded into the timer’s
register TH
2. After TH is loaded with the 8-bit value, the 8051 gives a copy of it to TL. Then the timer
must be started. This is done by the instruction SETB TR0 for timer 0 and SETB TR1 for timer
1
3. After the timer is started, it starts to count up by incrementing the TL register. It counts up
until it reaches its limit of FFH. When it rolls over from FFH to 00, it sets high the TF (timer
flag).
4. When the TL register rolls from FFH to 0 and TF is set to 1, TL is reloaded automatically
with the original value kept by the TH register. To repeat the process, we must simply clear
TF. This makes mode 2 an auto-reload, in contrast with mode 1 in which the programmer has
to reload TH and TL
Steps to program in Mode 2. (polling method)
1. Load the TMOD value register indicating which timer (timer 0 or timer 1) is to be used,
and the timer mode (mode 2) is selected.
2. Load the TH registers with the initial count value.
3. Start timer.
4. Keep monitoring the timer flag (TF) with the JNB TFx,target instruction to see whether
it is raised. Get out of the loop when TF goes high.
5. Clear the TF flag.
6. Go back to Step4, since mode 2 is autoreload.
Delay Calculation:
The timer works with a clock frequency of 1/12 of the XTAL frequency; therefore, we have
11.0592 MHz / 12 = 921.6 kHz as the timer frequency.
As a result, each clock has a period of T = 1/921.6kHz = 1.085us. In other words, Timer 0
counts up each 1.085 us resulting in delay = number of counts × 1.085us.
(a) in hex
(FF – XX + 1) × 1.085 us, where XX are TH, TL initial values . Notice that value XX is in
hex.
(b) in decimal
Convert XX values of the TH, TL register to decimal to get a NNN decimal, then (256-NNN)
× 1.085 us
Write a program togenerate a square wave of 200 μs period on pin P2.1. Use timer 0 in
mode 2 to create the square wave. Assume that XTAL = 11.0592 MHz.
Solution:
We will use timer 0 in mode 2 (auto reload).
Ton = Toff = 200/2 = 100 μs
TH0 = 256 –(100/1.085 us) = 164D = A4H
MOV TMOD,#02H ;T0/8-bit/auto reload
MOV TH0,#0A4 ; TH0 = count value
MOV TH1,#0A4 ; TH1 = count value
SETB TR0 ;start the timer 0
BACK: JNB TF0,BACK ;till timer rolls over
CPL P2.1 ;toggle p2.1
CLR TF0 ;clear Timer 0 flag
SJMP BACK ;mode 2 is auto-reload
Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it essentially
becomes two separate 8-bit timers. Timer 0 is TL0 and Timer 1 is TH0. Both timers count
from 0 to 255 and overflow back to 0. All the bits that are related to Timer 1 will now be tied to
TH0.
While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put into modes 0, 1
or 2 normally--however, you may not start or stop the real timer 1 since the bits that do that are
now linked to TH0. The real timer 1, in this case, will be incremented every machine cycle no
matter what.
In such case you can use the real Timer 1 as a baud rate generator and use TH0/TL0 as two
separate timers.
g. Example Programs:
1. Assume that XTAL = 11.0592 MHz, write a program to generate a square wave of
2 kHz frequency on pin P1.5.
1 / 2 of it for the high and low portion of the pulse is 250 us.
ORG 0000H
AGAIN: SETB P1.5
ACALL T1M1DELAY
CLR P1.5
ACALL T1M1DELAY
SJMP AGAIN
T1M1DELAY:
MOV TMOD,#10H ; Timer 0, 16-bitmode
MOV TL1,#1AH ; TL1=1A, low byte of timer
MOV TH1,#0FFH ; TH1=FF, the high byte
SETB TR1 ; Start timer 1
BACK: JNB TF1,BACK ; until timer rolls over
CLR TR1 ; Stop the timer 1
CLR TF1 ; Clear timer flag 1
RET
END
2. Assume that XTAL = 11.0592 MHz, write a program to generate a square wave of
5kHz frequency on pin P1.5.
1 / 2 of it for the high and low portion of the pulse is 100 us.
ORG 0000H
AGAIN: SETB P1.5
ACALL T1M1DELAY
CLR P1.5
ACALL T1M1DELAY
SJMP AGAIN
T1M1DELAY:
MOV TMOD,#10H ; Timer 0, 16-bitmode
MOV TL1,#A4H ; TL1=1A, low byte of timer
MOV TH1,#0FFH ; TH1=FF, the high byte
SETB TR1 ; Start timer 1
BACK: JNB TF1,BACK ; until timer rolls over
CLR TR1 ; Stop the timer 1
CLR TF1 ; Clear timer flag 1
RET
END
3. Assume that XTAL = 11.0592 MHz, write a program to generate a square wave of
1kHz frequency on pin P2.0.
1 / 2 of it for the high and low portion of the pulse is 500 us.
ORG 0000H
AGAIN: SETB P2.0
ACALL T0M1DELAY
CLR P2.0
ACALL T0M1DELAY
SJMP AGAIN
T0M1DELAY:
MOV TMOD,#01h ; Timer 0, 16-bitmode
MOV TL0,#A4H ; TL1=1A, low byte of timer
MOV TH0,#0FFH ; TH1=FF, the high byte
SETB TR0 ; Start timer 1
BACK: JNB TF0,BACK ; until timer rolls over
CLR TR0 ; Stop the timer 1
CLR TF0 ; Clear timer flag 1
RET
END
4. Assume that XTAL = 12 MHz, write a program to generate a square wave of 5kHz
frequency on pin P2.0. Use Timer0 in Mode1
1 / 2 of it for the high and low portion of the pulse is 100 us.
(65535-count+1) X 1 us = 100 us
65536-count = 100 us / 1 us = 100
Count = 65536 – 100 = 65436 which in hex is FF9CH.
ORG 0000H
AGAIN: SETB P2.0
ACALL T0M1DELAY
CLR P2.0
ACALL T0M1DELAY
SJMP AGAIN
T0M1DELAY:
MOV TMOD,#01h ; Timer 0, 16-bitmode
MOV TL0,#9CH ; TL1=1A, low byte of timer
MOV TH0,#0FFH ; TH1=FF, the high byte
SETB TR0 ; Start timer 1
BACK: JNB TF0,BACK ; until timer rolls over
CLR TR0 ; Stop the timer 1
CLR TF0 ; Clear timer flag 1
RET
END
3.2 Interrupts
Interrupts are the events that temporarily suspend the main program, pass the control to the
external sources and execute their task.
The interrupts refer to a notification, communicated to the controller, by a hardware device or
software, on receipt of which controller momentarily stops and responds to the interrupt.
Whenever an interrupt occurs the controller completes the execution of the current instruction
and starts the execution of an Interrupt Service Routine (ISR) or Interrupt Handler. ISR is a
piece of code that tells the processor or controller what to do when the interrupt occurs. After the
execution of ISR, controller returns back to the instruction it has jumped from (before the
interrupt was received). The interrupts can be either hardware interrupts or software
interrupts.
a. Interrupt Sources
The 8051 architecture can handle interrupts from 5 sources. These are: the two external
interrupt lines, two timers and the serial interface. Each one of these is assigned an interrupt
vector address.
Timer interrupts – Each Timer is associated with a Timer interrupt. A timer interrupt notifies
the microcontroller that the corresponding Timer has finished counting.
External interrupts – There are two external interrupts EX0 and EX1 to serve external
devices. Both these interrupts are active low. In 8051, P3.2 (INT0) and P3.3 (INT1) pins are
available for external interrupts 0 and 1 respectively. An external interrupt notifies the
microcontroller that an external device needs its service.
Serial interrupt – This interrupt is used for serial communication. When enabled, it notifies
the controller whether a byte has been received or transmitted.
Upon activation of an interrupt, the microcontroller goes through the following steps
1. It finishes the instruction it is executing and saves the address of the next instruction (PC) on
the stack.
2. It also saves the current status of all the interrupts internally (i.e: not on the stack).
3. It jumps to a fixed location in memory, called the interrupt vector table, that holds the address
of the ISR.
4. The microcontroller gets the address of the ISR from the interrupt vector table and jumps to
it. It starts to execute the interrupt service subroutine until it reaches the last instruction of the
subroutine which is RETI (return from interrupt)
5. Upon executing the RETI instruction, the microcontroller returns to the place where it was
interrupted. First, it gets the program counter (PC) address from the stack by popping the top
two bytes of the stack into the PC. Then it starts to execute from that address.
At power-up, all interrupts are disabled. Suppose Timer 0 is started. When it times out, TF0 in
the special function register TCON will be set. However, this will not cause an interrupt. To
enable interrupts, a number of steps need to be taken. There is an interrupt enable special function
register IE at byte address A8H. This register is bit addressable. (The assembler gives special
mnemonics to each bit address.)
This register is responsible for enabling and disabling the interrupt. EA register is set to one for
enabling interrupts and set to 0 for disabling the interrupts. Its bit sequence and their meanings
are shown in the following figure.
Example 11-1
e. IP (Interrupt Priority) Register
The default priority of interrupts are shown in the interrupt vector table. We can change the
priority levels of the interrupts by changing the corresponding bit in the Interrupt Priority (IP)
register as shown in the following figure.
• A low priority interrupt can only be interrupted by the high priority interrupt, but not
interrupted by another low priority interrupt.
• If two interrupts of different priority levels are received simultaneously, the request of
higher priority level is served.
• If the requests of the same priority levels are received simultaneously, then the internal
polling sequence determines which request is to be serviced.
IP = 0x08
Default Priority Changed Priority
EX0 ET1
ET0 EX0
EX1 ET0
ET1 EX1
ES ES
ET2 ET2
More than one bit in IP register can also be set. In such a case, the higher priority interrupts will
For example, IP = 0x0A; will make Timer0 and Timer1 priorities higher. So the interrupt priority
IP = 0x0A
Default Priority Changed Priority
EX0 ET0
ET0 ET1
EX1 EX0
ET1 EX1
ES ES
ET2 ET2
Note that the Timer 0 and 1 have been assigned higher priorities in the same sequence as they
Whenever a low level is detected on the INT0/INT1 pin while global and external
interrupts are enabled, the controller jumps to interrupt service routine (ISR) to serve interrupt.
Whenever falling edge is detected on the INT0/INT1 pin while global and ext.
interrupts are enabled, the controller jumps to interrupt service routine (ISR) to serve interrupt.
There are lower four flag bits in TCON register required to select and monitor the external
interrupt type and ISR status.
Bit 3- IE1:
External Interrupt 1 edge flag, set by hardware when interrupt on INT1 pin occurred and
cleared by hardware when interrupt get processed.
Bit 2- IT1:
Bit 1- IE0:
Interrupt0 edge flag, set by hardware when interrupt on INT0 pin occurred and cleared by
hardware when an interrupt is processed.
Bit 0 - IT0:
3. Assume that the INT1 pin is connected to a switch that is normally high.
Whenever it goes low, it should turn on an LED. The LED is connected to P1.3
and is normally off. When it is turned on it should stay on for a fraction of a
second. As long as the switch is pressed low, the LED should stay on.
4. Write a program to switch on an LED connected to P3.0 for 500ms whenever
INT0 occurs
500 ms delay count calculation
Since 500ms is not possible with 16bit count, we will generate a delay of 50ms and call
it 10 times
For 50ms
ORG 0000H
SJMP MAIN
ORG 0003H
SETB P3.0
MOV R7,#0AH
L1: ACALL DELAY
DJNZ R7,L1
CLR P3.0
RETI
DELAY: MOV TMOD,#01H
MOV TL0,#0FDH
MOV TH0,#48H
SETB TR0
H1: JNB TF0,H1
CLR TR0
CLR TF0
RET
ORG 0030H
MAIN: MOV IE,#82H
L2: SJMP L2
END
3.3 Serial communication - SFRs: SCON , SBUF , PCON, Modes of serial communication.
Simple programs on serial communication
a. Serial Port
One of the 8051’s many powerful features is it’s integrated UART, otherwise known as a serial
port. The fact that the 8051 has an integrated serial port means that you may very easily read
and write values to the serial port. We simply need to configure the serial port’s operation
mode and baud rate. Once configured, all we have to do is write to an SFR to write a value to
the serial port or read the same SFR to read a value from the serial port. The 8051 will
automatically let us know when it has finished sending the character we wrote and will also let
us know whenever it has received a byte so that we can process it. We do not have to worry
about transmission at the bit level--which saves us quite a bit of coding and processing time.
b. SBUF register:
For a byte data to be transferred via the TxD line, it must be placed in the SBUF register using
instructions
MOV SBUF,#’D’ ;load SBUF=44h, ASCII for ‘D’
MOV SBUF,A ;copy accumulator into SBUF
A serially received data can be read from SBUF register using the instruction
SMOD: double baud rate bit. When 8051 is powered up, SMOD bit is at zero value. To
double the baud rate SMOD to be set to 1.
7 6 5 4 3 2 1 0
Description
SCON register is used to configure the serial port of [Link] register is used to configure the
data bits we want, the baud rate we will be using, and how the baud rate will be determined.
Note: The baud rate indicated in this table is doubled if PCON.7 (SMOD) is set.
Explanation of SCON
Bits SM0 and SM1 let us set the serial mode to a value between 0 and 3, as in table above.
Selecting the Serial mode also determines how the baud rate will be calculated. In modes 0 and
2 the baud rate is fixed based on the oscillator’s frequency. In modes 1 and 3 the baud rate is
variable based on how often Timer 1 overflows.
The next bit, SM2, is a flag for "Multiprocessor communication." Setting this bit enables multi-
processor communication.
In multiprocessor communication the serial port of a number of microcontrollers can be
connected to a common serial bus. One controller will act as a master and all other controller
will act as slave. •A unique 8-bit address is assigned to each slave and the SM2 bit in all the
slaves is set to 1.
The next bit, REN, is "Receiver Enable." This bit is set to receive data via the serial port, set
this bit.
The last four bits (bits 0 through 3) are operational bits. They are used when actually sending
and receiving data--they are not used to configure the serial port.
The TB8 bit is used in modes 2 and 3. In modes 2 and 3, a total of nine data bits are
transmitted. The first 8 data bits are the 8 bits of the main value, and the ninth bit is taken from
TB8.
The RB8 also operates in modes 2 and 3 and functions essentially the same way as TB8, but on
the reception side. When a byte is received in modes 2 or 3, a total of nine bits are received. In
this case, the first eight bits received are placed in SBUF and the value of the ninth bit received
will be placed in RB8.
TI means "Transmit Interrupt." When a program writes a value to the serial port, a certain
amount of time will pass before the individual bits of the byte are "clocked out" the serial port.
If the program were to write another byte to the serial port before the first byte was completely
output, the data being sent would be garbled. Thus, the 8051 lets the program know that it has
"clocked out" the last byte by setting the TI bit. When the TI bit is set, the program may
assume that the serial port is "free" and ready to send the next byte.
Finally, the RI bit means "Receive Interrupt." It functions similarly to the "TI" bit, but it
indicates that a byte has been received. That is to say, whenever the 8051 has received a
complete byte it will trigger the RI bit to let the program know that it needs to read the value
quickly, before another byte is read.
Mode-0:
• This mode is configured when SM0 and SM1 bits in SCON register are 0 and 0.
• In this mode, the serial port works like a shift register and the data transmission works
synchronously with a clock frequency of fosc /12.
• Serial data is received and transmitted through RXD. 8 bits are transmitted/ received at
a time.
• Pin TXD outputs the shift clock pulses of frequency fosc /12, which is connected to the
external circuitry for synchronization.
• The shift frequency or baud rate is always 1/12 of the oscillator frequency.
Mode-1 (standard UART mode) :
• This mode is configured when SM0 and SM1 bits in SCON register are 0 and 1.
• In mode-1, the serial port functions as a standard Universal Asynchronous Receiver
Transmitter (UART) mode.
• 10 bits are transmitted through TXD or received through RXD. The 10 bits consist of
one start bit (which is usually '0'), 8 data bits (LSB is sent first/received first), and a
stop bit (which is usually '1').
• TI flag is set after transmission of one byte.
• The baud rate is variable.
The following figure shows the way the bits are transmitted/ received.
• In receiving mode, data bits are shifted into the receiver at the programmed baud rate.
The data word (8-bits) will be loaded to SBUF if the following conditions are true.
• RI must be zero. (i.e., the previously received byte has been cleared from SBUF)
• After the data is received and the data byte has been loaded into SBUF, RI becomes
one.
Where,
• This mode is configured when SM0 and SM1 bits in SCON register are 1 and 1.
• In this mode 11 bits are transmitted through TXD or received through RXD.
• The various bits are as follows: a start bit (usually '0'), 8 data bits (LSB first), a
programmable 9 th (TB8 or RB8)bit and a stop bit (usually '1').
• While transmitting, the 9 th data bit (TB8 in SCON) can be assigned the value '0' or '1'.
For example, if the information of parity is to be transmitted, the parity bit (P) in PSW
could be moved into TB8.
• TI flag is set after transmission of one data byte
• On reception of the data, the 9 th bit goes into RB8 in 'SCON', while the stop bit is
ignored.
• RI flag is set , once a data byte is received
• Mode-3 is same as mode-2, except the fact that the baud rate in mode-3 is variable (i.e.,
just as in mode-1).
• f baud = (2 SMOD /32) * ( fosc / 12 (256-TH1)) . This baud rate holds when Timer-1 is
programmed in Mode-3.
e. Programming:
f. Example Programs:
1. Write a program for the 8051 to transfer letter “A” serially at 4800 baud, continuously.
Count calculation for 4800 baud
The final formula for baud rate is as below. Baudrate = Fosc/(32 * 12 * (256-count))
Now with Fosc = 11.0592Mhz, TH1 value for 4800 baudrate will be
4800 = 11.0592 X 106/(32 * 12 * (256-count))
256-count = 11.0592 X 106/(32 * 12 *4800) = 6
Count =256-6 = 250 = FA H
Solution:
MOV TMOD,#20H ;timer 1,mode 2(auto reload)
MOV TH1,#FAH ;4800 baud rate
MOV TL1,#FAH
MOV SCON,#50H ;8-bit, 1 stop, REN enabled
SETB TR1 ;start timer 1
AGAIN: MOV SBUF,#”A” ;letter “A” to transfer
HERE: JNB TI,HERE ;wait for the last bit
CLR TI ;clear TI for next char
SJMP AGAIN ;keep sending A
2. Write a program for the 8051 to transfer “YES” serially at 9600 baud, 8-bit data, 1
stop bit, do this continuously
Solution:
Count calculation for 9600 baud
The final formula for baud rate is as below. Baudrate = Fosc/(32 * 12 * (256-count))
Now with Fosc = 11.0592Mhz, count value for 9600 baudrate will be
9600 = 11.0592 X 106/(32 * 12 * (256-count))
256-count = 11.0592 X 106/(32 * 12 *4800) = 3
Count =256-3 = 253 = FD H
Receiving:
In programming the 8051 to receive character bytes serially
1. TMOD register is loaded with the value 20H, indicating the use of timer 1 in mode 2 (8-bit
auto-reload) to set baud rate
2. TH1 is loaded to set baud rate
3. The SCON register is loaded with the value 50H, indicating serial mode 1, where an 8-
bit data is framed with start and stop bits
4. TR1 is set to 1 to start timer 1
5. RI is cleared by CLR RI instruction
6. The RI flag bit is monitored with the use of instruction JNB RI,xx to see if an entire
character has been received yet
7. When RI is raised, SBUF has the byte, its contents are moved into a safe place
8. To receive the next character, go to step 5
3. Write a program for the 8051 to receive bytes of data serially, and put them in P1, set the
baud rate at 4800, 8-bit data, and 1 stop bit
Solution:
Count calculation for 4800 baud
The final formula for baud rate is as below. Baudrate = Fosc/(32 * 12 * (256-count))
Now with Fosc = 11.0592Mhz, TH1 value for 4800 baudrate will be
4800 = 11.0592 X 106/(32 * 12 * (256-count))
256-count = 11.0592 X 106/(32 * 12 *4800) = 6
Count =256-6 = 250 = FA H
In the 8051 there is only one interrupt set aside for serial communication. This interrupt is used
to both send and receive data. If the interrupt bit in the IE register (IE.4) is enabled, when RI or
TI is raised the 8051 gets interrupted and jumps to memory location 0023H to execute the ISR.
In that ISR we must examine the TI and RI flags to see which one caused the interrupt and
respond accordingly.
Programming with interrupts:
Write a program in which the 8051 reads data from P1 and writes it to
P2 continuously while giving a copy of it to the serial COM port to be transferred serially.
Assume that XTAL=11.0592. Set the baud rate at
9600.
Solution:
ORG 0000H
LJMP MAIN
ORG 0023H
LJMP SERIAL ;jump to serial int ISR
ORG 0030H
MAIN: MOV P1,#0FFH ;make P1 an input port
MOV TMOD,#20H ;timer 1, auto reload
MOV TH1,#0FDH ;9600 baud rate
MOV SCON,#50H ;8-bit,1 stop, ren enabled
MOV IE,10010000B ;enable serial int.
SETB TR1 ;start timer 1
BACK: MOV A,P1 ;read data from port 1
MOV SBUF,A ;give a copy to SBUF
MOV P2,A ;send it to P2
SJMP BACK ;stay in loop indefinitely
Port Structure
Each port of 8051 has bidirectional capability. Port 0 is called 'true bidirectional port' as it floats
(tristated) when configured as input. Port-1, 2, 3 are called 'quasi bidirectional port'.
MOV A,#55H
BACK: MOV P0,A
ACALL DELAY
CPL A
SJMP BACK
Port 0 as Input : With resistors connected to port 0, in order to make it an input, the port must be
programmed by writing 1 to all the bits. In the following code, port 0 is configured first as an
input port by writing 1′s to it, and then data is received from the port and sent to P1.
Dual role of port 0: Port 0 is also designated as AD0-AD7, allowing it to be used for both address
and data. When connecting an 8051/31 to an external memory, port 0 provides both address and
data. The 8051 multiplexes address and data through port 0 to save pins. ALE indicates if P0 has
address or data. When ALE = 0, it provides data D0-D7, but when ALE =1 it has address and data
with the help of a 74LS373 latch
As shown in Fig 1, When control is '1', the port is used for address/data interfacing. When the control
is '0', the port can be used as a normal bidirectional I/O port.
Let us assume that control is '0'. When the port is used as an input port, '1' is written to the latch. In
this situation both the output MOSFETs are 'off'. Hence the output pin floats. This high impedance
pin can be pulled up or low by an external source. When the port is used as an output port, a '1'
written to the latch again turns 'off' both the output MOSFETs and causes the output pin to float. An
external pull-up is required to output a '1'. But when '0' is written to the latch, the pin is pulled down
by the lower MOSFET. Hence the output becomes zero.
When the control is '1', address/data bus controls the output driver MOSFETs. If the address/data
bus (internal) is '0', the upper MOSFET is 'off' and the lower MOSFET is 'on'. The output becomes
'0'. If the address/data bus is '1', the upper transistor is 'on' and the lower transistor is 'off'. Hence the
output is '1'. Hence for normal address/data interfacing (for external memory access) no pull-up
resistors are required.
Port-0 latch is written to with 1's when used for external memory access.
Port-1 has 8 pins (P1.1-P1.7) .The structure of a port-1 pin is shown in figure below.
Port-1 does not have any alternate function i.e. it is dedicated solely for I/O interfacing.
To use port-1 as input port, '1' has to be written to the latch. When '0' is written to the pin by the
external device then the external source must sink current due to internal pull-up. If the external
device is not able to sink the current the pin voltage may rise, leading to a possible wrong reading.
Suppose we want to write 1 on pin of Port 1, a '1' written to the latch which turns 'off' the FET .
Due to Vcc connection through internal pull up resistor, the port pin will be at logic [Link] a 0 is
written to the latch, the FET will be turned ON and pin will be at Logic 0.
Port-2 has 8-pins (P2.0-P2.7) . The structure of a port-2 pin is shown in fig below.
Port-2 is used for higher external address byte or a normal input/output port.
When control bit is logic 0, I/O operation takes place. The I/O operation is similar to Port-1. To use
port-2 as input port, '1' has to be written to the latch. When '0' is written to the pin by the external
device then the external source must sink current due to internal pull-up. If the external device is
not able to sink the current the pin voltage may rise, leading to a possible wrong reading.
Suppose we want to write 1 on pin of Port 2, a '1' written to the latch which turns 'off' the FET .
Due to Vcc connection through internal pull up resistor, the port pin will be at logic [Link] a 0 is
written to the latch, the FET will be turned ON and pin will be at Logic 0.
When external memory is connected, the control bit will be at logic 1 and port bit is used as higher
order address line. Port-2 latch remains stable when Port-2 pin are used for external memory access.
Here again due to internal pull-up there is limited current driving capability.
Port-3 has 8 pin (P3.0-P3.7) . Port-3 pins have alternate functions. The structure of a port-3 pin is
shown in fig below. Each pin of Port-3 can be individually programmed for I/O operation or for
alternate function.
• When used for I/O operation, the alternate output function would be at logic high.
• If you write a logic 0 to the port pin, this Q is logic 0, the output of NAND gate will be logic
1 and this turns on the FET gate. It makes the port pin connected to ground (logic 0).
• If you write a logic 1 is written to the port pin, then Q is 1 , the output of NAND gate will
be at logic 0,and this turns off the FET gate. Therefore the pin is at logic 1 because it is
connected to high.
Similarly, the alternate function can be activated only if the corresponding latch has been written to
'1'.
To use the port as input port, '1' should be written to the latch. This port also has internal pull-up
and limited current driving capability.
P3.0 RxD
P3.1 TxD
P3.2 INT0
P3.3 INT1
P3.4 T0
P3.5 T1
P3.6 WR
P3.7 RD
• P3.2 and P3.3 can be used as external interrupt pins(INT0’ and INT1’),
• P3.4 and P3.5 are used for external counter input pins(T0 and T1),
• P3.6 and P3.7 can be used as external data memory write and read control signal
pins(WR’ and RD’)read and write pins for memory access.
There is a subtle difference between reading a latch and reading the output port pin.
The status of the output port pin is sometimes dependant on the connected load. For instance if a
port is configured as an output port and a '1' is written to the latch, the output pin should also show
'1'. If the output is used to drive the base of a transistor, the transistor turns 'on'.
If the port pin is read, the value will be '0' which is corresponding to the base-emitter voltage of the
transistor.
Reading a latch: Usually the instructions that read the latch, read a value, possibly change it, and
then rewrite it to the latch. These are called "read-modify-write" instructions. Examples of a few
instructions are-
In this the latch value of P2 is read, is modified such that P2.1 is the same as Carry and is then
written back to P2 latch.
Reading a Pin: Examples of a few instructions that read port pin, are-