Week -1

Sequential Circuits

Sequential circuits are those, whose output depends not only on the present value of the input,
but also on previous values of the input signal at any instant of time.

Hence Sequential circuit can be considered as combinational circuit with feedback. Sequential
circuit uses a memory element like flip-flops as feedback circuit in order to store past values.
The block diagram of a sequential logic is illustrated in the below figure.

Sequential Circuit = Combinational Logic + Memory Elements

Block Explanation
Input Input gives signals or data to the circuit.
Combinational Logic Circuit It processes the input using logic gates.
Memory It stores previous data or state.
Feedback Path It sends stored data back to the circuit.
Clock Signal It controls the timing of the circuit operation.
Output It gives the final result of the circuit.

Types of Sequential circuits

1. Synchronous Sequential Circuit

In a synchronous circuit, every flip-flop receives the same clock signal. The input is applied
continuously, but the output changes only at the rising or falling edge of the clock pulse.

Since all flip-flops change their state at the same time, the operation is well organized and
synchronized.

2. Asynchronous Sequential Circuit

In this circuit, the output of one flip-flop acts as the input to the next flip-flop. Since there is
no common clock, each flip-flop changes its state one after another.

Because of this delayed operation, asynchronous circuits are also called Ripple Circuits.

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Applications of Sequential Circuits

Core Digital Systems:

➤ Memory Devices: Used to store binary data in flip-flops, latches, registers, RAM, and
ROM.
➤ Processors (CPUs): Used in control units and registers to fetch, decode, and execute
instructions in the correct sequence.
Timing & Counting;
➤ Counters: Used in digital clocks, timers, event counters, and frequency dividers.
➤ Clock Generation: Used to generate clock signals for synchronization of digital systems.

Control & Communication:

➤ Finite State Machines (FSMs): Used in traffic lights, vending machines, elevators, and
automation systems.
➤ Communication Systems: Used for data encoding, decoding, synchronization, and
error detection.

Other Applications:
➤ Shift Registers: Used for data storage, data transfer, and serial-to-parallel or parallel-
to-serial conversion.
➤ ADC & DAC: Used to convert analog signals to digital signals and digital signals to
analog signals.
➤ Programmable Devices: Used in FPGAs, CPLDs, and PLDs for designing digital circuits.
➤ Signal Processing: Used for filtering and processing audio and video signals.

Comparison between Combinational and Sequential Circuits

Parameter Combinational Circuits Sequential Circuits

Output Function of current inputs only. Function of current inputs and previous
states / outputs (memory).
Memory None; no feedback loop. Yes, uses flip-flops or latches to store
state (feedback).
Timing Asynchronous; output changes Often synchronous, controlled by a
immediately with input. clock signal.
Complexity Simpler, less complex. More complex due to memory and
feedback.
Speed Generally faster, as outputs Comparatively slower, due to
change instantly with inputs. dependency on clock cycles and past
states.

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 Building Logic gates (AND, OR, NOT). Logic gates plus memory elements
Blocks (flip-flops).
Examples Adders, Subtractors, Multipliers, Registers, Counters, State machines.
Decoders, Encoders.

Clock Pulses

A clock is a signal, which oscillates between logic level 0 and logic level 1, repeatedly.

Square wave with constant frequency is the most common form of clock signal.

A clock signal has “edges”. These are the instants at which the clock changes from 0 to 1 (a
positive edge) or from 1 to 0 (a negative edge).

Triggering

It is the process of changing the state (output) of a flip-flop by applying a clock pulse.

Types of triggering

Level triggering : Level triggering is the process in which a output changes when the
clock signal remains at a particular logic level (HIGH or LOW).

Types of Level Triggering

1. Positive Level Triggering (High-Level Triggering): The output changes when the
clock is HIGH (1).
2. Negative Level Triggering (Low-Level Triggering): The output changes when the
clock is LOW (0).

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High-Level Triggering (Positive Level Triggering):

It is a type of level triggering in which the flip-flop changes its

output only while the clock signal is at HIGH (Logic 1).

Low-Level Triggering (Negative Level Triggering): It is a

type of level triggering in which the flip-flop changes its
output only while the clock signal is at LOW (Logic 0).

Edge Triggering: Output changes only when inputs are present at the transition of the clock
pulse.

Types Edge triggering

1. Positive Edge Triggering: Rising edge triggering.

2. Negative Edge Triggering: Falling edge triggering.

Positive edge triggering: It is a type of edge triggering in which the output changes only
during the transition of the clock signal from LOW (0) to HIGH (1).
This transition is called the positive edge or rising edge.

Negative edge triggering: It is a type of edge triggering in which the out changes only during
the transition of the clock signal from HIGH (1) to LOW (0).
This transition is called the negative edge or falling edge.

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Ton, Toff and Duty Cycle

Ton (ON Time): The duration the signal is active (HIGH).

Toff (OFF Time): The duration the signal is inactive (LOW).

Periodic Time Interval (T): The time period (T) is the sum of Ton and Toff. One complete
cycle of ON + OFF.

T=Ton+Toff

Duty Cycle (D): Duty cycle is the ratio of ON time to the total time period of a signal.

𝑇𝑂𝑁
Duty Cycle =
𝑇𝑂𝑁 + 𝑇𝑂𝐹𝐹

Duty Cycle (Percentage):

𝑇𝑂𝑁
Duty Cycle (%) = × 100
𝑇𝑂𝑁 + 𝑇𝑂𝐹𝐹

Timing diagram of three different duty cycle

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Examples

Example 1: 50% Duty Cycle

The signal is ON for half the time and OFF for the other half.
Given:
 𝑇𝑂𝑁 = 1 second

 𝑇𝑂𝐹𝐹 = 1 second
Formula:
𝑇𝑂𝑁
Duty Cycle = ( ) × 100%
𝑇𝑂𝑁 + 𝑇𝑂𝐹𝐹
Calculation:
1
Duty Cycle = ( ) × 100% = 50%
1+1

Example 2: 20% Duty Cycle

The signal is ON for 20% of the time and OFF for 80% of the time.
Given:
 𝑇𝑂𝑁 = 2 ms

 𝑇𝑂𝐹𝐹 = 8 ms
Formula:
𝑇𝑂𝑁
Duty Cycle = ( ) × 100%
𝑇𝑂𝑁 + 𝑇𝑂𝐹𝐹
Calculation:
2
Duty Cycle = ( ) × 100% = 20%
2+8

Example 3
Suppose a signal has an ON time of 2 ms and a total time period of 10 ms.
Given:
 𝑇𝑂𝑁 = 2 ms

 Total Time Period 𝑇 = 10 ms

Formula:
𝑇𝑂𝑁
Duty Cycle = ( ) × 100%
𝑇
Calculation:

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 2
Duty Cycle = ( ) × 100% = 20%
10

Example 4
Consider a signal with an ON time of 40 μs and a total time period of 100 μs.
Given:
 𝑇𝑂𝑁 = 40 μs

 Total Time Period 𝑇 = 100 μs

Formula:
𝑇𝑂𝑁
Duty Cycle = ( ) × 100%
𝑇
Calculation:
40
Duty Cycle = ( ) × 100% = 40%
100

Timing Diagram
A Timing Diagram is a graphical representation that shows how a digital signal changes
with respect to time.

Timing diagrams are commonly used to analyse clock pulses and digital waveforms.

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