8085 MICROPROCESSOR

Definition: 8085 is an 8-bit microprocessor as it operates on

8 bits at a time and is created with N-MOS technology.
This microprocessor exhibits some unique characteristics and
this is the reason it still holds popularity among the
microprocessors.
The size of the data bus of 8085 is 8 bits while that of the
address bus is 16. Therefore, can address 64 KB (i.e., 216)
memory. Also, as it can perform 8-bit operation thus the size
of ALU is also 8-bit.
• The 8085 is an 8-bit microprocessor developed by Intel
in 1976.
• - It operates using a +5V power supply and has a clock
speed of 3 MHz.(The clock speed refers to how fast the
processor can execute instructions.3 MHz (Megahertz) =
3 million cycles per second.
• - It follows the Von Neumann architecture, where
program and data share the same memory.
• - It is used for learning and prototyping embedded
system applications.
• Example: A simple temperature sensor circuit can be
interfaced with the 8085 to read analog values and
process them for display.
Features of 8085 Microprocessor
• - 8-bit Data Bus: It processes 8-bit data at a time.
• - 16-bit Address Bus: Can access 64KB memory (2^16 =
65536 locations).
• - 74 Instructions: These are grouped into 5 categories
(discussed later).
• - 246 Opcodes: Operational codes used to instruct the
microprocessor.
• - Flags: Used to indicate conditions (Zero, Sign, Carry,
Parity, Auxiliary Carry).
• Example: After performing A = A - B, if A = 0, the zero
flag is set.

Architecture of 8085 Microprocessor

The architecture of 8085 microprocessor provides the idea
about what are the operations to be executed and how these
are performed.
It can perform operations that are given below:
1. Operates on and stores 8-bit data.
2. It executes arithmetic and logic operations.
3. 8085 also sequences the instructions to be executed.
4. Stores data temporarily.
However, in order to perform all such operations, the
processor needs a control unit, arithmetic logic unit,
registers, buses etc.
We have already discussed how CU, ALU and buses function
in a microprocessor. Here, in this article, we will discuss the
detailed architecture of 8085 microprocessor and how it
operates.
The figure below represents the architectural representation
of 8085 microprocessor:

Functional Units of 8085:

1. Registers: These are nothing but set of flip flops. These are
basically used to hold (store) the data.
General purpose registers– 8085 microprocessors contain 6
general purpose registers that are present inside the
microprocessor and stores 8-bit data in order to execute a
program.
These general purpose registers are B, C, D, E, H and L. These
registers can be combined to form pairs – BC, DE and HL in
order to execute the 16-bit operation.
These are programmable registers, that means these registers
are accessed by the programmer to insert and transfer the
data by making use of instructions.
Temporary registers: These registers are used by the ALU to
store the data on temporary basis and these are not
accessed by the programmer. These are of 2 types:
1. Temporary data register – It is an 8-bit register that holds
the operand and provides it to the ALU for program
execution. Also, the immediate results are stored by the
ALU in this register.
2. W and Z register – These registers are also used to hold
the temporary values. It is used by the control section of
the microprocessor so as to store the data during
operations.
2. Program Counter (PC): It is basically a special purpose
register that is used to store the memory location of the
instruction to be performed. As it is clear that in order to
fetch an instruction from the memory the microprocessor
needs to know about its address.
It is a 16-bit register as it stores address. This register is used
by the microprocessor to line up the instructions that are to
be executed in a sequential manner.
It functions in such a way that it fetches the opcode from one
memory location and simultaneously get incremented by the
next memory location. Thus, it provides sequencing of the
program to be executed.
3. Stack Pointer (SP): It is also a 16-bit register and is a part of
memory. The data is stored in the stack in serial format and
stack pointer generally stores the address of the last data
element stored in the stack. Thus the stack is based on LIFO.
Whenever a new data is added in the stack, then the stack
pointer starts pointing towards the very next memory
location.
As against, when a data element is removed from the stack,
then the stack pointer points to previous occupied memory
location.
4. Accumulator: It is an 8-bit register that stores the result of
the operation performed by the ALU. It is also known
as register A.
5. Flags: Flag register basically holds the status of the current
result generated by the ALU and not the actually generated
result. Thus we can say it is used to test the data conditions.
8085 has 5 flags that shows 5 different data conditions.
These are carry, sign, zero, parity and auxiliary carry flags.
However, the mostly used are: sign, carry and zero.
Working of 8085 Microprocessor
Now after having an idea about the functional units of the
8085 microprocessor, let us proceed further to understand
the operation of the 8085 microprocessor.
We already know that the function of a microprocessor is to
execute instructions. Also, in order to execute an instruction,
it first needs to be fetched then decoded and then executed.
And in order to fetch an instruction, firstly the address of the
instruction must be known.
The address of the instruction is present in the program
counter. This address is then placed on the 16-bit address bus
and is then forwarded towards the memory. From the
memory, the instruction present at that particular memory
location is fetched through the 8-bit data bus.
Here, in the above figure, we can clearly see that we have
combinely used data bus and address bus so as to reduce the
number of lines. As we know that at a particular time the
processor will access either the data bus or the address bus.
Further when the instruction is fetched from the memory,
then through internal buses the instruction is provided to
the instruction register. At this particular point of time
fetching the instruction from the memory is over.
Now, it’s time for the processor to decode the instruction. So,
it is then fed to the instruction decoder.
We already have the idea that both data and instruction in
the memory is stored in the form of an opcode. So, the
fetched opcode is analyzed by the instruction decoder
present inside the processor in order to execute the
instruction.
But, a noteworthy point over here is that, after an instruction
is fetched from the memory, then PC increments itself
thereby providing the address location of the next
instruction. As PC does not play any role in decoding and
executing.
However, after execution of first instruction, the next is
fetched form the memory.
Now, this is all about fetching and decoding, now what about
the execution of the instruction.
In the above figure, we can see the timing and control circuit.
This circuit basically sends the control signals to the various
units of the microprocessor to execute the instruction.
Suppose, the instruction is ADD A and B. This simply tells the
ALU to add the data present in B register with the data
present in accumulator i.e., A register. But, in 8085 the
decoded instruction is simply ADD B. So, automatically, the
ALU adds the value present in the accumulator with the data
in register B.
Also, in 8085 the outcome of the operation is stored register
A which is nothing but an accumulator.
Further when an instruction ADD C is decoded by the 8085,
then data at C register is added to the data present in register
A and is stored at register A. Due to such cumulative action,
register A is termed as an accumulator.
Basically, the timing and control circuit timely sends the
signals to the accumulator to release its value for proceeding
execution. Also, this timing and control circuit sends signals to
the register select that tells it to choose the particular
register.
Once the data is fetched from a particular register then it is
stored in the temporary register and it is used by the ALU. It is
to be kept in mind that a programmer can only access the
general purpose register as the temporary register is used by
the processor to hold the 2nd operand of the operation.
Now, once the operation is executed, then the result is fed to
the accumulator through the data bus. But a flag register is
also present that holds the status of the result present at the
accumulator.
As we have also discussed in the functional unit that a flag
register holds a sign, carry etc. related information of the
generated result.
After every instruction execution performed by the ALU,
the status of the flag register gets changed. So, ALU produces
the result and its status simultaneously after each operation.
As we have already discussed that W and Z are the temporary
registers but these are not accessed by the programmer as
both are used by the processor to hold the temporary value
stored by it.
So, this is all about the block diagram and working of 8085
microprocessor.
Applications of 8085 microprocessor
8085 finds its major applications in programmable calculators
as well as in numerical control and environment monitoring
systems. These are also used in switching, banking and
financial systems.

Interrupts
• In the 8085 microprocessor, interrupts are signals that
temporarily stop the CPU's normal execution to attend
to an urgent task (like input/output operations), and
then return to the original program.
• An interrupt is a signal that:
 • Informs the CPU that an external device needs attention.
• CPU pauses current execution.
• Jumps to a special routine (Interrupt Service Routine or
ISR).
• Returns back after handling it.
• Suppose the processor is executing an instruction and a
keyboard key is pressed. Then at this time, the processor
gets to know that the external device keyword is
requesting its services.
• So, if the processor checks for the priority of the
generated interrupt and if the generated interrupt holds
high priority then the processor switches to execute the
ISR by storing the address of the current program in the
stack. This is done so that after the execution of ISR, the
processor can switch back to the main program.

Types of Interrupts in 8085

8085 has 5 hardware interrupts:
1. TRAP: TRAP is the highest priority interrupt and is non-
maskable in nature. As this interrupt is non-maskable
thus cannot be masked (i.e., rejected or delayed) under
software control by the processor. This interrupt is edge
and level triggered. Thus the signal at this pin must be
high and remain enabled until it is acknowledged by the
processor.
Due to non-maskable nature, a TRAP signal at the pin can be
cleared only in two ways:
 The first is resetting of the processor by providing a low
signal at the RESET pin.
  The second is acknowledging the high TRAP signal.
So, basically whenever a high signal is received at the TRAP
pin of 8085 then the processor generates an acknowledging
signal by clearing the flip flops. So, after this interrupt is
acknowledged then the processor stores the return address
of the program in current execution in the stack. Also at the
same time, the Program counter is loaded with the fixed
vectored address of the TRAP interrupt in order to execute
the ISR operation.
2. RST 7.5: This interrupt holds the second-highest priority
among these interrupts and is maskable in nature. If the
mask bit of the interrupt is low, then this shows that the
processor is not masking the interrupt. So further the
processor loads the address of the current operation in
the stack and loads the vector address of RST 7.5 i.e.,
003CH onto the PC. Thus, 8085 starts executing the
instruction in the memory location in order to service
the routine.
3. RST 6.5 and RST 5.5: These two are level-triggered
interrupts and can be masked by the processor. The RST
6.5 and RST 5.5 holds a third and fourth level of priority
respectively.
Like the above-discussed interrupts, whenever these
two interrupts are generated then the processor loads
the PC with the respective vector address after
suspending the current execution.
[Link]: It is maskable interrupt but we have already
discussed that it is a non-vectored interrupt. And so
whenever an INTR signal is received by the processor then
the acknowledgement INTA is sent by the processor to the
requesting device by which it asks for the address for the
interrupt service routine. Once the external device provides
the address of ISR to the processor then it loads the address
in stack after it suspends the main program. Among all the
hardware interrupts, INTR is the lowest priority interrupt.
Software Interrupts

Instructions for Interrupt Control

Maskable Interrupt
• A maskable interrupt can be turned OFF (disabled) by
the programmer.
• Use `DI` instruction to disable all maskable interrupts.
• Can be ignored if CPU is busy.
• Examples in 8085:
• - RST 7.5
• - RST 6.5
• - RST 5.5
• - INTR
Non-Maskable Interrupt
• A non-maskable interrupt CANNOT be disabled or ignored.
• It has the highest priority.
• Used for critical tasks (e.g., power failure).
Example in 8085:
• - TRAP

Comparison: Maskable vs Non-Maskable

Pin Diagram of 8085

• - 40 Pins: Includes power, clock, control, and
address/data lines.
• - Multiplexed Address/Data Bus (AD0-AD7): First sends
address, then data.
• - ALE (Address Latch Enable): Signal to demultiplex
address/data.
• - RD, WR, IO/M: Control lines to manage read/write and
memory/I/O.
Example: ALE = 1 signals to latch address from AD0-AD7 for
further data transfer
Instruction Set Classification
An instruction is a binary command used to execute an
operation inside the microprocessor over a given data. A
group of instructions that are supported by the 8085
microprocessor is known to be the instruction set of 8085
microprocessor.
We know that an instruction set is a group of instruction that
executes the desired operation on the data specifically
described by the microprocessor 8085
[Link] Transfer Instructions
These instructions are used by the microprocessor in order to transfer the data from one location to
another. More specifically, it helps in transferring the data from source operand to destination
operand, without making any changes in the source data.

As the data present in the source is not modified. Thus it is more convenient to call it a data copy
instruction. As while transferring the data from source to destination, the data present in the source
is just copied to the destination also. Due to this no change in source data is noticed.

Basically, the instructions that come under this instruction set, are as follows:

This instruction helps to transfer the contents of register r2 into register r1. While the data in register
r2 will remain the same.

This instruction transfers the data in register B to an accumulator.

This instruction specifies the transfer of data present in the memory to the register. However, the
address of the memory location must be present in the HL register.

Example: MOV r, 1020H

This instruction specifies the immediate transfer of data to a memory location. And the address of
this memory location is specified at the H-L registers.

Example: MOV M, 32H

In this instruction, the data is immediately transferred to the specified register.

Example: MVI r, 16H

It is load accumulator instruction. This instruction is used to copy the data present in the memory
address specified as the operand of the instruction to the accumulator. More specifically, in this case,
the data present in the 16-bit memory address is transferred to the accumulator.

Example: LDA 1000H

It is load accumulator indirect instruction. In this instruction, the register that acts as operand holds a
memory location, where the actual data is present which is to be loaded at the accumulator.

Example: LDAX C/D

It stands for load H-L registers direct instruction. For this particular instruction, the data present in
the address specified in the operand is copied to the L register. Also, the data present in the next
memory location is loaded to the H register.

Example: LHLD 4500H

STA is stored accumulator direct instruction. Whenever this instruction is passed, then the data
present in the accumulator is transferred to the memory address specified in the operand.

Example: STA 2032H

It is stored accumulator indirect instruction. The register present as the operand holds a memory
address. So, the data of the accumulator is copied to that particular memory location.

Example: STAX D

This instruction is used to exchange the data present in two registers.

Example: We have XCHG H-L and D-E

So the contents of H and D while L and E are exchanged

This instruction transfers the data of HL pair into the stack pointer.

Like the SPHL, this instruction copies the data of H-L register into the stack pointer by placing the
higher order bytes at H and lower order bytes at L.

In this instruction, the stack is loaded with the data present in the register given in the operand.

Firstly, the SP gets decremented and higher order bytes are copied to the stack. Further SP gets
decremented in order to load the lower order register bytes.

Example: PUSH C

This instruction specifies the transfer of the data present at the top of the stack to the register given
as the operand.

Example: POP D

In case of OUT instruction, the data at the accumulator is copied to the I/O port. At the operand an
8-bit port address is present.

Example: OUT 56 H

This instruction specifies the loading of data present at the I/O port to the accumulator. The operand
holds the address of the port from where the data is to be copied.

Example: IN, 5B H
Arithmetic Instruction

This instruction set allows arithmetic operations to be performed over the data in memory and
register inside the 8085 microprocessor.

The arithmetic instruction set is given as follows:

This instruction specifies that the data present in the register is to be added with the data present in
the accumulator and the result is to be stored in the accumulator itself.

Example: ADD B

This instruction is used to add the data of the memory address specified at the operand with the
data present at the accumulator. And the result of the addition is stored in the accumulator.

Example: ADD 52H

In this particular instruction, the 8-bit data present as the operand is immediately added with the
data at the accumulator and the result is stored at the accumulator.

Example: ADI 16H

This instruction adds the 8-bit data at the operand and carry flag with the data present at the
accumulator. After each addition, the flag reflects the outcome of the addition.

Example: ACI 35H

In this instruction, the data at the register is added with the data present at the accumulator along
with the carry bit and outcome is reflected at the accumulator.

Example: ADC B
This instruction is used to add the data present at the memory location whose address is specified in
the operand given and the carry bit along with the data present in the accumulator. The result of the
addition is stored in the accumulator.

Example: AMC 45H

This instruction subtracts the data present at the register given at the operand from the data in the
accumulator, further the result is stored at the accumulator.

Example: SUB D

In this instruction, the data present at the memory location whose address is given by the H-L
register is subtracted from the data at the accumulator.

Example: SUB 256H

This instruction is used to immediately subtract the data given as operand in the instruction from the
data present at the accumulator. After each subtraction, the flag is modified so as to show the
outcome of subtraction.

Example: SUI 55H

This instruction subtracts the 8-bit data given as the operand and the borrow bit from the data
present at the accumulator, and resultantly store the output achieved in the accumulator.

Example: SBI 21H

By the use of this instruction, the data at the register and the borrow bit is subtracted from the data
at the accumulator.

Example: SBB B
This instruction specifies the subtraction of data present at the memory location, whose address is
present at the H-L register and the borrow bit from the data at the accumulator.

Example: SBB 1600H

This instruction increments the data by 1 which is present at the register given at the operand. The
result of which is stored at the same register.

Example: INX D

This instruction decrements the data present at the register by 1 and stores the result at the same
register.

Example: DCX D

Sometimes in an instruction, the operand holds a memory location. The address of this memory
location is present at the H-L pair. So, the data present at that particular location is decremented by
1.

Example: DCR 42H

It stands for decimal adjust accumulator. This instruction causes to break the 8-bit binary number
into two 4-bit binary coded decimal digits.

Logical Instruction
These instructions are used to perform logical or Boolean operations over the data present in either
register or memory. The logical instructions modify the flag bits according to the operation
performed.

The logical instruction set is as follows:

This instruction is used to compare the data at the accumulator with the data present at the register
or memory which is given as operand. According to the result obtained by the comparison, the flags
are set. While the data being compared remains unchanged.

Suppose,

If the data present at the accumulator is smaller than that of register or memory, then carry flag is
set.

If the data in the accumulator is equal to the data in the register or memory, then it sets the zero
flag.

However, if the data in the accumulator is greater than the data present in the memory or register,
then both carry and zero flags are reset.

This instruction is used to compare the 8-bit data given as operand in the instruction with the data
present in the accumulator. The comparison result is shown by the flags.

This instruction performs the AND operation of the data present in the accumulator to the data
present in the register or memory. After the AND operation, S, P, Z are changed to show the result of
the comparison. AC is set and CY is reset.

Example: ANA D

This instruction is used to perform AND operation of the immediate 8-bit data given as operand with
the data present in the accumulator.

Example: ANI 65H

This instruction executes OR operation, of the data in the accumulator with the data present in the
register or memory location.

Example: ORA B

Here, 8-bit data given as operand is logically ORed with the data in the accumulator. The outcome of
which is saved in the accumulator.
Example: ORI 26H

This instruction performs XOR operation with data at the accumulator and the data at the register or
memory. In this case, CY and AC are reset.

This instruction performs XOR operation of the 8-bit data given as operand and the data at the
accumulator. And stores the result at the accumulator.

This instruction holds significance when there exists a need to rotate the bits present in the
accumulator. Basically, for an 8-bit value, each bit is rotated or shifted left by one position. Also, the
rotation of last bit of the sequence i.e., D7, sets the CY flag.

This instruction rotates the bit to the right by one position. In this case, D0, sets the CY flag.

This instruction rotates the bits to the left by one of the data present in the accumulator through the
carry flag.

Here, D7 is shifted to carry the flag and the bit in the carry flag is shifted to D0.

This instruction is used to rotate the bits of the data present in the accumulator to the right through
the carry flag.

In this case, D0 is shifted to carry the flag and carry bit is shifted to D7 position.

This instruction sets the carry flag to 1, without affecting any other flags.
This instruction is used to generate the complement of data at the accumulator. The complement
function does not affect any of the flags.

This instruction complements the data present at the carry flag. Thus any other flag is not affected by
this instruction.

Branching Instruction
These instructions are used in order to switch or transfer the control of the microprocessor from one
position to another. More specifically we can say, it changes the general sequential flow.

The branching instruction set is given below:

This instruction is used to transfer the present program sequence to that memory location whose 16-
bit address is specified in operand of the instruction.

Example: JMP 2020H

This instruction comes under conditional branching instruction, in which the present program
sequence is transferred to that particular location whose address is provided at the operand. But this
transferring depends on the given PSX flag.

Example: JZ 1600H

This instruction moves the control of recent program sequence to the memory address given at the
operand. But before transferring, the PC gets decremented.

Example: CALL 3400H

This instruction causes unconditional return of the sub-routine to the actual program.

This instruction is used to transfer the sequence from the main program to the interrupt service
routine. Basically, the transfer is performed over one of the 8 bits which are specified in the operand

Control Instruction
As the name itself is suggesting that these instructions are used to control the operations of the
microprocessor. The control instructions are as follows:

It stands for no operation. Whenever the microprocessor fetches this instruction, then it is decoded
but not executed.

It is used to disable the interrupts generated in the microprocessor. Resetting of interrupt enable flip-
flop is performed. This leads to disabling of all the interrupts except TRAP.

This instruction is used to enable the interrupt. This time the interrupt enable pin is set which leads
to enabling of the interrupts in the system.

Whenever HLT is decoded by the microprocessor, then it halts any other program and continuously
executes the current program which is under operation. To get out of the halt state either an
interrupt or reset is required.

SIM stands for set interrupt mask. This instruction is used to implement the programming of
hardware interrupts 7.5, 6.5 and 5.5 and serial output.
RIM stands for read interrupt mask. This instruction is used to put the desired data at the
accumulator according to the interrupt and serial input.

This is all about the instruction set of 8085 Microprocessor.

Addressing Modes
Addressing modes are the techniques used by the CPU to identify where the data needed for an
operation is stored. They provide rules for interpreting or modifying the address field in an
instruction before accessing the operand.

Types of Addressing Modes

In 8085 Microprocessor there are 5 Types of Addressing Modes

Immediate Addressing Mode

In immediate addressing mode the source operand is always data. If the data is 8-bit, then the
instruction will be of 2 bytes, if the data is of 16-bit then the instruction will be of 3 bytes.

Examples
MVI B 45 (move the data 45H immediately to register B)
LXI H 3050 (load the H-L pair with the operand 3050H immediately)
JMP address (jump to the operand address immediately)

Register Addressing Mode

In Register Addressing Mode, the data to be operated is available inside the register(s) and register(s)
is(are) operands. Therefore the operation is performed within various registers of the
microprocessor.

Examples:
MOV A, B (move the contents of register B to register A)
ADD B (add contents of registers A and B and store the result in register A)
INR A (increment the contents of register A by one)

Direct Addressing Mode

In direct addressing mode, the data to be operated is available inside a memory location and that
memory location is directly specified as an operand. The operand is directly available in the
instruction itself.

Examples:
LDA 2050 (load the contents of memory location into accumulator A)
LHLD address (load contents of 16-bit memory location into H-L register pair)
IN 35 (read the data from port whose address is 35)

Register Indirect Addressing Mode

In register indirect addressing mode, the data to be operated is available inside a memory location
and that memory location is indirectly specified by a register pair.

Examples:
MOV A, M (move the contents of the memory location pointed by the H-L pair to the accumulator)
LDAX B (move contents of B-C register to the accumulator)
STAX B (store accumulator contents in memory pointed by register pair B-C)

Implied/Implicit Addressing Mode

In implied/implicit addressing mode the operand is hidden and the data to be operated is available in
the instruction itself.

Examples:
CMA (finds and stores the 1's complement of the contents of accumulator A in A)
RRC (rotate accumulator A right by one bit)
RLC (rotate accumulator A left by one bit)

Relative Addressing Mode

In this mode, the operand is a memory location specified by the contents of the program counter
plus a constant value.

Example:

MOV R0,#05H
AGAIN:
MVI A,#55H
ADD A,R0
JMP AGAIN

In this example, the instruction JMP AGAIN uses the Relative Addressing Mode. The instruction
jumps to the label AGAIN by adding the contents of the program counter with the specified constant
value. The constant value is calculated based on the distance between the current instruction and
the label AGAIN.

In this case, the instruction JMP AGAIN is executing a loop that loads the accumulator with the value
55H, adds the contents of the register R0 to the accumulator, and then jumps back to the label
AGAIN to repeat the loop.