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Question Bank - Key Answer

The document is a key answer guide for the Digital Logic Circuits course at K.L.N. College of Engineering. It includes various topics such as binary conversion, BCD addition, logic circuit design, and explanations of components like multiplexers and decoders. Additionally, it covers practical design problems and simplifications using K-maps and Hamming codes.

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0% found this document useful (0 votes)
2 views4 pages

Question Bank - Key Answer

The document is a key answer guide for the Digital Logic Circuits course at K.L.N. College of Engineering. It includes various topics such as binary conversion, BCD addition, logic circuit design, and explanations of components like multiplexers and decoders. Additionally, it covers practical design problems and simplifications using K-maps and Hamming codes.

Uploaded by

muruganucm
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

K.L.N.

COLLEGE OF ENGINEERING, POTTAPALAYAM - 630 612


(An Autonomous Institution, Affiliated to Anna University, Chennai)

Department of Electrical and Electronics Engineering


Third Semester
24EE301 – DIGITAL LOGIC CIRCUITS
(Regulations 2024)
CIT I Key Answer

2. Convert (0.3125)10 to binary

Multiplication Integer part


0.3125 × 2 = 0.625 0
0.625 × 2 = 1.25 1
0.25 × 2 = 0.5 0
0.5 × 2 = 1.0 1

Therefore, (0.3125)10=(0.0101)2

3. Convert the following hexadecimal numbers to decimal: (a) E516 (b) B2F816
(a) = (E × 16) + (5 × 1) = (14 × 16) + (5 × 1) = 224 + 5 =
(b) = (B × 4096) + (2 × 256) + (F × 16) + (8 × 1)
= (11 × 4096) + (2 × 256) + (15 × 16) + (8 × 1)
= 45,056 + 512 + 240 + 8 =
4. Add the BCD numbers: 01001000 + 00110100
5. Express in POS form F(A,B,C)= πM (0,1,2,4,5,6)

( )
6. What is one Bit Magnitude Comparator?

A 1-bit Magnitude Comparator is a combinational logic circuit used to compare two single-
bit binary numbers and determine their relative magnitude.

7. Design a half subtractor using gates

Input Output
A B Borrow Difference
0 0 0 0
0 1 1 1
1 0 0 1
1 1 0 0

The logical expression for borrow output is, ̅


The logical expression for difference output is, ̅ ̅
Logic diagram:

Half Subtractor

8. What is multiplexer?
A multiplexer is a combinational circuit that selects binary information from one of many
input lines and directs it to a single output line. Normally, there are 2n input lines and n
selection lines whose bit combinations determine which input is selected

9. What is decoder?
A decoder is a logic circuit that converts an ‘n’ bit binary input code into 2n output lines,
such that each output line will be activated for only one of the possible combinations of
inputs

10. Realize the half adder circuit using decoder.


Input Output
x y Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

[Link] as sum of minterms F = AB + AC + BC

F = ABC + ABC + ABC + ABC + ABC + ABC


F =  m (1,2,3,6,7)

[Link] are the limitations of K-map?


(i) Limited to six variable map
(ii) Useful for simplifying only Boolean expressions represented in standard form.

[Link] is prime Implicant?

A prime implicant is a product term obtained by combining the maximum possible number
of adjacent squares in the map.

[Link] is a full adder?


A full adder is a combinational circuit that performs the arithmetic sum of three bits. It has
three inputs and two outputs namely sum and carry
15. Design a combinational circuit that will allow input signal A to pass through the
output only when the control input B&C are different, otherwise the output is high.
Input Output
A B C Y
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
PART – B (2 × 15 = 30 marks)
Answer ALL Questions.

1. Encode the binary word 1011 into seven bit Hamming code with even parity
2. Simplify the Boolean function using K map and implement with two level NAND
gates
( )
3. Reduce the following Boolean expression to indicated number of literals.
i. ( ) ( ) to one literal
ii. ( ) ( ) to one literal
4. Simplify the Boolean function using K map and implement using only NOR gates
( ) ∑ ( )
5. Design a full subtractor and implement it using logic gates
6. Implement the following function using 4x1 multiplexer and external gates.
∑ ( )
7. Design a combinational circuit to convert BCD Number into seven segment digit and
implement it using logic gates.

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