8
8
GPU performance and power tuning is difficult, requiring extensive user expertise and time-consuming trial
and error. To accelerate design tuning, statistical design space exploration methods have been proposed.
This article presents Starchart, a novel design space partitioning tool that uses regression trees to approach
GPU tuning problems. Improving on prior work, Starchart offers more automation in identifying key design
trade-offs and models design subspaces with distinctly different behaviors. Starchart achieves good model
accuracy using very few random samples: less than 0.3% of a given design space; iterative sampling can
more quickly target subspaces of interest.
Categories and Subject Descriptors: C.1.2 [Processor Architectures]: Multiple Data Stream Architectures
(Multiprocessors)
General Terms: Design, Measurement, Performance
Additional Key Words and Phrases: Design space exploration, GPGPU, statistical modeling, decision tree
ACM Reference Format:
Wenhao Jia, Elba Garza, Kelly A. Shaw, and Margaret Martonosi. 2015. GPU performance and power tuning
using regression trees. ACM Trans. Architec. Code Optim. 12, 2, Article 13 (May 2015), 26 pages.
DOI: [Link]
13
1. INTRODUCTION
As a popular heterogeneous computing paradigm, CPU-GPU pairs offer high perfor-
mance and power efficiency for suitable workloads. However, careful performance and
power tuning is essential for fully utilizing GPU capabilities. This is because poor GPU
software and hardware design choices often have severe consequences. For example,
the performance of Section 2’s example kernel can differ by 100× depending on the
value of a single program parameter. Clearly, finding the “right” parameter settings
can be very beneficial; the key is to do this design space exploration efficiently.
Traditionally, a GPU software or hardware design space is explored manually, relying
on the intuition and experience of the people doing the exploration to navigate the space
[Datta et al. 2008; Li et al. 2009; Choi et al. 2010; Dotsenko et al. 2011; Torres and
Gonzales-Escribano 2011; NVIDIA 2011, 2014c]. However, such intuition is difficult
to establish in the GPU realm due to numerous challenges, such as complex memory
This work was supported in part by the National Science Foundation under grant no. CCF-0916971. We
also acknowledge financial and equipment donations from NVIDIA and AMD. This work was also supported
by C-FAR, one of six centers of STARnet, a Semiconductor Research Corporation program sponsored by
MARCO and DARPA.
Authors’ addresses: W. Jia, E. Garza, and M. Martonosi, Princeton University, Princeton, NJ; emails:
jiawenhao@[Link], {elba, mrm}@[Link]; K. A. Shaw, University of Richmond, Richmond, VA;
email: kshaw@[Link].
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DOI: [Link]
ACM Transactions on Architecture and Code Optimization, Vol. 12, No. 2, Article 13, Publication date: May 2015.
13:2 W. Jia et al.
hierarchies [NVIDIA 2009, 2012], runtime hardware settings (Section 8.3), and subtle
software–hardware interactions [Jia et al. 2012]. These challenges make GPU design
spaces especially unfamiliar and complex, making traditional, human intuition–based
tuning techniques likely to miss important parts of a given space.
In the past, automated tuning tools have been proposed to replace or complement
manual design space exploration. Among them, some linear regression–based ap-
proaches have been particularly simple and effective [Lee and Brooks 2006; Joseph
et al. 2006; Jia et al. 2012]. However, the use of linear regression means that these
methods can only evaluate parameter importance globally across the entire design
space rather than locally within particular subregions. This severely limits their ap-
plicability and accuracy for complex design spaces (Section 7.2).
This article proposes Starchart, a fully automated, regression tree–based design tun-
ing tool. Starchart uses a small set of design samples to recursively partition a given
design space at key inflection points of a design parameter values, capturing a pa-
rameter’s global performance and power impact as well as its local influence within
design subspaces. Due to its ability to model design subspaces, Starchart can model
highly complex, real-system software tuning spaces that prior linear regression–based
methods cannot model well. In addition, the subspace modeling ability lets Starchart
automate some important design tasks by representing them as decision trees; Sec-
tion 8 demonstrates how to use Starchart in various realistic design scenarios.
We evaluate Starchart using two sampling approaches. In Baseline Starchart, ran-
dom sampling is used to collect design samples. Only a small portion of a design space
(less than 0.3%) needs to be sampled to achieve median prediction errors of 4% to 8%,
resulting in a 300× or more tuning productivity improvement. In Iterative Starchart,
a more intelligent, iterative sampling approach is proposed and evaluated. It improves
accuracy within design space regions of interest by 21% relative to Baseline Starchart.
Overall, this work makes the following contributions:
(1) Starchart’s novel partitioning tree approach provides accurate performance or
power estimates for complex GPU design spaces, especially for real-system soft-
ware tuning spaces that have proven challenging to prior linear regression-based
methods.
(2) We present an iterative sampling approach that can automatically sample more
designs from design space regions that are of particular interest to the user. This
improves modeling accuracy and efficiency for these regions under a limited sam-
pling budget.
(3) We present case studies that offer useful GPU insights as well as demonstrate how
to use Starchart to automate design tasks.
(4) Although Starchart is evaluated using GPU software tuning problems in this arti-
cle, it is general enough to handle non-GPU and hardware tuning problems.1
In the rest of the article, Section 2 motivates the use of regression trees. Section 3
reviews prior work. Section 4 presents Baseline Starchart, and Section 5 presents
Iterative Starchart. Then, using Section 6’s methodology, Section 7 evaluates Baseline
and Iterative Starchart. Section 8 offers case studies. Section 9 concludes the article.
2. MOTIVATION: DESIGN SPACE PARTITIONING
To motivate our work, we present a walk-through example based on the swap kernel
in the kmeans program from the Rodinia benchmark suite, using data collected via
real-system measurements on the AMD platform described in Section 6.
Figure 1 shows the kernel code, with parameterizations added to allow possible
optimizations. (This code template approach is often used by autotuning tools.) The
Fig. 2. For the swap kernel in kmeans, ppb is an important performance lever for the original kernel. Higher
tpp improves performance while reducing ppb’s influence. consec also affects performance, but only for
smaller tpp values.
Fig. 3. Design space partitions represented as a tree efficiently summarize performance trends.
in these situations. Finally, Figure 2(b) also shows that although the consec parameter
does affect performance, this is primarily for small tpp values.
Clearly, even what seems to be a fairly simple three-parameter tuning space displays
considerable subtlety. Parallelism and memory striding parameters interact differently
in different parts of the tuning space. Our work proposes and evaluates automated sta-
tistical techniques to determine the relative importance of parameters both globally
across the entire design space and locally in particular subspaces. The ability to cap-
ture parameters’ local interactions makes Starchart more powerful and useful than
regression-based approaches.
Figure 3 illustrates a regression tree automatically generated by Starchart for this
kernel. Each tree branch divides the design space where a particular parameter value
has been shown to be an important determinant for program performance (or any
other metric). The topmost branch point indicates the most important parameter value.
Each subsequent level of the tree shows the next most important parameter decision,
contingent on the ones above it. Furthermore, each rectangle gives the number of
experimental sample points in that particular design space partition and their average
performance. Reading the automatically generated tree, a GPU application developer
or tuning tool can identify which parameters are most influential on a given metric and
can see when parameters may be important within a local subregion of the tuning space.
In contrast, existing approaches would not distinguish between the different consec
values when 1 < tpp ≤ 8, because tpp > 8 is the optimal global solution and consec is
irrelevant under that subspace. Furthermore, Starchart can easily capture and express
arbitrarily high levels of interactions (e.g., the three-way interaction between tpp, ppb,
and consec) simply by adding levels to the tree. Existing linear regression techniques
only consider either manually specified parameter interactions [Lee and Brooks 2006]
or just pairwise interactions [Jia et al. 2012].
3. RELATED WORK
Specialized GPU autotuning frameworks exist for specific algorithms [Datta et al.
2008; Li et al. 2009; Choi et al. 2010; Dotsenko et al. 2011]. However, they tend to focus
more on identifying and presenting key algorithmic choices than on automatically
pruning them. Considerable user experience or exhaustive experimentation is often
needed to search the resulting design spaces. In contrast, Starchart can automatically
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GPU Performance and Power Tuning Using Regression Trees 13:5
detect the important design parameters and their interactions among a large number
of unpruned parameters, easing the creation of a new autotuner. Meanwhile, Starchart
can also replace or aid the heuristic search algorithms used in several more general
autotuning frameworks [Fursin and Temam 2010; Ansel et al. 2014].
Various automation methods have been proposed to search and navigate software
tuning spaces, such as CPU kernel genetic tuning [Moilanen and Williams 2005], com-
piler optimization pruning [Triantafyllis et al. 2003], and optimal GPU code searching
[Bergstra et al. 2012; Ganapathi et al. 2009]. They differ from Starchart in several
aspects. First, in terms of problem specification, Starchart builds application-specific
performance and power models, whereas some existing work only assesses compiler op-
timizations common across all applications [Triantafyllis et al. 2003]. Second, in terms
of scope, Starchart is validated for multiple applications on two GPU platforms using
both performance and power as metrics, whereas some existing work is evaluated only
for one particular application [Bergstra et al. 2012; Ganapathi et al. 2009]. Finally, and
perhaps most importantly, prior machine learning–based work mostly aims to find the
globally optimal program configuration [Moilanen and Williams 2005; Bergstra et al.
2012; Ganapathi et al. 2009]. In contrast, because statistical models are generally more
transparent and easier to interpret than machine learning models, Starchart not only
finds the global optimum but also reveals local optima, parameter interactions, and
performance trends. In other words, Starchart offers more useful design information
to its users than conventional optimal design search algorithms can.
Due to the simplicity and effectiveness of statistical methods, linear regression has
become the core of several design space exploration tools [Lee and Brooks 2006; Joseph
et al. 2006; Jia et al. 2012]. However, the use of linear regression in these tools means
that they cannot distinguish a parameter’s effects in local regions of a design space.
This not only severely reduces their modeling accuracy for complex design spaces, as
shown in Section 7.2, but also prevents them from being used to handle many useful
subspace-based design problems, such as the Starchart case studies in Section 8. One
study [Magni et al. 2013] uses a similar regression tree approach as Starchart, but it
deals with a specific program optimization—thread coarsening—instead of proposing
a general tuning framework like Starchart does.
Other GPU performance models (e.g., those based on program analysis [Ryoo et al.
2008; Hong and Kim 2009; Sim et al. 2012]) and power models (e.g., those based on
performance counters [Nagasaka et al. 2010; Chen et al. 2011]) exist. The former
usually impose strong limits on the types of programs that can be analyzed and are
difficult to automate. The latter can be used as the power measurement component of
our framework when real-system power measurements are physically infeasible.
Formally, our algorithm builds a type of decision tree [Kutner et al. 2005], which
is studied extensively in statistics and machine learning fields. Some current studies
[Loh 2008] improve on the classic method we use. They can be easily applied to our
core algorithm to improve its accuracy, efficiency, or both.
4. STARCHART: AUTOMATED DESIGN SPACE PARTITIONING
This section describes the various steps in the Starchart workflow.
4.1. Design Sample Collection
Parameter selection. To use Starchart on an application, a set of parameters that define
the dimensions of the tuning space must first be identified. Parameters may relate
to software (e.g., blocking factor, thread count) or to hardware (e.g., active core count,
system clock rates). Parameters can either be binary in nature (e.g., whether to turn on
or off an optimization) or can take numeric values across a possible range. Parameters
can even be choices, such as including “NVIDIA vs. AMD” as a design option [Jia et al.
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13:6 W. Jia et al.
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GPU Performance and Power Tuning Using Regression Trees 13:7
ALGORITHM 1: Recursively partition a program design space. The metric here is perfor-
mance; power can be modeled similarly.
input: D: design space specified with n design parameters P1 , P2 , . . . , Pn
input: Vi : set of values that may be taken by each parameter Pi
input: Set S composed of m sampled designs in the space, s1 , s2 , . . . , sm, with their parameter values
known and resulting performance, r1 , r2 , . . . , rm, measured
1 List of pending partitions C = {S};
2 Partitioning history H = {};
3 repeat
4 foreach partition c in C do
5 r̄ = the average performance of all points s j in c;
6 r̄ is used as the modeled performance of all points in c;
7 r j is the performance of s j ;
8 sum of squared errors SSE0 = j (r j − r̄)2 ;
9 forall the parameter Pk do
10 forall the possible parameter value vl in Vk do
11 split c into two partitions c1 and c2 ;
12 c1 has the samples from c with Pk ≤ vl ;
13 c2 has the samples from c with Pk > vl ;
14 r¯1 = the average performance of points in c1 ;
15 r¯2 = the average performance of points in c2 ;
16 SSE1 = j (r j − r¯1 )2 for s j ∈ c1 ;
17 SSE2 = j (r j − r¯2 )2 for s j ∈ c2 ;
18 SSE12 = SSE1 + SSE2 ;
19 end
20 end
21 remove c from C;
22 find the smallest SSE12 across all (Pk, vl ) pairs;
23 SSEmin = this smallest SSE12 ;
24 (Pmin, vmin) = the param-value pair that produces SSEmin;
25 SSE0 − SSEmin is the reduction in error;
26 if SSE0 − SSEmin > threshold then
27 split c into two partitions cl and ch;
28 cl has the samples from c with Pmin ≤ vmin;
29 ch has the samples from c with Pmin > vmin;
30 add cl and ch to C;
31 add ((Pmin, vmin), (c, cl , ch)) to H as part of the final tree;
32 end
33 end
34 until C is empty;
output: Partitioning history stored in H represented as a tree
set’s SSE is larger than the sum of the SSEs of the subsets, we can conclude that this
parameter value is a good distinguisher of performance.
As shown in Algorithm 1, Starchart tentatively divides the initial sample space
into two groups for every possible parameter value setting. For each chosen parameter
setting, it calculates the average value and sum of the SSEs for each of the two tentative
sample subsets created (lines 9 through 20). It then sorts all of the different sample
splitting choices by the sum of SSEs of their respective subsets. The parameter setting
that results in the smallest sum of the SSEs divides the initial sample into the most
distinct and internally similar subsets. In other words, the choice of this parameter
setting creates the greatest distinction in performance and therefore has the highest
impact on performance. Starchart thus splits the initial set based on this parameter
setting as long as the reduction in error is greater than some threshold value (lines 21
through 32).
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13:8 W. Jia et al.
After the split of the initial set into two distinct subsets, each of the two sets may still
have samples that vary greatly internally. Consequently, Starchart recursively applies
its algorithm to each of the two subsets, which results in a total of four subsets. Further
precision can be gained by continuing to apply Starchart to these four subsets and so
on until the appropriate level of error is reached (lines 3 through 34).
Starchart’s end product is a tree where nodes are design space partitions, and the
edges out of them specify the value ranges for a particular parameter in each of the two
subtrees. These trees have two key characteristics. First, parameter splits highest in
the tree have the highest overall influence on performance. This is because Starchart
greedily orders splits based on parameter values that reduce SSE the most. Second, for
each partitioned subspace, independent choices can be made regarding subsequent fur-
ther partitions. This is key; it means that we can find parameters of crucial importance
within a particular subregion, even if they are only of modest global importance across
the full design space. The ability to find key parameters within a subregion is central
to the technique’s efficacy and differentiates it from prior work that only recognizes
globally important parameters [Lee and Brooks 2006; Jia et al. 2012].
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GPU Performance and Power Tuning Using Regression Trees 13:9
Fig. 4. For swap in kmeans, the part of the design space with higher tpp values (× symbols) contains designs
with lower runtimes and thus deserves more samples.
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13:10 W. Jia et al.
“budget” of sample points to the regions of the design space that are far from optimal.
Since gathering runtime data for each sampled point is the most time-consuming part
of Starchart, this allows the tool to focus its time on the most interesting parts of the
design space.
Rather than using a single level of UAR sampling to collect samples for the regression
analysis, Iterative Starchart performs a preliminary phase that identifies a “region of
interest.” Then, additional design samples from that region are collected. We then per-
form regression analysis and create the Starchart tree with the additional points along
with points initially sampled UAR (to maintain good global performance prediction for
the entire space). Algorithm 2 shows the workflow of Iterative Starchart. Note that in
Algorithm 2, the iterative sampling technique (lines 1 through 4) selects the points to
be used as the input S to Algorithm 1 on line 5.
ALGORITHM 2: Create a refined Starchart training set using an iterative sampling method.
input: D, a design space specified with n design parameters P1 , P2 , . . . , Pn
input: Vi , the set of values that parameter Pi may take
input: I, the number of points to sample in the first round to form the initial sample set SI
input: t, the percentage of best-performing points taken from SI to form a bounding box
input: A, the number of points to sample in the second round to form the additional sample
set SA
1 Sample I designs from D UAR and label the set SI ;
2 Sort designs in SI by decreasing performance and take the top t% of these designs to form
set St (St ⊆ SI );
3 Create a bounding box, B, by tracking the upper and lower limits of values seen for each
parameter, Pi , across all samples in St ;
4 Sample additional A designs from D such that these designs fall within B and form a set SA;
5 Run Algorithm 1 with SI ∪ SA as its input sample set S.
output: a Starchart tree that emphasizes the region of interest while having acceptable
overall accuracy
Algorithm 2 starts with I designs sampled UAR, forming a set SI . The algorithm
then sorts these points by the metric of interest (e.g., runtime) and selects the top t%
of these points to form a set St . This cutoff value t can be made more or less selective
depending on the degree of emphasis that we seek. The algorithm defines a specific
region of interest by analyzing these top t% designs. In particular, it identifies the
minimum and maximum values seen for each parameter, Pi , across all designs in St .
These upper and lower limits of all n parameters form an enclosed n-dimensional area
(i.e., a bounding box B) around points in St . B contains samples that perform well under
our chosen metric of interest, and we proceed to sample A additional points from D that
fall within B and form a sample set SA. SA reflects our guided sampling emphasis on a
region of interest, whereas SI ensures our global sample coverage. Finally, the union
of SI and SA are fed into Algorithm 1 as its input sample set S to train an Iterative
Starchart tree.
6. METHODOLOGY
The methodology described in this section is used for all results in Section 7.
Benchmarks studied. As shown in Table I, we use six GPU kernels from the Rodinia
suite [Che et al. 2009] and NVIDIA GPU SDK [NVIDIA 2014a]. The kernels exhibit
diverse behavior and use various GPU functional units. For each kernel, relevant
design parameters are substituted by C macros so that our design sampler can easily
modify them and generate appropriate code. Some of these parameters already exist in
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GPU Performance and Power Tuning Using Regression Trees 13:11
Table I. Configurable GPU Kernel Software Parameters Common on Both NVIDIA and AMD Platforms
Kernel Parameter Value Category Comment
block 32–1024 Thread block size Num of threads in each thread block
npt 1–64 Work allocation Num of nodes processed by each thread
bfs consec 0/1 Coalescing Each thread processes consecutive nodes?
pa-attrib 0/1 Data layout Store node attributes in parallel arrays?
pa-status 0/1 Data layout Store node status flags in parallel arrays?
x 1–1024 Thread block size X dimension size of each thread block
y 1–1024 Thread block size Y dimension size of each thread block
hotspot t-temp 0/1 Data layout Transpose temperature array in shared mem?
t-power 0/1 Data layout Transpose power array in shared mem?
t-buffer 0/1 Data layout Transpose buffer array in shared mem?
ppb 32–1024 Thread block size Num of points processed by each thread block
kmeans tpp 1–32 Work allocation Num of threads cooperating on each point
consec 0/1 Coalescing Neighbor threads process consecutive features?
x 1–1024 Thread block size X dimension size of each thread block
y 1–1024 Thread block size Y dimension size of each thread block
tiling 1–1024 Work allocation Num of elements processed by one thread
matrix unroll 1–16 Compiler option Degree of unrolling of innermost loop
t-a 0/1 Data layout Transpose A array in shared mem?
t-b 0/1 Data layout Transpose B array in shared mem?
use-smem 0/1 Shared memory Buffer matrix tiles in shared mem?
x 1–1024 Thread block size X dimension size of each thread block
y 1–1024 Thread block size Y dimension size of each thread block
nbody
unroll 1–8 Compiler option Degree of unrolling of innermost loop
n 1024–32768 Input size Num of bodies in the input data
block 32–1024 Thread block size Num of threads in each thread block
ppt 1–16 Work allocation Num of points processed by each thread
stream-cluster
pa-point 0/1 Data layout Store point structures in parallel arrays?
use-smem 0/1 Shared memory Buffer point structures in shared mem?
Note: The listed value ranges are the union of both platforms.
Table II. Hardware Parameters and Values Available Only on the NVIDIA Platform
Parameter Value Comment
nreg 4–32 The maximum number of registers each thread can use before register spilling
use-l1 0/1 Whether to enable L1 caches
large-l1 0/1 Whether to use 48KB L1 caches and 16KB shared memory (vs. 16KB L1 caches
and 48KB shared memory)
the kernels; others are our own addition to explore further optimizations. The size (i.e.,
the total number of possible program designs) of each design space and the measured
runtime distributions of sampled designs are shown later in Table III. (When a UAR-
sampled configuration cannot be run on a particular platform, it is not counted in the
sample set.) Every kernel is run on two platforms. The NVIDIA platform runs CUDA
versions of the programs, and the AMD platform runs OpenCL versions, but they
differ only syntactically. Because NVIDIA and AMD platforms have various differences
(thread block size limit, shared memory size, etc.), the parameter values listed in
Table I are the union of all possible values on both platforms. For example, in actual
experiments, the block parameter of bfs starts at 32 on the NVIDIA platform and 64
on the AMD platform, but Table I lists the start value as 32 for simplicity. For every
benchmark, either block or x×y indicates the total number of threads per thread block.
Finally, three parameters are available only for NVIDIA, listed in Table II.
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13:12 W. Jia et al.
Table III. Design Space Sizes and the Runtime Distributions of Designs Sampled
from these Spaces (in Milliseconds)
Benchmark Design Space Size Min 1st Qt. Mean 3rd Qt. Max
bfs-amd 131K 0.51 0.59 0.89 1.22 1.54
bfs-nvidia 1.84M 1.08 1.25 1.90 2.50 4.00
hotspot-amd 524K 0.31 1.71 1.74 1.81 1.94
hotspot-nvidia 67.1M 0.28 0.35 0.55 0.60 3.95
kmeans-amd 61.4K 0.046 0.12 1.99 2.69 6.31
kmeans-nvidia 1.05M 3.08 3.87 8.07 11.14 26.28
matrix-amd 75.5M 3.28 7.09 22.37 27.42 108.20
matrix-nvidia 47.2B 11.15 37.47 13.28 15.15 5756.00
nbody-amd 3.15M 0.03 0.26 6.62 4.91 204.50
nbody-nvidia 1.61B 0.06 0.61 28.51 24.41 634.00
streamcluster-amd 65.5K 0.38 0.56 1.20 1.66 3.03
streamcluster-nvidia 2.10M 0.90 1.63 4.42 6.44 24.05
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GPU Performance and Power Tuning Using Regression Trees 13:13
Fig. 5. Prediction accuracy versus training set size. Users can adaptively compare against the validation
set to decide the number of training samples to collect.
tree and follow the branches based on how the parameter settings of the given design
compare to the division values. When a leaf node is reached, the average power or
performance of sampled designs in that partition is used to predict the queried design.
In statistics, validation samples are often used to decide how many sample points
are needed to build regression trees. In this method, users or tools initially select some
number of UAR samples from the design space to be considered as the validation set.
These are used to test tree accuracy and are never used in the tree-forming process. (We
use 200 validation samples in our results.) Then, a small number of separately UAR-
sampled designs are used to form an initial tree. (We use 20 samples as our starting
point.) After forming a regression tree with these samples, one can use the validation
points to test the performance prediction accuracy of the tree. If the prediction accuracy
is sufficient, the process stops. Otherwise, additional UAR samples are collected, and
the regression tree is adjusted to include them. Validation against the reserved samples
is repeated. When the prediction accuracy reaches a predetermined level, it means
that the training samples provide good coverage of the entire space, and users can stop
collecting more samples.
Figure 5 shows the median relative prediction accuracy of trees built using an in-
creasing number of training samples. Except matrix and nbody, which have the largest
design spaces, most benchmarks achieve good prediction accuracy with 200 samples:
4% error for power and 8% error for performance. To achieve a target 15% prediction
error, matrix on the NVIDIA platform needs 3,200 samples, and nbody on the AMD
platform needs 400 samples. (Even 3,200 and 400 samples are still much less than
0.1% of the size of matrix’s and nbody’s design spaces.) Among all scenarios, kmeans on
the AMD platform requires the most samples relative to its design space size: 0.3%.
Unless otherwise stated, in the rest of the article, all trees are built using these sample
sizes: 3,200 for NVIDIA-matrix’s performance, 400 for AMD-nbody’s performance, and
200 for all others. Finally, this method is highly adaptable to particular usage needs.
When only the top levels of the trees are used to interpret the most salient design
criteria for a space, fewer training and validation samples are needed.
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13:14 W. Jia et al.
Fig. 6. Baseline Starchart models performance better than Stargazer for most kernels.
Previous statistical techniques [Lee and Brooks 2006; Joseph et al. 2006; Jia et al.
2012], including Stargazer, have only been applied to simulations, where the results are
highly repeatable. In contrast, both Starchart variants handle the variability of real-
system measurements. As a result, when we compare Starchart to Stargazer in terms of
performance modeling accuracy in Figure 6, the former clearly outperforms the latter.
In particular, Stargazer cannot model matrix’s and nbody’s performance with acceptable
accuracy, resulting in high median prediction errors. One exception is streamcluster
on AMD, whose design space is simple enough to be modeled by both Stargazer and
Starchart, and the former actually slightly outperforms the latter. Overall, Starchart
achieves a 9.2% median prediction error averaged over all benchmarks, which is much
lower than Stargazer’s 21.2% error.
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GPU Performance and Power Tuning Using Regression Trees 13:15
error is an NP-complete problem [Hyafil and Rivest 1976]. In practice, a greedily in-
duced tree like Starchart is reasonably good, giving classification or regression results
that are very close to those of the optimal tree [Murthy and Salzberg 1995]. To prove
this, using the validation methodology in Section 7.1, Figure 7 compares three algo-
rithms: Starchart, the rpart routine in R [R Core Team 2013] based on the CART
method [Breiman et al. 1984], and evtree, a state-of-the-art evolutionary algorithm.
Starchart achieves a very similar prediction accuracy as rpart, even though the
latter uses a slightly more sophisticated ANOVA [Freedman et al. 2007] split condition
than Starchart’s simple SSE comparison method. Compared to rpart, Starchart has
a simpler algorithm and less code, but the simplicity does not diminish its accuracy
and applicability for GPU tuning problems. The evtree algorithm actually gives worse
results than Starchart and rpart, likely for two reasons. First, because of the time
and space complexity of evolutionary algorithms, evtree must cap its tree heights
and evolutionary iteration counts to fairly low values. This significantly limits the
scale of the problems that evtree can handle, as well as the final tree’s accuracy.
Second, a globally optimal tree trained from sampled designs is not necessarily better
at predicting unsampled designs—that is, an optimal tree search algorithm may overfit
observed data.
Finally, while we want to compare the “best” parameter configurations found by
Starchart with those found by exhaustive search, in practice this is difficult due to
the extremely large design spaces that we explore (see Table III). However, for any
benchmark, a Starchart tree—even if not globally optimal—can at least identify the
partition that contains the “best” design in the sample set. This partition is likely
to also contain the “best” design in the whole space and is often small enough to be
exhaustively searched.
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13:16 W. Jia et al.
Fig. 8. Iterative Starchart’s prediction accuracy generally improves as more total training samples are used.
In Figure 8(b), only the dashed line uses the right y-axis. Subtract I (800 for dashed line and 60 for others)
from Figure 8(b)’s plotted values to get A.
that n × |V | = |V1 | + |V2 | + · · · + |Vn| is much less than the design space size |V1 | ×
|V2 | × · · · × |Vn|.) Meanwhile, the loop on line 4 iterates as many times as the number of
partitions in the final tree, bounded by the total number of design samples (i.e., O(m))—
the worst case happens when the final tree is fully grown and every leaf partition
contains exactly one sample. Finally, lines 11 through 18 take a variable amount of
time to execute depending on the number of samples in a particular partition, also
bounded by m. Combining all preceding analyses gives a worst-case time complexity
of O(m2 n|V |) for the whole algorithm. In other words, the algorithm’s complexity is
quadratic in the number of samples and linear in the number of parameters and their
choices, ensuring good scalability as the design space grows in size.
Starchart can account for interactions among as many parameters as the tree height
(easily 6 or more for 40 to 50 final partitions). In contrast, a linear regression approach
like Stargazer will have exponential growth in complexity when it starts exploring
higher-order interactions. In those algorithms, every additional level of interactions
(e.g., from two way to three way) extends the algorithm time cost by n (the number
of parameters). The multiplicative growth in time complexity is one reason linear
regression approaches are often limited to accounting for only pairwise interactions.
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GPU Performance and Power Tuning Using Regression Trees 13:17
Fig. 9. Iterative Starchart has lower within-bounding box prediction error than Baseline Starchart for all
applications. However, due to areas outside bounding boxes, overall error increases slightly.
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13:18 W. Jia et al.
Fig. 10. Our technique eases the process of Fig. 11. The performance tree of bfs on AMD reveals that
selecting good values for the five parame- performance does not have strong dependence on block.
ters in the bfs kernel.
from potential optimization. For bfs, a breadth-first search graph algorithm, this case
study shows how our approach differs substantially from prior work in its ability to
reveal important and local parameter interactions to efficiently and accurately optimize
parameter settings and prune uninteresting portions of the space.
As Table I shows, bfs on the AMD platform has five tunable parameters. Figure 10
shows the main kernel.2 block is the number of threads per block, and npt controls
the number of nodes processed by each thread. consec decides whether a single thread
processes nodes consecutively versus at even strides. The remaining parameters, pa-
attrib and pa-status, control data layout—that is, whether attributes of a node are
closely packed or spread out over different arrays. bfs is a memory-bound application
because it generates many scattered global memory requests to access node attributes
and status flags, easily saturating memory bandwidth. Given the possible settings
of these five parameters, 98,816 design points are possible. Using only 200 random
samples, Starchart is able to gain an accurate picture of localized performance trends
in different design subspaces. Figure 11 shows the resulting regression tree.
Without our method, programmers might have hunches or intuitions about how
parameters will behave, but these can be quite inaccurate. For example:
—Hunch 1: block should be the most important parameter. Increasing threads per
block usually helps to hide memory latency for memory-bound kernels like bfs.
—Reality: Figure 11 shows that block is actually almost never important anywhere
in the design space. This is because for bfs, only 64 threads are enough to saturate
memory bandwidth. Figure 12(a) shows this by plotting performance versus block
for all gathered samples. Clearly, there is no strong relationship between these two.
—Hunch 2: npt should not affect performance. High npt may increase data reuse, but
bfs’s large memory footprint is unlikely to benefit from the small GPU caches.
—Reality: Actually, the regression tree illustrates that npt has significant impact on
performance, especially when consec = 1. To further confirm this, Figure 12(b) shows
2 For simplicity, nodes in the code have only one outgoing edge. Another smaller kernel—not shown or
tuned—does cleanup for this kernel.
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GPU Performance and Power Tuning Using Regression Trees 13:19
Fig. 12. Performance indeed depends on npt, and consec and pa-status further partition points into fairly
separate groups.
performance versus varying npt, proving that caches are still helpful for small npt
values.
—Hunch 3: The three memory locality parameters (consec, pa-attrib, and pa-status)
are similar optimizations and should be equally important or equally unimportant.
—Reality: Contrary to the third hunch, the three parameters related to memory locality
are not of equal importance. In particular, Figure 11’s regression tree shows consec
as fairly important and pa-status as conditionally important based on the value of
consec. The third locality parameter, pa-attrib, is not important enough to appear.
Figure 12(b) gives the data behind these trends. The consec parameter is clearly im-
portant because the two clusters that correspond to consec = 0 are mostly separated
from those where consec = 1. Likewise, the group where pa-status = 1 is distinct
from the group where pa-status = 0 for consec = 1. Careful code analysis shows
accesses to node status arrays are more scattered than accesses to node attributes,
hence the difference in parameter importance.
This example demonstrates how Starchart builds designer intuition about the overall
design space, as well as about relative parameter importance. Prior work has used
regression or clustering techniques to group points with similar performance results
using hardware performance counter values [Nagasaka et al. 2010] rather than us-
ing input parameters or hardware configurations. Thus, prior clustering techniques
might tie low cache miss counter values to high performance but could not directly
guide designers toward the hardware or software design decisions to achieve this. In
contrast, our approach’s output is tied directly to controllable parameters. The tree par-
titions that we identify can lead directly to software optimizations or hardware design
decisions.
8.2. Cross-Platform Program Optimization
GPU developers frequently need to optimize their applications for more than one plat-
form, but each platform’s distinct power and performance characteristics influence the
best configuration choices and how well the best settings can do. Developers may need
to (1) optimize the power or performance of an application on each of many different
platforms, (2) select which platform to run an application on according to some power
or performance criteria, or (3) optimize the power or performance of an application
simultaneously for several platforms. Starchart supports all three of these.
We collect 200 samples for each application on two distinct GPU platforms: NVIDIA’s
Tesla C2070 and AMD’s Radeon HD 7970. Each sample is tagged with a binary
parameter, nvidia, which takes 1 for NVIDIA runs and 0 otherwise. Our tool
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13:20 W. Jia et al.
Fig. 13. The cross-platform tree of hotspot identifies particularly good designs for AMD and NVIDIA,
respectively.
then analyzes all of these samples simultaneously, producing the regression tree in
Figure 13.
In Figure 13, the highest-performing design subspaces for each platform are shaded
in gray. Most notably, our partitioning approach helps a developer see that they are
nonoverlapping and arise from very different parameter choices on each platform. The
best subspace occurs on AMD when blocking factor values are x ≤ 15 and y ≤ 5.
On NVIDIA, the best options are x > 7 and y > 5. The reason the subspaces do not
overlap is because these platforms contain different amounts of thread resources. The
best configurations of hotspot for AMD and NVIDIA are 6.3× and 1.3× faster, respec-
tively, than the default parameter configuration provided with the Rodinia distribution,
which uses parameter values x and y that are suboptimal for both platforms. Thus, an
autotuner developer seeking to identify the best platform-specific settings could use
Starchart to quickly guide design choices for the hardware encountered.
Cross-platform analysis becomes even more complex when trade-offs vary depending
on other parameter choices. For example, Figure 13 indicates that the best NVIDIA
subspace is 1.98× faster than the best AMD subspace, but the worst NVIDIA subspace
is 1.85× slower than the best AMD subspace. The kmeans design space (not shown due
to space limits) exhibits a similar issue. The best subspace on the AMD platform is
8.42× faster than the best NVIDIA subspace, but the worst AMD subspace is 1.29×
slower than the best NVIDIA subspace. Starchart helps developers consider a platform
choice in concert with the the application’s entire parameterized design space.
Finally, developers may want to optimize applications for multiple platforms simul-
taneously. Our partitioning tool enables developers to recognize which software param-
eters are so important that they impact power or performance on multiple platforms.
For example, the kmeans regression tree (not shown) indicates that the most important
parameter for performance optimization is tpp. The subspace where tpp > 1 is 3.93×
faster than the subspace where tpp = 1, regardless of platform. For developers trying
to create a generically optimized application, our tool helps to identify parameters that
impact power or performance on multiple platforms.
In summary, this case study has shown how Starchart’s regression trees give de-
velopers the insight needed to optimize an application in a platform-dependent or
-independent manner or to choose the best possible platform for a given application.
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GPU Performance and Power Tuning Using Regression Trees 13:21
Fig. 14. The bfs performance tree on the NVIDIA platform shows that turning on caches has adverse effects
on runtime.
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13:22 W. Jia et al.
Fig. 15. The bfs performance tree on the AMD platform shows its input sensitivity.
hardware parameters in the design space. Partition trees can help to visualize these
issues.
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GPU Performance and Power Tuning Using Regression Trees 13:23
subspaces helps to identify optimizations that are conditionally important for certain
input sizes/characteristics.
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13:24 W. Jia et al.
(tpp ≤ 8) and the use of caches (use-l1 = 1). Likewise, kmeans’s performance tree
(Figure 16(b)) shows that the design subspace with tpp > 1 can generally meet the per-
formance goal due to increased interthread parallelism. By intersecting these two sets
and plotting them using different symbols (triangles and circles in Figure 16(c)), we see
that these designs occupy most of the targeted power/performance region. Deeper par-
titioning can better sharpen adherence to certain power or performance constraints.
Additionally, per-partition power or performance summary values can be based on
the “worst” value for samples in the region (e.g., max power/runtime) instead of the
average.
Sometimes the power or performance goals of a system change dynamically at run-
time due to events such as low battery state and reduced power budget. In these situa-
tions, our method can help to adaptively determine the necessary program state tran-
sitions. For example, assume that the program runtime target becomes more stringent
from 10ms to 5ms, without changing the power budget. Users can look at Figure 16(b)
and decide that tpp must be increased to greater than 3. Because the performance
target is being tightened rather than relaxed, users just need to go deeper into the tree
instead of backtracking. Figure 16(c) shows that designs with tpp > 3 (circles) are very
likely to achieve the new power/performance goal. Compared to a high-performance
high-power design, designs within this region can save up to 47W (or 26% of total
power) with less than 10% performance slowdown.
Finally, we describe some interesting power-tuning observations encountered in our
experiments. For some benchmarks, such as bfs, kmeans, and matrix, program design
choices significantly influence power usage. In particular, global memory traffic is very
power consuming. For example, for matrix, buffering content in shared memory saves
considerable power versus always fetching content from global memory; for bfs, the
effective use of L1 caches can lower power usage regardless of whether runtime is
improved. Additionally, the same program over the same range of optimizations has
more power variation on the AMD platform than on the NVIDIA platform, presumably
because the AMD platform is newer and can better power gate various system compo-
nents. All power trends described earlier are easy to spot in the power trees generated
by Starchart. As performance-per-watt becomes an increasingly important metric, a
power-aware tuning tool like Starchart can be useful to many users.
9. CONCLUSION
This article presents a novel partition-based approach for viewing GPU application tun-
ing spaces and an automated algorithm for generating such partitions. The partition-
based view is proven to be effective at visualizing and representing a GPU program’s
complex tuning process and can be utilized to tackle many practical application tuning
tasks in a holistic fashion. Experiments show that on two different platforms, for six
diverse GPU kernels, and with two different metrics, our method uses samples less
than 0.3% of the entire tuning space to build accurate and compact trees representing
the inherent hierarchical structure of these spaces. An optional iterative approach can
further increase accuracy for areas of interest through guided design sampling. Fi-
nally, detailed case studies are presented to show how this algorithm can help to solve
application tuning problems such as pruning program design parameters, optimizing
program performance across platforms, automating cache configuration, characterizing
program input sensitivity, and doing power-aware performance optimization.
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