AMCAT Computer Science Preparation

Response 1: Operating System + Computer Architecture

Part 1: Operating System Basics + Process Management MCQs
(AMCAT Level: Basic → Moderate → Advanced)

1. Basics of Operating System

Q1. An Operating System acts as an interface between:
A) User and Hardware
B) Hardware and Compiler
C) Application and Compiler
D) CPU and RAM
Answer: A) User and Hardware

Q2. The main purpose of an Operating System is:

A) To provide internet access
B) To manage hardware and software resources
C) To create applications
D) To increase programming speed
Answer: B) To manage hardware and software resources

Q3. Which of the following is NOT a function of Operating System?

A) Memory Management
B) Process Management
C) Database Management
D) File Management
Answer: C) Database Management

Q4. The core component of an Operating System is:

A) Shell
B) Kernel
C) Compiler
D) Loader
Answer: B) Kernel

Q5. Which mode allows execution of privileged instructions?

A) User Mode
B) Kernel Mode
C) Safe Mode
D) Normal Mode
Answer: B) Kernel Mode

Q6. System calls provide an interface between:

A) Hardware and RAM
B) User programs and OS
C) Compiler and CPU
D) Applications and Database
Answer: B) User programs and OS

Q7. Which of the following is NOT an Operating System?

A) Linux
B) Windows
C) Oracle
D) macOS
Answer: C) Oracle

2. Types of Operating Systems

Q8. A system where multiple programs execute apparently at the same time is called:
A) Batch System
B) Multiprogramming System
C) Real-time System
D) Distributed System
Answer: B) Multiprogramming System

Q9. In a Batch Operating System:

A) Users interact directly with programs
B) Jobs are executed in groups without user interaction
C) Only one program exists
D) Internet is required
Answer: B) Jobs are executed in groups without user interaction

Q10. Time-sharing Operating System is based on:

A) Multiprocessing
B) Multithreading
C) CPU time slicing
D) Batch processing
Answer: C) CPU time slicing

Q11. Which OS is used where response time must be extremely fast?

A) Batch OS
B) Real-Time OS
C) Distributed OS
D) Network OS
Answer: B) Real-Time OS

Q12. Android Operating System is based on:

A) Windows Kernel
B) Linux Kernel
C) Unix Kernel
D) DOS Kernel
Answer: B) Linux Kernel

3. Process Management

Q13. A program in execution is called:

A) Thread
B) Process
C) Procedure
D) Function
Answer: B) Process

Q14. Process Control Block (PCB) contains:

A) Process information
B) User password
C) Source code
D) Compiler details
Answer: A) Process information

Q15. Which information is stored in PCB?

A) Process ID
B) CPU registers
C) Program counter
D) All of the above
Answer: D) All of the above

Q16. The state of a process can be:

A) New
B) Ready
C) Running
D) All of the above
Answer: D) All of the above

Q17. When a process is waiting for CPU allocation, it is in:

A) Running state
B) Ready state
C) Blocked state
D) Terminated state
Answer: B) Ready state

Q18. When a process waits for an I/O operation, it is in:

A) Ready state
B) Running state
C) Waiting/Blocked state
D) New state
Answer: C) Waiting/Blocked state

Q19. The process scheduler selects a process from:

A) Running queue
B) Ready queue
C) Waiting queue
D) PCB queue
Answer: B) Ready queue

Q20. Context switching means:

A) Changing OS
B) Switching between processes
C) Changing memory size
D) Restarting CPU
Answer: B) Switching between processes

4. Process Scheduling

Q21. Which scheduling algorithm is non-preemptive?

A) Round Robin
B) FCFS
C) Priority (sometimes)
D) Both B and C
Answer: D) Both B and C

Q22. FCFS scheduling follows:

A) Last come first serve
B) First come first serve
C) Highest priority first
D) Shortest job first
Answer: B) First come first serve

Q23. The disadvantage of FCFS is:

A) Starvation
B) Convoy Effect
C) Deadlock
D) Thrashing
Answer: B) Convoy Effect

Q24. Round Robin scheduling uses:

A) Priority value
B) Time Quantum
C) Memory partition
D) Semaphore
Answer: B) Time Quantum

Q25. If time quantum is very large, Round Robin behaves like:

A) SJF
B) FCFS
C) Priority Scheduling
D) Multilevel Queue
Answer: B) FCFS

Q26. Which scheduling algorithm gives minimum average waiting time?

A) FCFS
B) SJF
C) Round Robin
D) Priority
Answer: B) SJF

Q27. Starvation can occur in:

A) FCFS
B) Round Robin
C) Priority Scheduling
D) FIFO
Answer: C) Priority Scheduling

Q28. Aging technique is used to solve:

A) Deadlock
B) Starvation
C) Thrashing
D) Fragmentation
Answer: B) Starvation

Q29. Preemptive scheduling allows:

A) Process interruption
B) No interruption
C) No context switching
D) No scheduling
Answer: A) Process interruption

Q30. Dispatcher is responsible for:

A) Memory allocation
B) Giving CPU control to selected process
C) File management
D) Deadlock prevention
Answer: B) Giving CPU control to selected process

One-Line Revision Sheet (Remember These)

Concept AMCAT Key Point
Kernel Core of OS
System Call Interface between user program and OS
PCB Stores process information
Process Program in execution
Ready State Waiting for CPU
Blocked State Waiting for I/O
Context Switch Switching CPU between processes
FCFS First come first serve
SJF Minimum average waiting time
Round Robin Uses Time Quantum
Priority Scheduling Can cause starvation
Aging Removes starvation
Dispatcher Transfers CPU control

AMCAT Computer Science Preparation

Response 1: Operating System + Computer Architecture
Part 2: Memory Management + Deadlock + Synchronization MCQs

5. Memory Management

Q31. The primary function of memory management is:

A) Process creation
B) Managing main memory
C) File creation
D) CPU scheduling
Answer: B) Managing main memory

Q32. Which memory is directly accessed by CPU?

A) Secondary Memory
B) Cache Memory
C) Main Memory
D) Hard Disk
Answer: C) Main Memory

Q33. The process of moving processes between RAM and disk is called:
A) Paging
B) Swapping
C) Scheduling
D) Fragmentation
Answer: B) Swapping

Q34. Virtual memory allows:

A) Increasing CPU speed
B) Execution of programs larger than physical memory
C) Removing secondary storage
D) Eliminating RAM
Answer: B) Execution of programs larger than physical memory

Q35. Virtual memory is implemented using:

A) Cache
B) Registers
C) Secondary storage
D) CPU
Answer: C) Secondary storage

Q36. Paging divides memory into:

A) Variable-sized blocks
B) Fixed-sized blocks
C) Logical files
D) Processes
Answer: B) Fixed-sized blocks

Q37. In paging, physical memory is divided into:

A) Pages
B) Frames
C) Segments
D) Blocks
Answer: B) Frames

Q38. In paging, logical memory is divided into:

A) Frames
B) Pages
C) Blocks
D) Sectors
Answer: B) Pages

Q39. Page table stores:

A) File information
B) Mapping between pages and frames
C) CPU instructions
D) Process priority
Answer: B) Mapping between pages and frames

Q40. A page fault occurs when:

A) Page is found in cache
B) Required page is not in main memory
C) CPU fails
D) Disk is full
Answer: B) Required page is not in main memory

Q41. Which algorithm replaces the page that has not been used for the longest time?
A) FIFO
B) LRU
C) Optimal
D) Random
Answer: B) LRU

Q42. FIFO page replacement removes:

A) Recently used page
B) Oldest page
C) Largest page
D) Smallest page
Answer: B) Oldest page

Q43. Belady's anomaly is associated with:

A) LRU
B) FIFO
C) Optimal
D) Round Robin
Answer: B) FIFO

Q44. Thrashing occurs when:

A) CPU utilization increases
B) Excessive paging occurs
C) Deadlock happens
D) Disk fails
Answer: B) Excessive paging occurs

6. Fragmentation

Q45. Wasted space inside allocated memory blocks is called:

A) External Fragmentation
B) Internal Fragmentation
C) Paging
D) Swapping
Answer: B) Internal Fragmentation

Q46. External fragmentation occurs when:

A) Free memory exists but is scattered
B) Memory is full
C) CPU is idle
D) Page fault occurs
Answer: A) Free memory exists but is scattered

Q47. Which technique eliminates external fragmentation?

A) Paging
B) Segmentation
C) Swapping
D) FCFS
Answer: A) Paging

7. Deadlock

Q48. Deadlock occurs when:

A) Processes execute quickly
B) Processes wait indefinitely for resources
C) CPU is idle
D) Memory is empty
Answer: B) Processes wait indefinitely for resources

Q49. Which is NOT a necessary condition for deadlock?

A) Mutual Exclusion
B) Hold and Wait
C) Circular Wait
D) Aging
Answer: D) Aging

Q50. Number of necessary conditions for deadlock is:

A) 2
B) 3
C) 4
D) 5
Answer: C) 4

Q51. The four deadlock conditions are:

A) Mutual Exclusion, Hold and Wait, No Preemption, Circular Wait
B) Paging, Segmentation, Swapping, Scheduling
C) FCFS, SJF, RR, Priority
D) None
Answer: A) Mutual Exclusion, Hold and Wait, No Preemption, Circular Wait

Q52. Banker's Algorithm is used for:

A) CPU Scheduling
B) Deadlock Avoidance
C) Memory Allocation
D) File Management
Answer: B) Deadlock Avoidance

Q53. Deadlock prevention works by:

A) Breaking one deadlock condition
B) Increasing CPU speed
C) Adding RAM
D) Removing processes
Answer: A) Breaking one deadlock condition

Q54. Deadlock detection requires:

A) Resource allocation graph
B) CPU scheduling
C) Paging
D) Compilation
Answer: A) Resource allocation graph

8. Process Synchronization

Q55. Synchronization is required to solve:

A) Memory leak
B) Race condition
C) Compilation error
D) Syntax error
Answer: B) Race condition

Q56. A race condition occurs when:

A) Multiple processes access shared data simultaneously
B) CPU stops
C) Memory is empty
D) Disk crashes
Answer: A) Multiple processes access shared data simultaneously

Q57. Critical section is:

A) Part of program accessing shared resources
B) CPU memory
C) OS kernel
D) Hardware component
Answer: A) Part of program accessing shared resources

Q58. Semaphore is used for:

A) Process synchronization
B) Memory allocation
C) File compression
D) CPU design
Answer: A) Process synchronization

Q59. Binary semaphore can have values:

A) 0 and 1
B) 1 and 2
C) Any integer
D) Negative only
Answer: A) 0 and 1

Q60. Mutex is used for:

A) Mutual exclusion
B) Memory allocation
C) CPU scheduling
D) File management
Answer: A) Mutual exclusion

Q61. Which problem is solved using synchronization?

A) Producer Consumer Problem
B) Sorting Problem
C) Searching Problem
D) Compilation Problem
Answer: A) Producer Consumer Problem

Q62. Peterson's solution is used for:

A) Two process synchronization
B) Memory management
C) Disk scheduling
D) File allocation
Answer: A) Two process synchronization

One-Line Revision Sheet

Concept AMCAT Key Point
Virtual Memory Executes programs larger than RAM
Paging Fixed-size pages and frames
Page Fault Page not available in RAM
LRU Removes least recently used page
FIFO Removes oldest page
Belady Anomaly FIFO problem
Thrashing Excessive paging
Internal Fragmentation Waste inside allocated block
External Fragmentation Scattered free memory
Deadlock Infinite waiting for resources
Banker's Algorithm Deadlock avoidance
Semaphore Synchronization mechanism
Mutex Mutual exclusion
Race Condition Shared data conflict
Critical Section Shared resource code area

Response 1 Part 2 completed.

Next continuation:
Response 1 Part 3 → File Management + I/O Management + Disk Scheduling + Computer
Architecture Basics MCQs.
AMCAT Computer Science Preparation
Response 1: Operating System + Computer Architecture
Part 3: File Management + I/O Management + Disk Scheduling + Computer Architecture Basics
MCQs

9. File Management

Q63. A file is:

A) Collection of related information stored on secondary storage
B) A CPU instruction
C) A memory block
D) A process
Answer: A) Collection of related information stored on secondary storage

Q64. File system is responsible for:

A) Managing files and directories
B) CPU scheduling
C) Memory execution
D) Process creation
Answer: A) Managing files and directories

Q65. Which of the following is a file allocation method?

A) Contiguous Allocation
B) Linked Allocation
C) Indexed Allocation
D) All of the above
Answer: D) All of the above

Q66. In contiguous allocation:

A) File blocks are stored continuously
B) File blocks are randomly placed
C) Files are stored in RAM
D) Files cannot be accessed directly
Answer: A) File blocks are stored continuously

Q67. The major disadvantage of contiguous allocation is:

A) Slow access
B) External fragmentation
C) No direct access
D) No file storage
Answer: B) External fragmentation

Q68. Linked allocation stores:

A) Blocks randomly connected through pointers
B) Blocks continuously
C) Files in cache
D) Files in registers
Answer: A) Blocks randomly connected through pointers

Q69. Indexed allocation uses:

A) Index block
B) Stack
C) Queue
D) Cache
Answer: A) Index block

Q70. Directory structure is used to:

A) Organize files
B) Increase CPU speed
C) Allocate RAM
D) Schedule processes
Answer: A) Organize files

Q71. FAT stands for:

A) File Allocation Table
B) File Access Transfer
C) Fast Allocation Technique
D) File Address Table
Answer: A) File Allocation Table

10. I/O Management

Q72. I/O stands for:

A) Input/Output
B) Internal Operation
C) Input Organization
D) Information Output
Answer: A) Input/Output

Q73. Device drivers are used for communication between:

A) Hardware devices and Operating System
B) CPU and RAM
C) User and Application
D) Compiler and OS
Answer: A) Hardware devices and Operating System

Q74. Which component manages I/O devices?

A) I/O Controller
B) Compiler
C) Loader
D) Scheduler
Answer: A) I/O Controller

Q75. DMA stands for:

A) Direct Memory Access
B) Dynamic Memory Allocation
C) Data Memory Access
D) Direct Machine Access
Answer: A) Direct Memory Access

Q76. DMA allows:

A) CPU-independent data transfer
B) Faster CPU execution
C) Memory removal
D) Process creation
Answer: A) CPU-independent data transfer

Q77. Interrupts are generated by:

A) Hardware or software events
B) Only CPU
C) Only RAM
D) Compiler
Answer: A) Hardware or software events

Q78. Interrupt handling is performed by:

A) Interrupt Service Routine
B) Compiler
C) Loader
D) Scheduler
Answer: A) Interrupt Service Routine

Q79. Spooling is mainly used with:

A) Printers
B) CPU
C) RAM
D) Cache
Answer: A) Printers

11. Disk Scheduling

Q80. Disk scheduling is used to:

A) Reduce disk access time
B) Increase RAM size
C) Manage processes
D) Compile programs
Answer: A) Reduce disk access time

Q81. FCFS disk scheduling follows:

A) First request served first
B) Highest priority first
C) Shortest seek first
D) Random selection
Answer: A) First request served first

Q82. SSTF stands for:

A) Shortest Seek Time First
B) Short System Transfer Function
C) Sequential Storage Transfer File
D) None
Answer: A) Shortest Seek Time First

Q83. SSTF selects:

A) Closest disk request
B) Oldest request
C) Largest request
D) Random request
Answer: A) Closest disk request

Q84. SCAN algorithm is also called:

A) Elevator Algorithm
B) FIFO Algorithm
C) Banker Algorithm
D) Paging Algorithm
Answer: A) Elevator Algorithm

Q85. C-SCAN provides:

A) Circular disk movement
B) Random movement
C) No movement
D) Memory allocation
Answer: A) Circular disk movement

12. Computer Architecture Basics

Q86. CPU consists of:

A) ALU, Control Unit, Registers
B) RAM, ROM, Hard Disk
C) Cache, Disk, Monitor
D) Keyboard, Mouse, CPU
Answer: A) ALU, Control Unit, Registers

Q87. ALU performs:

A) Arithmetic and logical operations
B) File management
C) Memory allocation
D) Process scheduling
Answer: A) Arithmetic and logical operations

Q88. Control Unit is responsible for:

A) Controlling execution of instructions
B) Performing calculations
C) Storing files
D) Managing networks
Answer: A) Controlling execution of instructions

Q89. Registers are:

A) Small high-speed storage locations inside CPU
B) Secondary memory
C) External devices
D) Software programs
Answer: A) Small high-speed storage locations inside CPU

Q90. Which is the fastest memory?

A) Hard Disk
B) RAM
C) Cache
D) Register
Answer: D) Register

Q91. The sequence of instruction execution is:

A) Fetch → Decode → Execute
B) Decode → Execute → Fetch
C) Execute → Fetch → Decode
D) Fetch → Execute → Decode
Answer: A) Fetch → Decode → Execute

Q92. The program counter stores:

A) Address of next instruction
B) Current data
C) Process ID
D) Memory size
Answer: A) Address of next instruction

Q93. Instruction Register stores:

A) Current instruction being executed
B) Next process
C) File information
D) Memory address only
Answer: A) Current instruction being executed

Q94. Von Neumann architecture uses:

A) Same memory for data and instructions
B) Separate memory for data and instructions
C) No memory
D) Only cache
Answer: A) Same memory for data and instructions

Q95. Harvard Architecture uses:

A) Separate memory for instructions and data
B) Same memory for everything
C) No CPU
D) Only registers
Answer: A) Separate memory for instructions and data

13. Number System & Data Representation

Q96. 1 Byte equals:

A) 4 bits
B) 8 bits
C) 16 bits
D) 32 bits
Answer: B) 8 bits

Q97. Binary number system uses:

A) 0 and 1
B) 0 to 9
C) A to F
D) 1 to 8
Answer: A) 0 and 1

Q98. Hexadecimal system uses:

A) 0-9 and A-F
B) Only 0-1
C) 0-7
D) A-Z
Answer: A) 0-9 and A-F

Q99. ASCII is used for:

A) Character representation
B) Memory allocation
C) CPU scheduling
D) File compression
Answer: A) Character representation

Q100. Unicode provides:

A) Representation of characters from multiple languages
B) Faster CPU
C) More RAM
D) Disk scheduling
Answer: A) Representation of characters from multiple languages

Final Revision Sheet (Part 3)

Topic AMCAT Key Point
Contiguous Allocation Continuous blocks
Linked Allocation Pointer-based blocks
Indexed Allocation Index block
DMA Direct memory transfer
Interrupt Event requiring CPU attention
Spooling Printer management
SSTF Closest request first
SCAN Elevator algorithm
CPU ALU + CU + Registers
Register Fastest storage
PC Address of next instruction
IR Current instruction
Von Neumann Same memory for data & instruction
Harvard Separate memories
Byte 8 bits

✅ Response 1 (Operating System + Computer Architecture) completed.

Next:
Response 2 → DBMS Complete AMCAT MCQ Bank (Basics, Keys, ER Model, Normalization, SQL,
Joins, Indexing, Transactions).
AMCAT Computer Science Preparation
Response 1 Extra: OS & Computer Architecture Advanced AMCAT MCQs
Part 1: Advanced Operating System Concepts (Q101–Q150)
(These questions cover missing concepts + AMCAT tricky patterns)

1. Advanced OS Basics

Q101. Which of the following is NOT a service provided by Operating System?

A) Program execution
B) I/O operations
C) Error detection
D) Code compilation
Answer: D) Code compilation

Q102. Bootstrap program is stored in:

A) RAM
B) ROM/Firmware
C) Cache
D) Hard Disk only
Answer: B) ROM/Firmware

Q103. The process of starting a computer is called:

A) Scheduling
B) Booting
C) Paging
D) Swapping
Answer: B) Booting

Q104. Dual mode operation in OS provides:

A) Faster execution
B) Protection between user and system operations
C) More memory
D) Better graphics
Answer: B) Protection between user and system operations

Q105. The two modes of CPU operation are:

A) Fast and Slow mode
B) User mode and Kernel mode
C) Input and Output mode
D) Memory and CPU mode
Answer: B) User mode and Kernel mode

Q106. Privileged instructions can execute only in:

A) User mode
B) Kernel mode
C) Application mode
D) Safe mode
Answer: B) Kernel mode

Q107. An interrupt is:

A) A hardware/software signal requiring CPU attention
B) A memory block
C) A file system
D) A scheduling algorithm
Answer: A) A hardware/software signal requiring CPU attention

Q108. Hardware interrupts are generated by:

A) External devices
B) Compiler
C) Operating system only
D) User programs only
Answer: A) External devices
Q109. Software interrupt is also called:
A) System call
B) Cache miss
C) Page fault
D) Context switch
Answer: A) System call

2. Process Management Advanced

Q110. A process contains:

A) Program code only
B) Program + data + resources
C) CPU only
D) Memory only
Answer: B) Program + data + resources

Q111. PCB is created when:

A) Process is created
B) File is created
C) CPU starts
D) Memory is deleted
Answer: A) Process is created

Q112. Which is NOT stored in PCB?

A) Process ID
B) Program Counter
C) CPU Registers
D) Source code
Answer: D) Source code

Q113. Context switching time is considered:

A) Useful CPU work
B) Overhead
C) Memory allocation
D) Scheduling algorithm
Answer: B) Overhead

Q114. A process waiting for an event is in:

A) Running state
B) Ready state
C) Blocked state
D) New state
Answer: C) Blocked state

Q115. The long-term scheduler controls:

A) Degree of multiprogramming
B) CPU allocation
C) Memory replacement
D) File access
Answer: A) Degree of multiprogramming
Q116. Short-term scheduler selects:
A) Job from disk
B) Process from ready queue
C) File from directory
D) Memory block
Answer: B) Process from ready queue

Q117. Medium-term scheduler performs:

A) Swapping
B) Compilation
C) Scheduling only
D) File allocation
Answer: A) Swapping

Q118. A process that has completed execution enters:

A) Ready state
B) Waiting state
C) Terminated state
D) New state
Answer: C) Terminated state

3. Threads and Multithreading

Q119. A thread is:

A) Heavyweight process
B) Lightweight process
C) Memory block
D) File
Answer: B) Lightweight process

Q120. Threads of the same process share:

A) Address space
B) Program counter only
C) Registers only
D) Stack only
Answer: A) Address space

Q121. Which is faster?

A) Process creation
B) Thread creation
C) System shutdown
D) Booting
Answer: B) Thread creation

Q122. Multithreading improves:

A) Responsiveness
B) Memory wastage
C) Deadlock
D) Fragmentation
Answer: A) Responsiveness
Q123. User-level threads are managed by:
A) Operating System
B) User-level library
C) CPU
D) Hardware
Answer: B) User-level library

Q124. Kernel-level threads are managed by:

A) Application
B) Operating System
C) Compiler
D) User
Answer: B) Operating System

4. CPU Scheduling Advanced

Q125. Turnaround time is:

A) Completion time - Arrival time
B) Burst time only
C) Waiting time only
D) Response time
Answer: A) Completion time - Arrival time

Q126. Waiting time is:

A) Turnaround time - Burst time
B) Burst time - Arrival time
C) Completion time only
D) Response time only
Answer: A) Turnaround time - Burst time

Q127. Response time is:

A) First CPU allocation time - Arrival time
B) Completion time - Arrival time
C) Burst time
D) Waiting time
Answer: A) First CPU allocation time - Arrival time

Q128. Which algorithm is best for interactive systems?

A) FCFS
B) Round Robin
C) SJF
D) FIFO
Answer: B) Round Robin

Q129. SJF scheduling can cause:

A) Deadlock
B) Starvation
C) Fragmentation
D) Thrashing
Answer: B) Starvation
Q130. Preemptive version of SJF is:
A) FCFS
B) SRTF
C) Round Robin
D) Priority
Answer: B) SRTF

5. Advanced Memory Management

Q131. Logical address is generated by:

A) CPU
B) RAM
C) Hard Disk
D) Compiler
Answer: A) CPU

Q132. Physical address is generated by:

A) CPU
B) Memory Management Unit
C) Compiler
D) Cache
Answer: B) Memory Management Unit

Q133. MMU stands for:

A) Memory Management Unit
B) Main Memory Unit
C) Machine Management Unit
D) Memory Mapping Utility
Answer: A) Memory Management Unit

Q134. TLB is used to:

A) Increase page table access speed
B) Store files
C) Schedule processes
D) Detect deadlock
Answer: A) Increase page table access speed

Q135. TLB is a type of:

A) Cache
B) Register
C) Hard Disk
D) RAM
Answer: A) Cache

Q136. Demand paging loads:

A) All pages initially
B) Pages only when required
C) No pages
D) Only programs
Answer: B) Pages only when required
Q137. A page fault causes:
A) Loading page from disk into memory
B) CPU shutdown
C) File deletion
D) Process termination always
Answer: A) Loading page from disk into memory

Q138. Effective memory access time depends on:

A) TLB hit ratio
B) Memory speed
C) Cache
D) All of the above
Answer: D) All of the above

Q139. Segmentation divides memory into:

A) Fixed-size pages
B) Variable-size segments
C) Frames
D) Blocks only
Answer: B) Variable-size segments

Q140. Paging eliminates:

A) Internal fragmentation completely
B) External fragmentation
C) Page faults
D) Deadlock
Answer: B) External fragmentation

6. Memory Allocation Algorithms

Q141. First Fit selects:

A) First available block large enough
B) Largest block
C) Smallest block
D) Random block
Answer: A) First available block large enough

Q142. Best Fit selects:

A) Largest available block
B) Smallest suitable block
C) First block
D) Random block
Answer: B) Smallest suitable block

Q143. Worst Fit selects:

A) Largest available block
B) Smallest block
C) First block
D) Last block
Answer: A) Largest available block
Q144. Which allocation method is generally faster?
A) First Fit
B) Best Fit
C) Worst Fit
D) None
Answer: A) First Fit

Q145. External fragmentation occurs mainly in:

A) Contiguous allocation
B) Paging
C) Registers
D) Cache
Answer: A) Contiguous allocation

7. Deadlock Advanced

Q146. Deadlock prevention ensures:

A) At least one necessary condition never occurs
B) Deadlock always occurs
C) CPU stops
D) Memory increases
Answer: A) At least one necessary condition never occurs

Q147. Deadlock avoidance requires:

A) Future resource information
B) More CPU speed
C) More memory
D) More processes
Answer: A) Future resource information

Q148. Safe state means:

A) System can avoid deadlock
B) Deadlock exists
C) CPU is idle
D) Memory is empty
Answer: A) System can avoid deadlock

Q149. Resource Allocation Graph is used for:

A) Deadlock detection
B) CPU scheduling
C) File management
D) Paging
Answer: A) Deadlock detection

Q150. Circular wait condition means:

A) Processes form a circular dependency
B) CPU executes circularly
C) Memory is circular
D) Files are circular
Answer: A) Processes form a circular dependency
Part 1 Completed (Q101–Q150)
Covered additional AMCAT concepts:
✅ OS services
✅ Booting
✅ Dual mode
✅ Interrupts
✅ Advanced process concepts
✅ Threads
✅ Scheduling calculations
✅ MMU
✅ TLB
✅ Demand Paging
✅ Segmentation
✅ Memory Allocation Algorithms
✅ Advanced Deadlock concepts
Next continuation:
Response 1 Extra Part 2 (Q151–Q200): Process Synchronization + IPC + Advanced Computer
Architecture + Cache + Pipelining + RISC/CISC + Instruction Concepts.
AMCAT Computer Science Preparation
Response 1 Extra: OS & Computer Architecture Advanced AMCAT MCQs
Part 2: Process Synchronization + IPC + Advanced Computer Architecture
Q151–Q200

8. Process Communication & Synchronization Advanced

Q151. IPC stands for:

A) Internal Process Control
B) Inter Process Communication
C) Internet Process Communication
D) Input Process Control
Answer: B) Inter Process Communication

Q152. IPC is used for:

A) Communication between processes
B) Increasing CPU speed
C) Memory allocation
D) File compression
Answer: A) Communication between processes

Q153. The two major IPC models are:

A) Paging and Segmentation
B) Shared Memory and Message Passing
C) FCFS and SJF
D) Cache and Register
Answer: B) Shared Memory and Message Passing

Q154. In shared memory IPC:

A) Processes communicate through common memory area
B) Processes never interact
C) CPU handles communication only
D) Files are deleted
Answer: A) Processes communicate through common memory area

Q155. Message passing is useful when:

A) Processes communicate without shared memory
B) Memory is unlimited
C) CPU is removed
D) Files are not required
Answer: A) Processes communicate without shared memory

Q156. Pipe is an example of:

A) IPC mechanism
B) Scheduling algorithm
C) Memory algorithm
D) File system
Answer: A) IPC mechanism

Q157. Race condition occurs when:

A) Output depends on execution order of processes
B) CPU fails
C) Memory is full
D) Disk crashes
Answer: A) Output depends on execution order of processes

Q158. Mutual exclusion ensures:

A) Only one process enters critical section at a time
B) All processes run together
C) No process executes
D) Memory sharing stops
Answer: A) Only one process enters critical section at a time

Q159. A solution to critical section problem must satisfy:

A) Mutual exclusion
B) Progress
C) Bounded waiting
D) All of the above
Answer: D) All of the above

Q160. Busy waiting occurs in:

A) Spinlock
B) Semaphore sleep
C) Message passing
D) Paging
Answer: A) Spinlock

Q161. A spinlock is suitable when:

A) Waiting time is very short
B) Process runs forever
C) Memory is unavailable
D) Disk is slow
Answer: A) Waiting time is very short
Q162. Binary semaphore is also called:
A) Mutex
B) Page table
C) Scheduler
D) Cache
Answer: A) Mutex

Q163. The wait operation on semaphore is also called:

A) P operation
B) V operation
C) Delete operation
D) Execute operation
Answer: A) P operation

Q164. The signal operation on semaphore is also called:

A) P operation
B) V operation
C) Load operation
D) Stop operation
Answer: B) V operation

Q165. Producer-consumer problem is related to:

A) Synchronization
B) CPU architecture
C) File allocation
D) Memory hierarchy
Answer: A) Synchronization

Q166. Dining Philosophers problem demonstrates:

A) Synchronization issues
B) Paging issues
C) Scheduling issues
D) Compilation issues
Answer: A) Synchronization issues

Q167. Readers-Writers problem deals with:

A) Shared data access
B) CPU scheduling
C) Memory allocation
D) File naming
Answer: A) Shared data access

9. Advanced Computer Architecture

Q168. Computer architecture mainly deals with:

A) Design and organization of computer system
B) Programming language syntax
C) Database design
D) Network security
Answer: A) Design and organization of computer system
Q169. CPU performance depends on:
A) Clock rate
B) CPI
C) Instruction count
D) All of the above
Answer: D) All of the above

Q170. CPU execution time formula is:

A) Instruction Count × CPI × Clock Cycle Time
B) RAM × CPU
C) Cache × Disk
D) Clock Rate × Memory
Answer: A) Instruction Count × CPI × Clock Cycle Time

Q171. CPI stands for:

A) Cycles Per Instruction
B) CPU Performance Index
C) Central Processing Input
D) Cache Performance Instruction
Answer: A) Cycles Per Instruction

Q172. Clock speed is measured in:

A) Bytes
B) Hertz
C) Bits
D) Seconds
Answer: B) Hertz

Q173. Increasing clock frequency generally:

A) Improves CPU speed
B) Reduces memory size
C) Removes cache
D) Stops execution
Answer: A) Improves CPU speed

10. Memory Hierarchy & Cache

Q174. Memory hierarchy is arranged according to:

A) Speed and cost
B) Color
C) File size
D) Program length
Answer: A) Speed and cost

Q175. Fastest memory in hierarchy is:

A) Hard Disk
B) RAM
C) Cache
D) Register
Answer: D) Register
Q176. Cache memory is placed between:
A) CPU and Main Memory
B) Hard Disk and Keyboard
C) RAM and Monitor
D) CPU and Printer
Answer: A) CPU and Main Memory

Q177. Cache improves performance by:

A) Reducing memory access time
B) Increasing file size
C) Removing CPU
D) Increasing disk space
Answer: A) Reducing memory access time

Q178. Cache hit means:

A) Required data found in cache
B) Cache failure
C) Memory deletion
D) CPU failure
Answer: A) Required data found in cache

Q179. Cache miss means:

A) Data not found in cache
B) Cache is empty always
C) CPU stops
D) RAM fails
Answer: A) Data not found in cache

Q180. Locality of reference is used in:

A) Cache memory
B) File system
C) Deadlock
D) Scheduling
Answer: A) Cache memory

Q181. Temporal locality means:

A) Recently accessed data may be accessed again
B) Nearby data access
C) Random access
D) No access
Answer: A) Recently accessed data may be accessed again

Q182. Spatial locality means:

A) Nearby memory locations are likely accessed
B) Old data repeats
C) CPU stops
D) Cache removed
Answer: A) Nearby memory locations are likely accessed

11. RISC and CISC Architecture

Q183. RISC stands for:
A) Reduced Instruction Set Computer
B) Random Instruction Set Computer
C) Rapid Input System Computer
D) None
Answer: A) Reduced Instruction Set Computer

Q184. CISC stands for:

A) Complex Instruction Set Computer
B) Central Instruction System Computer
C) Computer Input System Control
D) None
Answer: A) Complex Instruction Set Computer

Q185. RISC uses:

A) Small number of simple instructions
B) Large complex instructions
C) No instructions
D) Only memory operations
Answer: A) Small number of simple instructions

Q186. CISC uses:

A) Complex instructions
B) Very limited instructions
C) No registers
D) No memory
Answer: A) Complex instructions

Q187. RISC architecture generally has:

A) More registers
B) Less registers
C) No registers
D) External registers only
Answer: A) More registers

12. Instruction Pipeline

Q188. Pipelining improves:

A) Instruction throughput
B) Memory size
C) File storage
D) Disk capacity
Answer: A) Instruction throughput

Q189. Pipeline works by:

A) Overlapping instruction execution
B) Removing instructions
C) Stopping CPU
D) Reducing memory
Answer: A) Overlapping instruction execution
Q190. Pipeline stages commonly include:
A) Fetch, Decode, Execute
B) Read, Write only
C) Compile, Run
D) Load, Delete
Answer: A) Fetch, Decode, Execute

Q191. Pipeline hazard occurs due to:

A) Instruction dependencies
B) More memory
C) Faster CPU
D) Large files
Answer: A) Instruction dependencies

Q192. Types of pipeline hazards include:

A) Data, Control, Structural
B) Memory, File, Disk
C) CPU, RAM, ROM
D) Input, Output, Storage
Answer: A) Data, Control, Structural

13. Addressing & Instruction Concepts

Q193. Instruction Register stores:

A) Current instruction
B) Next process
C) File location
D) Memory size
Answer: A) Current instruction

Q194. Accumulator is:

A) CPU register used for arithmetic operations
B) Memory block
C) Disk area
D) File table
Answer: A) CPU register used for arithmetic operations

Q195. Opcode represents:

A) Operation to be performed
B) Memory location
C) Data value
D) Register number only
Answer: A) Operation to be performed

Q196. Operand represents:

A) Data or address on which operation is performed
B) Instruction type only
C) CPU speed
D) Memory size
Answer: A) Data or address on which operation is performed
Q197. MAR stores:
A) Memory address
B) Instruction result
C) CPU speed
D) File name
Answer: A) Memory address

Q198. MDR stores:

A) Data being transferred to/from memory
B) Process ID
C) Instruction type
D) Cache size
Answer: A) Data being transferred to/from memory

Q199. Control bus carries:

A) Control signals
B) Data only
C) Memory only
D) Instructions only
Answer: A) Control signals

Q200. Data bus carries:

A) Data between components
B) Only addresses
C) Control signals
D) Programs only
Answer: A) Data between components

You're right. Since these additional 100 MCQs introduced many new concepts, they also need a one-
line revision sheet. Without it, revision isn't complete.
One-Line Revision Sheet (Q101–Q200)
1. OS Basics
Concept One-Liner
Booting Process of starting the computer and loading the OS.
Bootstrap Program Firmware program that loads the operating system.
ROM/Firmware Stores the bootstrap loader permanently.
Dual Mode CPU operates in User Mode and Kernel Mode for protection.
User Mode Cannot execute privileged instructions.
Kernel Mode Can execute all privileged instructions.
Interrupt Signal that requests CPU attention.
Hardware Interrupt Generated by hardware devices (keyboard, disk, etc.).
Software Interrupt Generated by software, often through system calls.
System Call Interface between user programs and the OS.

2. Process Management
Concept One-Liner
Long-Term Scheduler Controls admission of processes (degree of multiprogramming).
Short-Term Scheduler Selects the next process from the ready queue.
Medium-Term Swaps processes in and out of memory.
Scheduler
Context Switching Saving one process state and loading another.
PCB Stores all important information about a process.
Terminated State Process has finished execution.
Blocked State Waiting for an event or I/O operation.
Ready State Waiting for CPU allocation.
Running State Currently executing on the CPU.

3. Threads
Concept One-Liner
Thread Smallest unit of CPU execution within a process.
Lightweight Process Another name for a thread.
Multithreading Multiple threads execute within one process.
User-Level Threads Managed by thread libraries in user space.
Kernel-Level Threads Managed directly by the operating system.
Shared Address Threads of the same process share memory.
Space

4. CPU Scheduling
Concept One-Liner
Turnaround Time Completion Time − Arrival Time.
Waiting Time Turnaround Time − Burst Time.
Response Time First CPU Allocation − Arrival Time.
SRTF Preemptive version of SJF.
Round Robin Best suited for interactive systems.
SJF Gives minimum average waiting time but may cause starvation.

5. Memory Management
Concept One-Liner
Logical Address Address generated by the CPU.
Physical Address Actual address in main memory.
MMU Converts logical addresses into physical addresses.
TLB Cache that stores recent page table entries.
Demand Paging Loads pages only when needed.
Effective Access Time Depends on memory speed and TLB hit ratio.
Segmentation Variable-size memory allocation technique.
Paging Fixed-size memory allocation technique.

6. Memory Allocation
Concept One-Liner
First Fit Uses the first free block large enough.
Best Fit Uses the smallest suitable free block.
Worst Fit Uses the largest available free block.
External Fragmentation Free memory exists but is scattered.
Internal Fragmentation Unused space inside an allocated block.

7. Deadlock
Concept One-Liner
Deadlock Prevention Breaks at least one necessary condition.
 Concept One-Liner
Deadlock Avoidance Allocates resources only if the system remains safe.
Safe State A state from which all processes can finish.
Resource Allocation Graph Used to represent resource allocation and detect deadlocks.
Circular Wait Processes wait in a circular chain for resources.

8. Process Synchronization
Concept One-Liner
IPC Communication between processes.
Shared Memory Processes communicate through a common memory region.
Message Passing Processes communicate by sending/receiving messages.
Pipe Simple IPC mechanism for data transfer.
Critical Section Code segment accessing shared resources.
Mutual Exclusion Only one process enters the critical section at a time.
Progress If no process is in the critical section, one waiting process should enter.
Bounded Waiting Every process gets a fair chance to enter the critical section.
Busy Waiting Process repeatedly checks until a resource becomes available.
Spinlock Lock implemented using busy waiting.
P Operation Wait (decrement) operation on a semaphore.
V Operation Signal (increment) operation on a semaphore.
Producer– Synchronization problem involving a shared buffer.
Consumer
Readers–Writers Synchronization problem for shared data access.
Dining Philosophers Classical synchronization and deadlock problem.

9. Computer Architecture
Concept One-Liner
Computer Architecture Design and organization of a computer system.
CPI Cycles Per Instruction.
CPU Execution Time Instruction Count × CPI × Clock Cycle Time.
Clock Speed Number of CPU cycles per second (Hz).

10. Memory Hierarchy & Cache

Concept One-Liner
Memory Hierarchy Registers → Cache → RAM → Secondary Storage.
Register Fastest storage in the computer.
Cache High-speed memory between CPU and RAM.
Cache Hit Required data found in cache.
Cache Miss Required data not found in cache.
Locality of Programs tend to reuse data or nearby locations.
Reference
Temporal Locality Recently used data is likely to be used again.
Spatial Locality Nearby memory locations are likely to be accessed.

11. RISC vs CISC

Concept One-Liner
RISC Small set of simple instructions, usually more registers.
CISC Large set of complex instructions.
RISC Faster execution with simpler instructions.
Advantage
CISC Advantage Fewer instructions needed for complex tasks.

12. Pipelining
Concept One-Liner
Pipelining Overlaps instruction execution to improve throughput.
Fetch Retrieves instruction from memory.
Decode Interprets the instruction.
Execute Performs the operation.
Data Hazard Dependency between instructions.
Control Hazard Caused by branch instructions.
Structural Hazard Two instructions compete for the same hardware resource.

13. CPU Registers & Buses

Concept One-Liner
Accumulato Register used for arithmetic and logic operations.
r
Opcode Specifies the operation to perform.
Operand Data or address used by the instruction.
MAR Memory Address Register stores memory addresses.
MDR Memory Data Register stores data being transferred.
Control Bus Carries control signals.
Data Bus Transfers data between components.
Address Bus Carries memory addresses.
Final Assessment

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