1.
Write about binary arithmetic operations in digital electronics
Binary arithmetic is one of the fundamental concepts in the field of digital
electronics and computer engineering. It is basically the mathematics of
binary numbers allow to perform various arithmetic operations on binary
numbers. We know that the binary number system has two digits, i.e., 0 and
1 which are used to represent the ON or OFF states of the digital systems.
Hence, binary arithmetic forms the foundation of the digital computing.
In this chapter, we will discuss the following four main binary arithmetic
operations −
Binary Addition
Binary Subtraction
Binary Multiplication
Binary Division
Lets discuss each of these binary arithmetic operations in detail along with
solved examples.
Binary Addition
In binary arithmetic, the process of adding two binary numbers is called
binary addition. Where, the binary numbers consist of only 0 and 1. In the
binary addition, a carry is generated when the sum is greater than 1.
Rules of Binary Addition
The addition of two binary numbers is performed according to these rules of
binary arithmetic −
0+0=0
0+1=1
1+0=1
1+1=10(Sum=0&Carry=1)
Let us consider some examples to understand the binary addition.
Example 1
Add two binary numbers, 1101 and 1110.
Solution
The binary addition of the given binary numbers is described below −
Binary Subtraction
In binary arithmetic, binary subtraction is a mathematical operation used to
find the difference between two binary numbers.
In binary subtraction, each bit of the binary numbers is subtracted, starting
from the rightmost bit.
Also, a borrow bit can be taken from higher bits if require.
Rules of Binary Subtraction
The binary subtraction is performed as per the following rules of binary
arithmetic −
00=0
10=1
01=1(borrow1fromthenexthigherbit)
11=0
Let us see some examples to understand the binary subtraction.
Example 1
Subtract 1100 from 1101.
Solution
The subtraction of given binary numbers is given below −
1101 1100 = 0001
Binary Multiplication
In binary arithmetic, binary multiplication is the process of multiplying two
binary numbers and obtain their product.
In binary multiplication, we multiply each bit of one binary number by each
bit of another binary number and then add the partial products to obtain the
final product.
Rules of Binary Multiplication
The multiplication of two binary numbers is performed as per the following
rules of binary arithmetic −
0×0=0
0×1=0
1×0=0
1×1=1
It is clear that the binary multiplication is similar to the decimal
multiplication. Let us understand the binary multiplication with the help of
solved examples.
Example 1
Multiply 1101 and 11.
Solution
The binary multiplication of given numbers is described below −
Binary Division
Binary division is one of the basic arithmetic operations used to find the
quotient and remainder when dividing one binary number by another.
Rules of Binary Division
The following rules of binary arithmetic are utilized while diving one binary
number by another −
0÷0=Undefined
0÷1=0withRemainder=0
1÷0=Undefined
1÷1=1withRemainder=0
Binary Division Procedure
Start dividing from the leftmost bits of the dividend by the divisor.
Multiply the quotient obtained by the divisor and subtract from the dividend.
Bring down the next bits of the dividend and repeat the division process until
all the bits of given divided are used.
Let us consider some solved examples to understand the binary division.
Example 1
Divide 110011 by 11.
Solution
The division of the given binary numbers is explained below −
110011 11 = 10001
[Link] about Canonical and Standard Form
Boolean algebra is the foundation of digital electronics, enabling the design
and analysis of logic circuits. Canonical and standard forms are key
concepts in Boolean algebra, used to simplify and optimize these circuits
for better performance.
Canonical forms provide a unique representation of Boolean functions
using minterms or maxterms.
Standard forms simplify logic expressions into sum of products or product
of sums for easier implementation.
These forms help reduce hardware complexity and improve efficiency in
digital design.
Mastering canonical and standard forms is key for troubleshooting and
enhancing circuit reliability.
Canonical Forms in Boolean Algebra
Canonical forms in Boolean algebra provide a standard way to represent
logic functions using minterms or maxterms.
Minterms: A minterm is the product of different Boolean variables, each
occurring exactly once, where the output is 1. If the value of the Boolean
variable is 1, we take the variable without complementing it and if the value
is 0, we take the variable with complement.
Maxterms: A maxterm is the sum of different Boolean variables, each
occurring exactly once, where the output is 0. If the value of the Boolean
variable is 0, we take the variable without complementing it and if the value
is 1, we take the variable with complement.
Truth table representing minterm and maxterm:
S. No. X Y Z Minterms (Product Terms) Maxterms (Sum Terms)
0 0 0 0 m0 = X'.Y'.Z' M0 = X + Y + Z
1 0 0 1 m1 = X'.Y'.Z M1 = X + Y + Z'
2 0 1 0 m2 = X'.Y.Z' M2 = X + Y' + Z
3 0 1 1 m3 = X'.Y.Z M3 = X + Y' + Z'
4 1 0 0 m4 = X.Y'.Z' M4 = X' + Y + Z
S. No. X Y Z Minterms (Product Terms) Maxterms (Sum Terms)
5 1 0 1 m5 = X.Y'.Z M5 = X' + Y + Z'
6 1 1 0 m6 = X.Y.Z' M6 = X' + Y' + Z
7 1 1 1 m7 = X.Y.Z M7 = X' + Y' + Z'
There are two types of canonical forms that are commonly used:
1. Canonical Sum of Products (SOP)
In the Canonical Sum of Products form, every term in the Boolean
expression is minterm. The sum (OR) of these minterms represents the
final expression. For this sum we only consider minterms where output of
Boolean function is 1. Each minterm contains all input variables either in
true or in complemented form.
2. Canonical Product of Sums (POS)
In the Canonical Product of Sums form, every term in the Boolean
expression is maxterm. The product (AND) of these maxterms represents
the final expression. For this product we only consider maxterms where
output of Boolean function is 0. Each maxterm contains all input variables
either in true or in complemented form.
Example
Consider two Boolean variable A, B and a Boolean function F. The Boolean
function F is equal to A XOR B.
F(A, B) = A ⊕ B
Truth Table for F(A, B):
S. F(A, Minterms (Product Maxterms (Sum
No. A B B) Terms) Terms)
0 0 0 0 No minterm as output is 0 M0 = A + B
No maxterm as output
1 0 1 1 m1 = A'.B
is 1
No maxterm as output
2 1 0 1 m2 = A.B'
is 1
3 1 1 0 No minterm as output is 0 M3 = A' + B'
Canonical Sum of Products (SOP) Form for the Boolean Function 'F':
F(A, B) = m1 + m2 = A'.B + A.B'
Canonical Product of Sums (POS) Form for the Boolean Function 'F':
F(A, B) = M0 + M3 = (A + B).(A' + B')
These forms ensure every Boolean expression has a unique
representation, making analysis and simplification easier. Every Boolean
function has only one canonical SOP and one canonical POS form,
ensuring consistency in digital circuit design. It is used in Karnaugh maps,
Quine-McCluskey method and logic minimization to optimize circuits for
speed and cost.
Standard Forms in Boolean Algebra
Standard forms provide simplified ways to represent Boolean functions
while maintaining clarity and efficiency in digital circuit design. Unlike
canonical forms, they don't require every term to contain all variables.
There are two common standard forms used to express Boolean functions:
1. Standard Sum of Products (SOP)
The Standard Sum of Products is a simplified version of canonical SOP
where product terms don't need to contain all variables. In this form the
Boolean expression is written as a sum (OR operation) of multiple product
terms (AND operations). Each product term contains input variables either
in true or in complemented form.
For example,
F(A, B, C) = A'B'C + A'B + AB
Some product terms in this expression does not contain all of the Boolean
variables such as, A'B or AB.
2. Standard Product of Sums (POS)
In this standard form, the Boolean expression is written as a product (AND
operation) of sum terms (OR operations). It represents functions as AND
operations on OR terms, offering a practical alternative to canonical POS.
This optimized form reduces circuit complexity while maintaining logical
equivalence.
For example,
F = (A+C)(B+C)(A'+B'+C)
Some of the sum terms in this expression does not contain all of the
Boolean variables such as, (A+B) or (B+C).
Conversion Between Canonical and Standard Forms
Boolean functions can be represented in canonical forms (complete
minterm/maxterm expansions) or standard forms (simplified expressions).
Converting between these forms is essential for circuit optimization
Converting Canonical Form into Standard Form
Start with canonical form (SOP or POS)
Apply Boolean algebra rules to simplify
Eliminate redundant terms when possible
Example:
Canonical SOP: F(A, B, C) = A'B'C + A'BC + AB'C + ABC
Step-by-Step Simplification:
Group terms with common variables:
(A′B′C + A′BC) + (AB′C + ABC)
Factor out common terms:
A′C(B′+B) + AC(B′ + B)
Apply B′+B=1:
A′C(1)+AC(1)
Final Standard SOP:
F=A′C+AC
Further simplification (optional):
F = C(A′ + A) = C (Fully minimized)
Standard Form: F(A, B, C) = C
Converting Standard Form into Canonical Form
Identify missing variables in each product term.
Expand using X = X(Y + Y′) (for SOP) or X = X + YY' (for POS) to include
all variables.
Remove duplicates (if any).
Example:
Standard SOP: F = A + BC
Step-by-Step Expansion:
In first term i.e. A, B and C are missing.
A = A(B + B′)(C + C′) = ABC + AB′C + ABC′ + AB′C′
In second term i.e. BC, A is missing.
BC = (A + A′)BC = ABC + A′BC
Combining all minterms:
F = ABC + AB′C + ABC′ + AB′C′ + ABC + A′BC
Remove duplicates (ABC appears twice):
F = A′BC + AB′C′ + AB′C + ABC′ + ABC
Canonical Form: F(A, B, C) = A′BC + AB′C′ + AB′C + ABC′ + ABC
[Link] about K-Map (Karnaugh Map)
In many digital circuits and practical problems, we need to find expressions
with minimum variables. We can minimize Boolean expressions of 3, 4
variables very easily using K-map without using any Boolean algebra
theorems. It is a tool which is used in digital logic to simplify boolean
expression. It helps to simplify logic into simpler form by organizing grid
from truth table values. This helps it to create a minimal Boolean
expressions by identifying patterns.
K-map can take two forms:
1. Sum of product (SOP)
2. Product of Sum (POS)
According to the need of problem. K-map is a table-like representation, but
it gives more information than the TABLE. We fill a grid of the K-map with
0’s and 1’s then solve it by making groups.
Steps to Solve Expression using K-map
1. Select the K-map according to the number of variables.
2. Identify minterms or maxterms as given in the problem.
3. For SOP put 1’s in blocks of K-map respective to the minterms (0’s
elsewhere).
4. For POS put 0’s in blocks of K-map respective to the max terms (1’s
elsewhere).
5. Make rectangular groups containing total terms in power of two like
2,4,8 ..(except 1) and try to cover as many elements as you can in one
group.
6. From the groups made in step 5 find the product terms and sum them
up for SOP form.
SOP FORM(Sum of Product Form)
SOP form is way to simplify and write Boolean expressions using AND to
combine inputs and OP to combine the results.
1. K-map for 2 variables
In the 2 variable k-map, four squares are constructed. Each square
contains one term of expression with two variables.
K-Map for 2 variables
2. K-map of 3 variables
K-map SOP form for 3 variables
Z= ΣA,B,C(1,3,6,7)
From red group we get product term:
A’C
From green group we get product term:
AB
Summing these product terms we get- Final expression (A’C+AB)
3. K-map for 4 variables
K-map 4 variable SOP form
F(A,B,C,D)=Σ(0,1,2,3,12,13,15,14)
k map 4 variables
From red group we get product term:
AB
From green group we get product term:
A'B'
Summing these product terms we get- Final expression (AB+A’B').
POS FORM (Product of Sum Form)
POS form is a way to simplify and write Boolean expressions using OR to
combine terms inside parentheses and then AND to combine those groups.
1.K-map of 2 variables
In the 2 variable k-map, four squares are constructed. Each square
contains one term of expression with two variables.
K-map of 2 variables
2. K-map of 3 variables
K-
map 3 variable POS form
F(A,B,C)=Σ(0,3,6,7)
From red group we find terms
A B
Taking complement of these two
A' B'
Now sum up them
(A' + B')
From brown group we find terms
B C
Taking complement of these two terms
B’ C’
Now sum up them
(B’+C’)
From yellow group we find terms
A' B' C’
Taking complement of these two
A B C
Now sum up them
(A + B + C)
We will take product of these three terms : Final expression -
(A' + B’) (B’ + C’) (A + B + C)
3. K-map of 4 variables
K-map 4 variable POS form
F(A,B,C,D)=Σ(3,5,7,8,10,11,12,13)
From green group we find terms
C’ D B
Taking their complement and summing them
(C+D’+B’)
From red group we find terms
C D A’
Taking their complement and summing them
(C’+D’+A)
From blue group we find terms
A C’ D’
Taking their complement and summing them
(A’+C+D)
From brown group we find terms
A B’ C
Taking their complement and summing them
(A’+B+C’)
Finally we express these as product -
(C+D’+B’).(C’+D’+A).(A’+C+D).(A’+B+C’)
Advantages of K-MAP
Makes Logic Simpler: It makes complicated Boolean expressions simpler.
Minimizes Logic Gates: Simplifying the logic helps us to use fewer logic
gates, making circuits more efficient.
Reduce Errors: The visual representation of k-map helps to avoid errors
while simplifying.
Time-Saving: It's quicker than traditional methods for simplifying logic.
No need for Boolean Laws: K-map doesn't require deep knowledge of
Boolean laws, making it easy for beginners.
Disadvantages of K-MAP
Limited to Fewer Variables: K-maps are best suited for 2 to 4 variables and
above it, process becomes hard and complicated to manage.
Not suitable for all functions: In some cases, its hard to group terms
correctly, leading to errors and making simplification difficult.
Space Limitations: As the number of variables increases, the K-map grid
becomes too large to handle easily.
Requires Careful Grouping: Sometimes incorrect grouping of terms can
cause mistakes in logic simplification.
.
Some typical examples of K-Map of two variable, three variable, and four
variables are shown in Figure-1.
From Figure-1, it is clear that the number of squares or cells in the Karnaugh
map depends on the number of variables in the expression.
If n is the number of variables in the given Boolean function, then the
corresponding Karnaugh map (K-Map) will have 2 n squares or cells. For
examples, if the number of variables in the Boolean function is 3, then the
corresponding K-Map will have 8 (= 2 3) cells.
[Link] about Adders and Subtractors in
Digital Logic
Adders and subtractors are digital circuits used to perform arithmetic
operations on binary numbers. An adder adds two binary values to
produce a sum and often including a carry bit for values that exceed a
single digit. A subtractor calculates the difference between two binary
numbers, sometimes using methods like two’s complement to handle
negative results. These circuits form the core of arithmetic logic units
(ALUs) in processors and enable efficient calculation and data processing.
Half Adder
It is a arithmetic combinational logic circuit designed to perform
addition of two single bits.
It contain two inputs and produces two outputs.
Inputs are called Augend and Added bits and Outputs are called Sum
and Carry.
Half Adder
Let us observe the addition of single bits,
0+0=0
0+1=1
1+0=1
1+1=10
Since 1+1=10, the result must be two bit output. So, Above can be
rewritten as,
0+0=00
0+1=01
1+0=01
1+1=10
The result of 1+1 is 10, where '1' is carry-output (C out) and '0' is Sum-
output (Normal Output).
Truth Table of Half Adder:
Next Step is to draw the Logic Diagram. To draw Logic Diagram, We need
Boolean Expression, which can be obtained using K-map (karnaugh map).
Since there are two output variables 'S' and 'C', we need to define K-map
for each output variable.
K-map for output variable Sum 'S':
K-map is of Sum of products form. The equation obtained is
S = AB' + A'B
which can be logically written as,
S=A⊕B
K-map for output variable Carry 'C':
The equation obtained from K-map is,
C = AB
Using the Boolean Expression, we can draw logic diagram as follows..
Limitations: Adding of Carry is not possible in Half adder.
Full Adder
To overcome the above limitation faced with Half adders, Full Adders
are implemented.
It is a arithmetic combinational logic circuit that performs addition of
three single bits.
It contains three inputs (A, B, C in) and produces two outputs (Sum and
Cout).
Where, Cin -> Carry In and C out -> Carry Out
Full Adder
Truth table of Full Adder:
K-map Simplification for output variable Sum 'S' :
The equation obtained is,
S = A'B'Cin + AB'Cin' + ABC + A'BCin'
The equation can be simplified as,
S = B'(A'Cin+ACin') + B(AC + A'Cin')
S = B'(A xor Cin) + B (A xor Cin)'
S = A xor B xor Cin
K-map Simplification for output variable 'C out'
The equation obtained is,
Cout = BCin + AB + ACin
Logic Diagram of Full Adder:
Half Subtractor
It is a combinational logic circuit designed to perform the subtraction of
two single bits.
It contains two inputs (A and B) and produces two outputs (Difference
and Borrow-output).
Half Subtractor
Truth Table of Half Subtractor:
K-map Simplification for output variable 'D':
The equation obtained is,
D = A'B + AB'
which can be logically written as,
D = A xor B
K-map Simplification for output variable 'B out' :
The equation obtained from above K-map is,
Bout = A'B
Logic Diagram of Half Subtractor:
Read more about Half Subtractor.
Full Subtractor
It is a Combinational logic circuit designed to perform subtraction of
three single bits.
It contains three inputs(A, B, B in) and produces two outputs (D, B out).
Where, A and B are called Minuend and Subtrahend bits.
And, Bin -> Borrow-In and Bout -> Borrow-Out
Full Subtractor
Truth Table of Full Subtractor:
K-map Simplification for output variable 'D' :
Th
e equation obtained from above K-map is,
D = A'B'Bin + AB'Bin' + ABBin + A'BBin'
which can be simplified as,
D = B'(A'Bin + ABin') + B(ABin + A'Bin')
D = B'(A xor Bin) + B(A xor Bin)'
D = A xor B xor Bin
K-map Simplification for output variable 'B out' :
The equation obtained is,
Bout = BBin + A'B + A'Bin
Logic Diagram of Full Subtractor:
Ap
plications:
1. For performing arithmetic calculations in electronic calculators and
other digital devices.
2. In Timers and Program Counters.
3. Useful in Digital Signal Processing.