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Chapter 9

This document discusses the design of controllers for switching converters, emphasizing the importance of negative feedback to maintain a constant output voltage despite variations in input voltage, load current, and component values. It explains the feedback system's structure, including the roles of sensors and compensators, and how feedback reduces the influence of disturbances on the output voltage. Additionally, it addresses stability concerns and the impact of feedback on transfer functions, highlighting the benefits of high loop gain for improved performance.

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0% found this document useful (0 votes)
2 views59 pages

Chapter 9

This document discusses the design of controllers for switching converters, emphasizing the importance of negative feedback to maintain a constant output voltage despite variations in input voltage, load current, and component values. It explains the feedback system's structure, including the roles of sensors and compensators, and how feedback reduces the influence of disturbances on the output voltage. Additionally, it addresses stability concerns and the impact of feedback on transfer functions, highlighting the benefits of high loop gain for improved performance.

Uploaded by

Arsalan
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

9

Controller Design

9.1 Introduction
In all switching converters, the output voltage v(t) is a function of the input line voltage vg (t), the
duty cycle d(t), and the load current iload (t), as well as the converter circuit element values. In
a dc–dc converter application, it is desired to obtain a constant output voltage v(t) = V, in spite
of disturbances in vg (t) and iload (t), and in spite of variations in the converter circuit element
values. The sources of these disturbances and variations are many, and a typical situation is
illustrated in Fig. 9.1. The input voltage vg (t) of an off-line power supply may typically contain
periodic variations at the second harmonic of the ac power system frequency (100 Hz or 120
Hz), produced by a rectifier circuit. The magnitude of vg (t) may also vary when neighboring
power system loads are switched on or off. The load current iload (t) may contain variations of
significant amplitude, and a typical power supply specification is that the output voltage must
remain within a specified range (for example, 3.3 V ± 0.05 V) when the load current takes a
step change from, for example, full rated load current to 50% of the rated current, and vice
versa. The values of the circuit elements are constructed to a certain tolerance, and so in high-
volume manufacturing of a converter, converters are constructed whose output voltages lie in
some distribution. It is desired that essentially all of this distribution fall within the specified
range; however, this is not practical to achieve without the use of negative feedback. Similar
considerations apply to inverter applications, except that the output voltage is ac.
So we cannot expect to simply set the dc–dc converter duty cycle to a single value, and
obtain a given constant output voltage under all conditions. The idea behind the use of negative
feedback is to build a circuit that automatically adjusts the duty cycle as necessary, to obtain
the desired output voltage with high accuracy, regardless of disturbances in vg (t) or iload (t) or
variations in component values. This is a useful thing to do whenever there are variations and
unknowns that otherwise prevent the system from attaining the desired performance.
A block diagram of a feedback system is shown in Fig. 9.2. The output voltage v(t) is mea-
sured, using a “sensor” with gain H(s). In a dc voltage regulator or dc–ac inverter, the sensor
circuit is usually a voltage divider, comprised of precision resistors. The sensor output signal
H(s)v(s) is compared with a reference input voltage vre f (s). The objective is to make H(s)v(s)
equal to vre f (s), so that v(s) accurately follows vre f (s) regardless of disturbances or component
variations in the compensator, pulse-width modulator, gate driver, or converter power stage.

© Springer Nature Switzerland AG 2020 347


R. W. Erickson, D. Maksimović, Fundamentals of Power Electronics,
[Link]
348 9 Controller Design

(a) Switching converter Load

+ iload(t )

vg(t) + v(t)

Transistor
gate driver
(t) (t) Pulse-width vc(t)
modulator

dTs Ts t

Switching converter
(b)
v(t) = f(vgi, load ,d )
vg(t)

iload (t) } Disturbances


v(t)

d(t)
} Control input

Fig. 9.1 The output voltage of a typical switching converter is a function of the line input voltage vg , the
duty cycle d, and the load current iload : (a) open-loop buck converter; (b) functional diagram illustrating
dependence of v on the independent quantities vg , d, and iload

The difference between the reference input vre f (s) and the sensor output H(s)v(s) is called
the error signal ve (s). If the feedback system works perfectly, then vre f (s) = H(s)v(s), and
hence the error signal is zero. In practice, the error signal is usually nonzero but nonetheless
small. Obtaining a small error is one of the objectives in adding a compensator network Gc (s)
as shown in Fig. 9.2. Note that the transfer function from the error signal ve (s) to the output
voltage v(s) is equal to the gains of the compensator, pulse-width modulator, and converter
power stage. If the compensator gain Gc (s) is large enough in magnitude, then a small error
signal can produce the required output voltage v(t) = V for a dc regulator (Q: how should H
and vre f then be chosen?). So a large compensator gain leads to a small error, and therefore the
output follows the reference input with good accuracy. This is the key idea behind feedback
systems.
The averaged small-signal converter models derived in Chap. 7 are used in the following sec-
tions to find the effects of feedback on the small-signal transfer functions of the regulator. The
loop gain T (s) is defined as the product of the small-signal gains in the forward and feedback
paths of the feedback loop. It is found that the transfer function from a disturbance to the output
is multiplied by the factor 1/(1 + T (s)). Hence, when the loop gain T is large in magnitude,
then the influence of disturbances on the output voltage is small. A large loop gain also causes
the output voltage v(s) to be nearly equal to vre f (s)/H(s), with very little dependence on the
9.1 Introduction 349

(a) Power Switching converter Load


input
+
iload

vg + v

Sensor
H(s) gain

Transistor Error
gate driver signal
Pulse-width vc G (s) ve Hv
modulator c +
Compensator
Reference
input vref

Switching converter
(b)
v(t) = f(vgi, load
,d )
vg(t)
Error
signal
ve(t)
iload (t)
vc Pulse-width d(t)
} Disturbances
v(t)

vref + Compensator
modulator
} Control input
Reference
input
Sensor
gain

Fig. 9.2 Feedback loop for regulation of the output voltage: (a) buck converter, with feedback loop block
diagram; (b) functional block diagram of the feedback system

gains in the forward path of the feedback loop. So the loop gain magnitude  T  is a measure
of how well the feedback system works. All of these gains can be easily constructed using the
algebra-on-the-graph method; this allows easy evaluation of important closed-loop performance
measures, such as the output voltage ripple resulting from 120 Hz rectification ripple in vg (t) or
the closed-loop output impedance.
Stability is another important issue in feedback systems. Adding a feedback loop can cause
an otherwise well-behaved circuit to exhibit oscillations, ringing and overshoot, and other unde-
sirable behavior. An in-depth treatment of stability is beyond the scope of this book; however,
the simple phase margin criterion for assessing stability is used here. When the phase margin
of the loop gain T is positive, then the feedback system is stable. Moreover, increasing the
phase margin causes the system transient response to be better behaved, with less overshoot and
ringing. The relation between phase margin and closed-loop response is quantified in Sect. 9.4.
An example is given in Sect. 9.5, in which a compensator network is designed for a dc reg-
ulator system. The compensator network is designed to attain adequate phase margin and good
350 9 Controller Design

rejection of expected disturbances. Lead compensators and P–D controllers are used to improve
the phase margin and extend the bandwidth of the feedback loop. This leads to better rejection
of high-frequency disturbances. Lag compensators and P–I controllers are used to increase the
low-frequency loop gain. This leads to better rejection of low-frequency disturbances and very
small steady-state error. More complicated compensators can achieve the advantages of both
approaches.
Injection methods for experimental measurement of loop gain are introduced in Sect. 9.6.
The use of voltage or current injection solves the problem of establishing the correct quiescent
operating point in high-gain systems. Conditions for obtaining an accurate measurement are
exposed. The injection method also allows measurement of the loop gains of unstable systems.

9.2 Effect of Negative Feedback on the Network Transfer Functions


We have seen how to derive the small-signal ac transfer functions of a switching converter. For
example, the equivalent circuit model of the buck converter can be written as in Fig. 9.3. This
equivalent circuit contains three independent inputs: the control input variations d̂, the power
input voltage variations v̂g , and the load current variations îload . The output voltage variation v̂
can therefore be expressed as a linear combination of the three independent inputs, as follows:

v̂(s) = Gvd (s) d̂(s) + Gvg (s) v̂g (s) − Zout (s) î load (s) (9.1)

where

v̂(s) 
Gvd (s) =  converter control-to-output transfer function (9.1a)
d̂(s)  v̂g =0
î =0
load
v̂(s) 
Gvg (s) =  converter line-to-output transfer function (9.1b)
v̂g (s)  d̂=0
îload =0

v̂(s) 
Zout (s) = −  converter output impedance (9.1c)
îload (s)  v̂g =0
d̂=0

The Bode diagrams of these quantities are constructed in Chap. 8. Equation (9.1) describes how
disturbances vg and iload propagate to the output v, through the transfer function Gvg (s) and the
output impedance Zout (s). If the disturbances vg and iload are known to have some maximum
worst-case amplitude, then Eq. (9.1) can be used to compute the resulting worst-case open-loop
variation in v.
As described previously, the feedback loop of Fig. 9.2 can be used to reduce the influences
of vg and iload on the output v. To analyze this system, let us perturb and linearize its aver-
aged signals about their quiescent operating points. Both the power stage and the control block
diagram are perturbed and linearized:

vre f (t) = Vre f + v̂re f (t) (9.2)


ve (t) = Ve + v̂e (t)
etc.
9.2 Effect of Negative Feedback on the Network Transfer Functions 351

Fig. 9.3 Small-signal converter model, which represents variations in vg , d, and iload

In a dc regulator system, the reference input is constant, so v̂re f (t) = 0. In a switching amplifier
or dc–ac inverter, the reference input may contain an ac variation. In Fig. 9.4a, the converter
model of Fig. 9.3 is combined with the perturbed and linearized control circuit block diagram.
This is equivalent to the reduced block diagram of Fig. 9.4b, in which the converter model has
been replaced by blocks representing Eq. (9.1).
Solution of Fig. 9.4b for the output voltage variation v yields

GcGvd /V M Gvg Zout


v̂ = v̂re f + v̂g − îload (9.3)
1 + HGcGvd /V M 1 + HGcGvd /V M 1 + HGcGvd /V M
which can be written in the form
1 T Gvg Zout
v̂ = v̂re f + v̂g − îload (9.4)
H1+T 1+T 1+T
with
T (s) = H(s)Gc (s)Gvd (s)/V M = “loop gain”
Equation (9.4) is a general result. The loop gain T (s) is defined in general as the product of the
gains around the forward and feedback paths of the loop. This equation shows how the addition
of a feedback loop modifies the transfer functions and performance of the system, as described
in detail below.

9.2.1 Feedback Reduces the Transfer Functions from Disturbances to the Output

The transfer function from vg to v in the open-loop buck converter of Fig. 9.3 is Gvg (s), as given
in Eq. (9.1). When feedback is added, this transfer function becomes

v̂(s)  Gvg (s)
 = (9.5)
v̂g (s)  v̂re f =0 1 + T (s)
îload =0

from Eq. (9.4). So this transfer function is reduced via feedback by the factor 1/(1 + T (s)). If the
loop gain T (s) is large in magnitude, then the reduction can be substantial. Hence, the output
voltage variation v resulting from a given vg variation is attenuated by the feedback loop.
352 9 Controller Design

Fig. 9.4 Voltage regulator system small-signal model: (a) with converter equivalent circuit; (b) complete
block diagram

Equation (9.4) also predicts that the converter output impedance is reduced, from Zout (s) to

v̂(s)  Zout (s)
 v̂ =0 = (9.6)
− îload (s) g 1 + T (s)
v̂re f =0
So the feedback loop also reduces the converter output impedance by a factor of 1/(1 + T (s)),
and the influence of load current variations on the output voltage is reduced.
9.3 Construction of 1/(1 + T ) and T/(1 + T ) 353

9.2.2 Feedback Causes the Transfer Function from the Reference Input to the Output
to Be Insensitive to Variations in the Gains in the Forward Path of the Loop

According to Eq. (9.4), the closed-loop transfer function from vre f to v is



v̂(s)  1 T (s)
 = (9.7)
v̂re f (s)  v̂g =0 H(s) 1 + T (s)
îload =0

If the loop gain is large in magnitude, that is,  T  1, then (1 + T ) ≈ T and T/(1 + T ) ≈
T/T = 1. The transfer function then becomes
v̂(s) 1
≈ (9.8)
v̂re f (s) H(s)

which is independent of Gc (s), V M , and Gvd (s). So provided that the loop gain is large in mag-
nitude, then variations in Gc (s), V M , and Gvd (s) have negligible effect on the output voltage. Of
course, in the dc regulator application, vre f (t) is constant and v̂re f = 0. But Eq. (9.8) applies
equally well to the dc values. For example, if the system is linear, then we can write
V 1 T (0) 1
= ≈ (9.9)
Vre f H(0) 1 + T (0) H(0)

So to make the dc output voltage V accurately follow the dc reference Vre f  we need only ensure
that the dc sensor gain H(0) and dc reference Vre f are well known and accurate, and that T (0) is
large. Precision resistors are normally used to realize H, but components with tightly controlled
values need not be used in Gc , the pulse-width modulator, or the power stage. The sensitivity of
the output voltage to the gains in the forward path is reduced, while the sensitivity of v to the
feedback gain H and the reference input vre f is increased.

9.3 Construction of the Important Quantities 1/(1 + T) and T/(1 + T)


and the Closed-Loop Transfer Functions

The transfer functions in Eqs. (9.4) to (9.9) can be easily constructed using the algebra-on-the-
graph method [81]. Let us assume that we have analyzed the blocks in our feedback system, and
have plotted the Bode diagram of  T (s) . To use a concrete example, suppose that the result is
given in Fig. 9.5, for which T (s) is
 s 
1+
ωz
T (s) = T 0 ⎛  2 ⎞   (9.10)
⎜⎜⎜ s s ⎟⎟⎟ s
⎜⎜⎝1 + + ⎟⎟ 1 +
Qω p1. ω p1 ⎠ ω p2

This example appears somewhat complicated. But the loop gains of practical voltage regulators
are often even more complex, and may contain four, five, or more poles. Evaluation of Eqs. (9.5)
354 9 Controller Design

80 dB
|| T ||
60 dB | T0 |dB QdB

fp1
40 dB

20 dB
fz
0 dB
fc fp2
Crossover
frequency

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.5 Magnitude of the loop gain example, Eq. (9.10)

to (9.7), to determine the closed-loop transfer functions, requires quite a bit of work. The loop
gain T must be added to 1, and the resulting numerator and denominator must be refactored.
Using this approach, it is difficult to obtain physical insight into the relationship between the
closed-loop transfer functions and the loop gain. In consequence, design of the feedback loop
to meet specifications is difficult.
Using the algebra-on-the-graph method, the closed-loop transfer functions can be con-
structed by inspection, and hence the relation between these transfer functions and the loop gain
becomes obvious. Let us first investigate how to plot T/(1 + T ). It can be seen from Fig. 9.5
that there is a frequency fc , called the “crossover frequency,” where T  = 1. At frequencies
less than fc , T  > 1; indeed, T  1 for f fc . Hence, at low frequency, (1 + T ) ≈ T , and
T/(1 + T ) ≈ T/T = 1. At frequencies greater than fc , T  < 1, and T  1 for f fc . So at
high frequency, (1 + T ) ≈ 1 and T/(1 + T ) ≈ T/1 = T . So we have

T 1 for T  1
≈ (9.11)
1+T T for T  1
The asymptotes corresponding to Eq. (9.11) are relatively easy to construct. The low-frequency
asymptote, for f < fc , is 1 or 0 dB. The high-frequency asymptotes, for f > fc , follow T . The
result is shown in Fig. 9.6.
So at low frequency, where  T  is large, the reference-to-output transfer function is
v̂(s) 1 T (s) 1
= ≈ (9.12)
v̂re f (s) H(s) 1 + T (s) H(s)
This is the desired behavior, and the feedback loop works well at frequencies where  T  is
large. At high frequency ( f fc ) where  T  is small, the reference-to-output transfer function
is
v̂(s) 1 T (s) T (s) Gc (s)Gvd (s)
= ≈ = (9.13)
v̂re f (s) H(s) 1 + T (s) H(s) VM
9.3 Construction of 1/(1 + T ) and T/(1 + T ) 355

80 dB

60 dB

fp1 || T ||
40 dB

Crossover
20 dB frequency
fz
fc
0 dB
T fp2
1+T

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.6 Graphical construction of the asymptotes of T/(1 + T ). Exact curves are omitted

This is not the desired behavior; in fact, this is the gain with the feedback connection removed
(H → 0). At high frequencies, the feedback loop is unable to reject the disturbance because the
bandwidth of T is limited. The reference-to-output transfer function can be constructed on the
graph by multiplying the T/(1 + T ) asymptotes of Fig. 9.6 by 1/H.
Thus, the crossover frequency fc represents the bandwidth of the feedback system, and
within this bandwidth the closed-loop behavior is improved. Further, it can be observed from
Fig. 9.6 that feedback moves the poles of the system: T contains two poles at frequency f p1 that
are not present in T/(1 + T ), and instead T/(1 + T ) contains a pole at frequency fc . It can be
shown that one of the poles of T is moved from frequency f p1 to approximately fz , where it
cancels the zero. The second pole at f p1 is moved to approximately fc . Figure 9.6 illustrates
how, within the bandwidth of the feedback loop, the frequencies of the poles are increased and
their Q–factors are changed.
We can plot the asymptotes of 1/(1 + T ) using similar arguments. At low frequencies
where T  1, then (1 + T ) ≈ T , and hence 1/(1 + T ) ≈ 1/T At high frequencies where
T  1, then (1 + T ) ≈ 1 and 1/(1 + T ) ≈ 1. So we have
⎧ 1 + +

1 ⎪

⎨ for ++T ++ 1
≈ ⎪ T (s) + + (9.14)
1 + T (s) ⎪ ⎪
⎩1 for ++T ++ 1
The asymptotes for the T (s) example of Fig. 9.5 are plotted in Fig. 9.7.
At low frequencies where  T  is large, the disturbance transfer function from vg to v is
v̂(s) Gvg (s) Gvg (s)
= ≈ (9.15)
v̂g (s) 1 + T (s) T (s)
Again, Gvg (s) is the original transfer function, with no feedback. The closed-loop transfer func-
tion has magnitude reduced by the factor 1/T . So if, for example, we want to reduce this trans-
fer function by a factor of 20 at 120 Hz, then we need a loop gain  T  of at least 20 ⇒ 26 dB
at 120 Hz. The disturbance transfer function from vg to v can be constructed on the graph, by
multiplying the asymptotes of Fig. 9.7 by the asymptotes for Gvg (s).
356 9 Controller Design

80 dB

60 dB | T0 |dB QdB

fp1
40 dB
|| T||

20 dB
fz
0 dB
+ 20 dB/decade fc fp2
fz Crossover
frequency
+ 40 dB/decade

| T0 |dB fp1 1
1+T
QdB

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.7 Graphical construction of 1/(1 + T )

Similar arguments apply to the output impedance. The closed-loop output impedance at low
frequencies is
v̂(s) Zout (s) Zout (s)
= ≈ (9.16)
− îload (s) 1 + T (s) T (s)
The output impedance is also reduced in magnitude by a factor of 1/T  at frequencies below
the crossover frequency.
At high frequencies ( f > fc ) where  T  is small, then 1/(1 + T ) ≈ 1, and
v̂(s) Gvg (s)
= ≈ Gvg (s)
v̂g (s) 1 + T (s)
(9.17)
v̂(s) Zout (s)
= ≈ Zout (s)
−îload (s) 1 + T (s)
This is the same as the original disturbance transfer function and output impedance. So the
feedback loop has essentially no effect on the disturbance transfer functions at frequencies above
the crossover frequency.
Figure 9.8a illustrates an example of a buck converter having a loop gain T (s) given by

T (s) = H(s)Gvd (s)/V M (9.18)

This simple example contains no compensator. The L–C filter of the buck converter introduces
resonant poles at frequency f = f p1 , and the capacitor equivalent series resistance RC leads
to a zero at frequency fz . The feedback sensor block H(s) contains a high-frequency pole at
f = f p2 . Hence, this example exhibits a loop gain T (s) identical to Eq. (9.10); let us assume that
the element values lead to the magnitude plotted in Fig. 9.5. Hence, the quantity 1/(1 + T ) is
given by the plot of Fig. 9.7.
9.3 Construction of 1/(1 + T ) and T/(1 + T ) 357

Fig. 9.8 Construction of the closed-loop output impedance of a simple buck regulator: (a) feedback
system, (b) open-loop (solid line) and closed-loop (dashed line) output impedance asymptotes

We can construct the Bode plot of the open-loop output impedance Zout by setting v̂g and d̂
to zero in Fig. 9.8a and then finding the impedance between the output terminals; the result is:
 
++ ++ 1
Zout (s) = sL + R + RC + (9.19)
sC
The approximate Bode diagram of the open-loop output impedance is constructed in Fig. 9.8b,
for the typical case with RC R. The closed-loop output impedance is next constructed by mul-
tiplying the open-loop output impedance of Fig. 9.8b by the 1/(1 + T ) asymptotes of Fig. 9.7,
with the result illustrated in Fig. 9.8b. At frequencies greater than the crossover frequency fc ,
358 9 Controller Design

the output impedance is unaffected by the feedback loop. At frequencies immediately below
fc , the feedback loop reduces the output impedance and the 1/(1 + T ) term introduces a
+ 20 dB/decade slope to Zout /(1 + T ). At f = fz , the zero of Zout is cancelled by the pole of
1/(1 + T ), and hence no change in slope is observed in the closed-loop output impedance plot.
Likewise, at f = f p1 , the resonant poles of Zout are cancelled by the resonant zeroes of 1/(1 + T ),
and again there is no change in the slope of Zout /(1 + T ). These cancellations occur because
the power stage circuit introduces the same poles into Gvd (s) and Zout (s).
Another example is given later in this chapter, in which a feedback compensator circuit
introduces poles and zeroes into T (s) that are not present in Zout (s). As a result, the closed-
loop output impedance exhibits poles and zeroes induced by the compensator dynamics within
1/(1 + T ).

9.4 Stability

It is well known that adding a feedback loop can cause an otherwise stable system to become
unstable. Even though the transfer functions of the original converter, Eq. (9.1), as well as of
the loop gain T (s), contain no right half-plane poles, it is possible for the closed-loop transfer
functions of Eq. (9.4) to contain right half-plane poles. The feedback loop then fails to regulate
the system at the desired quiescent operating point, and oscillations are usually observed. It is
important to avoid this situation. And even when the feedback system is stable, it is possible
for the transient response to exhibit undesirable ringing and overshoot. The stability problem
is discussed in this section, and a method for ensuring that the feedback system is stable and
well-behaved is explained.
When feedback destabilizes the system, the denominator (1+T (s)) terms in Eq. (9.4) contain
roots in the right half-plane (i.e., with positive real parts). If T (s) is a rational fraction, that is,
the ratio N(s)/D(s) of two polynomial functions N(s) and D(s), then we can write
N(s)
T (s) D(s) N(s)
= =
1 + T (s) N(s) N(s) + D(s)
1+
D(s) (9.20)
1 1 D(s)
= =
1 + T (s) N(s) N(s) + D(s)
1+
D(s)
So T (s)/(1 + T (s)) and 1/(1 + T (s)) contain the same poles, given by the roots of the polynomial
(N(s) + D(s)). A brute-force test for stability is to evaluate (N(s) + D(s)), and factor the result to
see whether any of the roots have positive real parts. However, for all but very simple loop gains,
this involves a great deal of work. A more illuminating method is given by the Nyquist stability
theorem, in which the number of right half-plane roots of (N(s) + D(s)) can be determined
by testing T (s) [82, 83]. This theorem is discussed in Sect. 9.4.2. Often, a special case of the
theorem known as the phase margin test is sufficient for designing most voltage regulators; the
simpler phase margin test is discussed first.
9.4 Stability 359

9.4.1 The Phase Margin Test

The crossover frequency fc is defined as the frequency where the magnitude of the loop gain is
unity:
++ +
+T ( j2π fc ) ++ = 1 ⇒ 0 dB (9.21)

To compute the phase margin ϕm , the phase of the loop gain T is evaluated at the crossover
frequency, and 180◦ is added. Hence,

ϕm = 180◦ + ∠T ( j2π fc ) (9.22)

If there is exactly one crossover frequency, and if the loop gain T (s) contains no right half-plane
poles, then the quantities 1/(1 + T ) and T/(1 + T ) contain no right half-plane poles when
the defined in Eq. (9.22) is positive. Thus, using a simple test on T (s), we can determine the
stability of T/(1 + T ) and 1/(1 + T ). This is an easy-to-use design tool—we simply ensure that
the phase of T is greater than −180◦ at the crossover frequency.
When there are multiple crossover frequencies, the phase margin test may be ambiguous.
Also, when T contains right half-plane poles (i.e., the original open-loop system is unstable),
then the phase margin test cannot be used. In either case, the more general Nyquist stability
theorem (Sect. 9.4.2) must be employed.
The loop gain of a typical stable system is shown in Fig. 9.9. It can be seen that ∠T ( j2π fc ) =
−112◦ . Hence, ϕm = 180◦ − 112◦ = +68◦ . Since the phase margin is positive, T/(1 + T ) and
1/(1 + T ) contain no right half-plane poles, and the feedback system is stable.
The loop gain of an unstable system is sketched in Fig. 9.10. For this example, ∠T ( j2π fc ) =
−230◦ . The phase margin is ϕm = 180◦ − 230◦ = −50◦ . The negative phase margin implies that
T/(1 + T ) and 1/(1 + T ) each contain at least one right half-plane pole.

60 dB
T T T
40 dB
fp1
Crossover
20 dB fz frequency
fc
T
0 dB 0

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.9 Magnitude and phase of the loop gain of a stable system. The phase margin ϕm is positive
360 9 Controller Design

60 dB
T T T
40 dB
fp1
Crossover
20 dB frequency

T fp2 fc
0 dB 0

m (< 0)

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.10 Magnitude and phase of the loop gain of an unstable system. The phase margin ϕm is negative

9.4.2 The Nyquist Stability Criterion

The Nyquist Stability Criterion is a rigorous and general technique to evaluate stability of a
closed-loop system, based on its loop gain. This technique determines the number of poles of
the closed-loop transfer functions T/(1+T ) and 1/(1+T ) that lie in the right half of the complex
s-plane, based on a plot of the loop gain T (s) that can be derived from its Bode plot. The phase
margin test of Sect. 9.4.1 is based on the Nyquist plot, and is a useful but not entirely general
test for stability. In some cases, including several encountered later in this textbook, the more
general Nyquist stability test must be employed.
The Nyquist Stability Criterion is based on the conformal mapping of a contour Γ that
encloses the right half (positive real portion) of the complex s-plane. The contour is mapped
through the loop gain transfer function T (s). Encirclements of the −1 point by the mapped
contour are employed to count the number of right half-plane poles that are present in the
closed-loop transfer functions. The subsections below present a derivation, the precise rules for
application, and some important examples.

The Principle of the Argument

Let us consider a transfer function T (s) having a zero at s = s1 :

T (s) = (s − s1 ) (9.23)

Let us also consider a closed contour Γ in the complex s-plane that encircles the point s1 as
illustrated in Fig. 9.11a. The complex variable s is varied to follow the path Γ, beginning at
some point a and proceeding around the contour in the clockwise direction through points b, c,
and back to a. For the example T (s) of Eq. (9.23), the value of T (s) at some point s is seen to
be the vector extending from s1 to s, having magnitude and phase as illustrated in Fig. 9.11a.
9.4 Stability 361

(a) Im(s) (b) Im(T(s))


Contour T( )
c
s1
a
T T Re(T(s))
T

T
Re(s)

(c) Position along


T
Contour
a b c a
0
s

Fig. 9.11 Principle of the argument, example 1: (a) a closed contour Γ in the complex s plane, (b)
mapping of the contour Γ through the transfer function T (s) of Eq. (9.23), (c) variation of the phase of
T (s), as s varies around the contour Γ

As sketched in Fig. 9.11c, at s = a the phase ∠T is 0◦ . As s varies along the contour, through
b, c, and then back to a, the phase ∠T decreases, and becomes −360◦ after one complete traverse
of contour Γ. This net phase change of −360◦ indicates that the zero at s1 lies inside contour Γ.
Figure 9.11b contains a plot of T (s) as s varies around the contour Γ; the magnitude T 
and phase ∠T are identified and are identical to the quantities identified in Fig. 9.11a. This
plot is a conformal mapping of the contour Γ through the transfer function T (s); conformal
mappings preserve local angles. The mapped contour T (Γ) encircles the origin of the T (s) plane,
as indicated by the net change of −360◦ in ∠T (s).
Figure 9.12a illustrates a second contour Γ  that does not enclose the zero of T (s) at s1 . As
illustrated in Fig. 9.12c, after one complete traverse of contour Γ  , the net change in ∠T is zero.
The mapped contour T (Γ  ) is illustrated in Fig. 9.12b; this contour does not encircle the origin
of the T (s) plane.
The phase of a complex function is sometimes referred to as its argument. Cauchy’s princi-
ple of the argument tells us that when the closed contour Γ encloses the zero s1 , then the phase
∠T (s) exhibits a net change of −360◦ as s traverses Γ once in the clockwise direction. This is
equivalent to saying that the mapped contour T (Γ) encircles the origin of the T plane.
Next let us consider a transfer function T (s) that contains multiple poles and zeroes:
(s − z1 ) (s − z2 ) · · ·
T (s) = T re f (9.24)
(s − p1 ) (s − p2 ) · · ·
As usual, we can express the phase of T (s) as a sum of terms that arise from each zero or pole,
as follows:
362 9 Controller Design

Fig. 9.12 Principle of the argument, example 2: (a) a closed contour Γ  in the complex s plane, (b)
mapping of the contour Γ  through the transfer function T (s) of Eq. (9.23), (c) variation of the phase of
T (s), as s varies around the contour Γ  . Since the zero at s = s1 does not lie inside contour Γ  , there is no
net change in the phase of T , and the mapped contour T (Γ  ) does not encircle the origin of the T plane

∠T (s) = ∠(s − z1 ) + ∠(s − z2 ) + · · · − ∠(s − p1 ) − ∠(s − p2 ) − · · · (9.25)

We can again define a closed contour Γ in the complex s plane, and examine how the phase T (s)
changes as s traverses the contour once in the clockwise direction. Each zero of T (s) that lies
inside the contour will cause a net change of −360◦ in ∠T , and each pole of T (s) lying inside
the contour will cause a net change of +360◦ in ∠T . If a total of Z zeroes and P poles lie inside
the contour Γ, then ∠T will exhibit a net phase shift of −N360◦ , where

N =Z−P (9.26)

The mapped contour T (Γ) will encircle the origin of the T (s) plane N times in the clockwise
direction.
Thus, the principle of the argument provides us with a tool to determine the number of poles
and zeroes that lie inside a contour Γ.

The Nyquist Contour

It is desired to determine whether the closed-loop transfer functions of Eq. (9.20) contain un-
stable poles that lie in the right half of the complex plane. To accomplish this, we can define a
contour Γ that encloses the complete right half-plane, then employ the principle of the argument
to test the number of closed-loop poles that are enclosed by this contour.
9.4 Stability 363

Im(s)

B
A

Fig. 9.13 The Nyquist contour, which encloses the


right half of the complex s plane
Re(s)

Figure 9.13 illustrates a contour Γ called the Nyquist contour. This contour is traversed in
the clockwise direction, and the region enclosed to the right of the contour is the right half of the
complex s plane. The Nyquist contour is comprised of three parts. Segment ΓA is the positive
part of the imaginary axis, in which

s = jω with ω ∈ (0, ∞) (9.27)

Segment ΓB can be chosen to be a semicircular arc that lies to the right of all closed-loop poles,
defined as follows:

s = Re jθ with R→∞ and θ ∈ (+90◦ , −90◦ ) (9.28)

Segment ΓC is the negative part of the imaginary axis, in which

s = − jω with ω ∈ (∞, 0) (9.29)

Segment ΓC is the complex conjugate of segment ΓA .


If a transfer function F(s) contains Z zeroes and P poles in the right half of the complex
plane, then the mapping F(Γ) of the Nyquist contour will encircle the origin of the F(s) plane
N = (Z − P) times.

Stability Test

The closed-loop transfer functions of Eq. (9.20) contain the denominator polynomial N(s)+D(s),
whose roots are the closed-loop poles. It is desired to test whether this polynomial contains roots
in the right half of the complex s-plane. Note from Eq. (9.20) that these roots are the zeroes of
the quantity (1 + T (s)), and additionally that the poles of (1 + T (s)) coincide with the poles
of T (s). Hence we could map the Nyquist contour of Fig. 9.13 through the transfer function
(1 + T (s)), and evaluate the number of encirclements of the origin.
In the complex plane, the quantity (1+T (s)) is simply equal to the quantity T (s) shifted to the
right by one unit. If the mapped Nyquist contour (1+T (Γ)) encircles the origin, then the contour
T (Γ) encircles the −1 point. So one could map the Nyquist contour Γ of Fig. 9.13 through the
loop gain T (s) and count the number of encirclements N of the −1 point by T (Γ). The number of
encirclements N is related to the number of poles in the right half-plane according to N = Z − P,
364 9 Controller Design

where Z is the number of right half-plane poles of the closed-loop gains T/(1 + T ) or 1/(1 + T ),
and P is the number of right half-plane poles present in the original loop gain T (s).
If the original open-loop system is stable, so that T (s) contains no right half-plane poles,
then P = 0. In this common case N = Z: the number of encirclements of the −1 point by T (Γ)
is equal to the number of right half-plane closed-loop poles in T/(1 + T ) or 1/(1 + T ).

A Basic Example

As a first example, let us consider a loop gain T (s) having three poles:
T0
T (s) =     (9.30)
s s s
1+ 1+ 1+
ω1 ω2 ω3
The magnitude and phase Bode plot of T (s) is sketched in Fig. 9.14 for some specific values of
T 0 , ω1 , ω2 , and ω3 . For this example, T (s) exhibits a crossover frequency ωc with phase margin
ϕm as illustrated.
Figure 9.15a illustrates the first part of the Nyquist plot, in which segment ΓA defined by
Eq. (9.27) is mapped through the loop gain. Since s = jω along ΓA , this amounts to a polar
plot of T ( jω) that corresponds to the magnitude and phase data of the Bode plot in Fig. 9.14.
At ω = 0, the loop gain has magnitude T 0 and phase 0◦ , so that the Nyquist plot begins on the
positive real axis at T = T 0 . As ω increases, the magnitude decreases and the phase becomes
negative as illustrated.
At the crossover frequency fc , the loop gain has magnitude 1 and phase (−180◦ + ϕm ). The
contour T ( jω) crosses the unit circle at this point, as illustrated in Fig. 9.15a. At frequencies
above fc the magnitude continues to decrease, and the contour T ( jω) tends towards the origin.
The second portion of the Nyquist contour ΓB is defined by Eq. (9.28). To evaluate how the
loop gain T (s) maps the contour ΓB , we first substitute s = Re jθ into Eq. (9.30):

60 dB
|| T ||
|| T || ∠ T
40 dB
fp1
Crossover
20 dB frequency
fc
0 dB fp2 0

∠ T
fp3
ϕm

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.14 Bode plot of loop gain T (s) for the example of Eq. (9.30)
9.4 Stability 365

(a) Im[T(s)] (b) Im[T(s)]

Unit circle
T(–jω)

f ®¥ f=0
–1 –1
f = fc Re[T(s)] Re[T(s)]

ϕm T(jω) T( jω)

Fig. 9.15 Nyquist plot for the loop gain of Fig. 9.14: (a) mapping of the contour ΓA through the loop
gain T (s), (b) mapping of the complete Nyquist contour through the loop gain T (s)

T0
T (Re jθ ) =  jθ
   (9.31)
Re Re jθ Re jθ
1+ 1+ 1+
ω1 ω2 ω3
Next, we let R → ∞. This causes the denominator of Eq. (9.31) to tend to infinity in magnitude,
which causes the magnitude of T to tend to zero. This portion of the Nyquist plot collapses to
the origin.
The third portion of the Nyquist plot involves mapping the segment ΓC defined by Eq. (9.29)
through the loop gain T (s). This portion of the Nyquist contour is a polar plot of T (− jω), which
is the complex conjugate of T ( jω). Hence this plot is easily sketched by reflecting the T ( jω)
plot about the real axis, as illustrated in Fig. 9.15b.
We can now determine the number of encirclements of the −1 point by T (Γ). Examination
of Fig. 9.15b shows that the −1 point lies outside the contour T (Γ) and hence there are no
encirclements: N = 0. Since the original loop gain T (s) contains no right half-plane poles,
P = 0. According to Eq. (9.26), Z = 0 so the closed-loop transfer functions contain no right
half-plane poles, and the feedback loop is stable.
If the phase margin ϕm identified in Fig. 9.14 had been negative, then the contour T (Γ) would
appear as illustrated in Fig. 9.16. The plot of T ( jω) crosses the unit circle in the third quadrant.
In this case, the Nyquist plot of Fig. 9.16b encircles the −1 point twice: N = 2. Hence Z = 2
and the closed-loop transfer functions contain two RHP poles. The feedback loop is unstable.
For this example, the original T (s) contained three poles in the left half of the complex s-plane;
in the closed-loop transfer function T/(1 + T ), two of these poles have moved into the right
half-plane, while one pole remains in the left half of the complex s-plane.

Example 2: Three Crossover Frequencies

As a second example, let us consider a loop gain having a low-frequency real pole at f = f1 ,
and higher-frequency resonant poles at frequency f = f2 that is just beyond the (first) crossover
frequency:
T0
T (s) =  ⎛  2 ⎞ (9.32)

s ⎜⎜⎜ s s ⎟⎟⎟⎟
1+ ⎜1 + + ⎟
ω ⎝ 1 Qω ω ⎠ 2 2
366 9 Controller Design

(a) Im[T(s)] (b) Im[T(s)]

Unit circle
T(–jω)
f = fc
f ®¥ f=0 –1
Re[T(s)] Re[T(s)]
ϕm
T( jω)

Fig. 9.16 Nyquist plot for an unstable system: (a) mapping of the contour ΓA through the loop gain T (s),
with negative phase margin ϕm , (b) mapping of the complete Nyquist contour through the loop gain T (s)

60 dB
|| T || || T || ∠ T
40 dB f2
f1
20 dB
1 2 3
0 dB 0

∠ T

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.17 Bode plot of loop gain T (s) for the example of Eq. (9.32). The loop gain exhibits three crossover
frequencies

A Bode plot of the loop gain for this case is illustrated in Fig. 9.17. The resonant poles at
f2 cause the magnitude of T increase above 0 dB in the vicinity of f2 . Consequently, there are
three crossover frequencies (designated 1, 2, and 3). We could associate a phase margin with
each crossover frequency; for the plot of Fig. 9.17, the phase margins associated with crossover
frequencies 1 and 2 are positive, while the phase margin associated with crossover frequency 3
is negative. Hence the simple phase margin test is ambiguous, and it is necessary to sketch the
Nyquist plot to correctly determine whether this loop gain leads to a stable system.
Figure 9.18 contains the Nyquist plot corresponding to the Bode plot of Fig. 9.17. Fig-
ure 9.18a contains the mapped contour T (ΓA ) = T ( jω), with crossover points 1, 2, and 3 iden-
tified. Figure 9.18b contains the mapping of the complete Nyquist contour. It can be seen that
9.4 Stability 367

(a) Im[T(s)] (b) Im[T(s)]

Unit circle
T(–jω)

3
f®¥ f=0 –1
Re[T(s)] Re[T(s)]
2
1

T( jω)

Fig. 9.18 Nyquist plot for the example having three crossover frequencies (Fig. 9.17): (a) mapping of
the contour ΓA through the loop gain T (s), (b) mapping of the complete Nyquist contour through the loop
gain T (s)

the −1 point is encircled twice. Hence, the closed-loop transfer functions contain two poles in
the right half of the complex plane, and this feedback system is unstable.

Example 3: Integrator in Feedback Loop

If the Nyquist contour Γ passes through one or more singularities of the loop gain T (s), then the
conformal mapping property is lost, and the arguments of the above sections no longer apply.
This case can occur when the loop gain T (s) contains one or more poles lying on the imaginary
axis. A common example is the use of an integrator in the compensator (see Sect. 9.5.2), leading
to a pole at the origin. An example of a loop gain containing a pole at the origin is:
1
T (s) =     (9.33)
s s s
1+ 1+
ω0 ω1 ω2
The corner frequencies ω0 , ω1 , and ω2 are positive and real in this example. This special case
can be handled by redefining the Nyquist contour of Fig. 9.13 as illustrated in Fig. 9.19. A fourth
segment ΓD is added, to jog the contour around the singularity. Segment ΓD is defined to be a
semicircular arc as follows:

s =  e jθ with →0 and θ ∈ (−90◦ , +90◦ ) (9.34)

The loop gain T (s) of Eq. (9.33) contains no poles inside the modified Nyquist contour of
Fig. 9.19. Hence the number of right half-plane poles of the closed-loop transfer function
T/(1 + T ) is equal to the number of encirclements of the −1 point by the mapped modified
Nyquist contour T (Γ).
The magnitude and phase Bode plot of T (s) is sketched in Fig. 9.20 for some specific values
of ω0 , ω1 , and ω2 . For this example, T (s) exhibits a crossover frequency fc with phase margin
ϕm as illustrated.
Figure 9.21a illustrates the first part of the Nyquist plot, in which segment ΓA is mapped
through the loop gain T (s). Along this segment, s = jω with ω varying from  (→ 0) to ∞.
368 9 Controller Design

Fig. 9.19 Modification of the Nyquist contour to


handle the special case in which the loop gain in-
cludes a pole at the origin. Segment ΓD defined by
Eq. (9.34) routes the Nyquist contour around the pole
at s = 0. The locations of poles of Eq. (9.33) are
marked x

60 dB
|| T ||
|| T || ∠T
40 dB

Crossover
20 dB frequency
fc
0 dB fp1 0˚

∠T –90˚
–20 dB

ϕm fp2
–40 dB –180˚

–270˚

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f
Fig. 9.20 Bode plot of loop gain T (s) for the example of Eq. (9.33)

Segment ΓB is again defined by Eq. (9.28), and this segment again maps to the origin. Seg-
ment ΓC is the complex conjugate of ΓC . The mapping of contours ΓA , ΓB , and ΓC through
the loop gain T (s) is illustrated in Fig. 9.21b. It can be seen that this contour is not closed; to
complete the mapped contour, ΓD must be incorporated.
Substitution of the mapping defined by Eq. (9.34) into the loop gain of Eq. (9.33) leads to:
1
T (e jθ ) =     (9.35)
ejθ
e jθ e jθ
1+ 1+
ω0 ω1 ω2

As  tends to zero, the pole terms associated with the corner frequencies ω1 and ω2 tend to 1.
Equation (9.35) then reduces to
ω0 e− jθ
T (e jθ ) = (9.36)

As  tends to zero, the magnitude of Eq. (9.36) tends to infinity. As θ varies from −90◦ to
+90◦ , the phase of the mapped contour varies from +90◦ to −90◦ . The complete contour is
9.4 Stability 369

Fig. 9.21 Nyquist plot for the example of an integrator in the feedback loop (Fig. 9.20): (a) mapping of
the contour ΓA through the loop gain T (s), (b) mapping of the contours ΓA , ΓB , and ΓC through the loop
gain T (s), (c) mapping of complete modified Nyquist contour

illustrated in Fig. 9.21c. It can be seen that the mapped contour is now closed, and that there
are no encirclements of the −1 point provided that the phase margin is positive. The contour of
Fig. 9.21c represents a stable system.

Summary: Nyquist Stability Criterion

Thus, the Nyquist stability criterion is closely related to the Bode plot of the loop gain. The
segment ΓA corresponds to letting s = jω, and the mapping of ΓA through the loop gain T (s)
constitutes a polar plot of T ( jω). The number of right half-plane poles of the closed-loop trans-
fer functions T/(1 + T ) and 1/(1 + T ) is rigorously discerned via determination of the number of
encirclements of the −1 point by the Nyquist contour mapped through the loop gain T (s). This
explains the origins of the phase margin test, and also provides a stability test for more complex
cases such as loop gains having multiple crossover frequencies.
370 9 Controller Design

9.4.3 The Relationship Between Phase Margin and Closed-Loop Damping Factor

How much phase margin is necessary? Is a worst-case phase margin of 1◦ satisfactory? Of


course, good designs should have adequate design margins, but there is another important reason
why additional phase margin is needed. A small phase margin (in T ) causes the closed-loop
transfer functions T/(1 + T ) and 1/(1 + T ) to exhibit resonant poles with high Q in the vicinity
of the crossover frequency. The system transient response exhibits overshoot and ringing. As
the phase margin is reduced these characteristics become worse (higher Q, longer ringing) until,
for ϕm ≤ 0◦ , the system becomes unstable.
Let us consider a loop gain T (s) which is well-approximated, in the vicinity of the crossover
frequency, by the following function:
1
T (s) =    (9.37)
s s
1+
ω0 ω2

Magnitude and phase asymptotes are plotted in Fig. 9.22. This function is a good approximation
near the crossover frequency for many common loop gains, in which  T  approaches unity gain
with a −20 dB/decade slope, with an additional pole at frequency f2 = ω2 /2π. Any additional
poles and zeroes are assumed to be sufficiently far above or below the crossover frequency, such
that they have negligible effect on the system transfer functions near the crossover frequency.
Note that, as f2 → ∞, the phase margin ϕm approaches 90◦ . As f2 → 0, ϕm → 0◦ . So as f2
is reduced, the phase margin is also reduced. Let’s investigate how this affects the closed-loop
response via T/(1 + T ). We can write
T (s) 1 1
= = (9.38)
1 + T (s) 1 s s2
1+ 1+ +
T (s) ω0 ω0 ω2

40 dB || T || f0
T
|| T || f
20 dB
f0
0 dB
f2 f0 f2
f2
0

T f2 /10
f2
m

10f2

Fig. 9.22 Magnitude and phase asymptotes for the loop gain T of Eq. (9.37)
9.4 Stability 371

using Eq. (9.37). By putting this into the standard normalized quadratic form, one obtains
T (s) 1
=  2 (9.39)
1 + T (s) s s
1+ +
Qωc ωc
where

ωc = ω0 ω2 = 2π fc

ω0 ω0
Q= =
ωc ω2
So the closed-loop response contains quadratic poles at fc , the geometric mean of f0 and f2 .
These poles have a low Q-factor when f0 f2 . In this case, we can use the low-Q approxima-
tion to estimate their frequencies:
Qωc = ω0 (9.40)
ωc
= ω2
Q
Magnitude asymptotes are plotted in Fig. 9.23 for this case. It can be seen that these asymptotes
conform to the rules of Sect. 9.3 for constructing T/(1 + T ) by the algebra-on-the-graph method.
Next consider the high-Q case. When the pole frequency f2 is reduced, reducing the phase
margin, then the Q-factor given by Eq. (9.39) is increased. For Q > 0.5, resonant poles occur at
frequency fc . The magnitude Bode plot for the case f2 < f0 is given in Fig. 9.24. The frequency
fc continues to be the geometric mean of f2 and f0 , and fc now coincides with the crossover
(unity-gain) frequency of the  T  asymptotes. The exact value of the closed-loop gain T/(1+T )
at frequency fc is equal to Q = f0 / fc . As shown in Fig. 9.24, this is identical to the value of the
low-frequency −20 dB/decade asymptote ( f0 / f ), evaluated at frequency fc . It can be seen that
the Q-factor becomes very large as the pole frequency f2 is reduced.
The asymptotes of Fig. 9.24 also follow the algebra-on-the-graph rules of Sect. 9.3, but the
deviation of the exact curve from the asymptotes is not predicted by the algebra-on-the-graph
method.

40 dB || T || f0
f
20 dB
fc = f0 f2
0 dB
T f0 Q = 0f / cf
1+T
f2

f0 f2
f2

Fig. 9.23 Construction of magnitude asymptotes of the closed-loop transfer function T/(1 + T ), for the
low-Q case
372 9 Controller Design

60 dB f0
|| T || f
40 dB

20 dB f2
Q = f0 /fc
0 dB
T fc = f0 f2 f0
1+T
f0 f2
f2

Fig. 9.24 Construction of magnitude asymptotes of the closed-loop transfer function T/(1 + T ), for the
high-Q case

These two poles with Q-factor appear in both T/(1 + T ) and 1/(1 + T ). We need an easy way
to predict the Q-factor. We can obtain such a relationship by finding the frequency at which the
magnitude of T is exactly equal to unity. We then evaluate the exact phase of T at this frequency,
and compute the phase margin. This phase margin is a function of the ratio f0 / f2 , or Q2 . We can
then solve to find Q as a function of the phase margin. The result is

cos ϕm
Q=
sin ϕm
  (9.41)
−1 1 + 1 + 4Q4
ϕm = tan
2Q4

This function is plotted in Fig. 9.25, with Q expressed in dB. It can be seen that obtaining real
poles (Q < 0.5) requires a phase margin of at least 76◦ . To obtain Q = 1, a phase margin of 52◦
is needed. The system with a phase margin of 1◦ exhibits a closed-loop response with very high
Q! With a small phase margin, T ( jω) is very nearly equal to −1 in the vicinity of the crossover
frequency. The denominator (1 + T ) then becomes very small, causing the closed-loop transfer
functions to exhibit a peaked response at frequencies near the crossover frequency fc .
Figure 9.25 is the result for the simple loop gain defined by Eq. (9.37). However, this loop
gain is a good approximation for many other loop gains that are encountered in practice, in
which  T  approaches unity gain with a −20 dB/decade slope, with an additional pole at fre-
quency f2 . If all other poles and zeroes of T (s) are sufficiently far above or below the crossover
frequency, then they have negligible effect on the system transfer functions near the crossover
frequency, and Fig. 9.25 gives a good approximation for the relationship between ϕm and Q.
Another common case is the one in which  T  approaches unity gain with a −40 dB/decade
slope, with an additional zero at frequency f2 . As f2 is increased, the phase margin is decreased
and Q is increased. It can be shown that the relation between ϕm and Q is exactly the same, Eq.
(9.41).
9.4 Stability 373

20 dB
Q
15 dB

10 dB

5 dB

0 dB Q=1 0 dB
m
= 52
Q = 0.5

m
= 76

0° 10° 20° 30° 40° 50° 60° 70° 80° 90°


m

Fig. 9.25 Relationship between loop-gain phase margin ϕm and closed-loop peaking factor Q

A case where Fig. 9.25 fails is when the loop gain T (s) contains three or more poles at or
near the crossover frequency. The closed-loop response then also contains three or more poles
near the crossover frequency, and these poles cannot be completely characterized by a single
Q-factor. Additional work is required to find the behavior of the exact T/(1 + T ) and 1/(1 + T )
near the crossover frequency, but nonetheless it can be said that a small phase margin leads to a
peaked closed-loop response.

9.4.4 Transient Response vs. Damping Factor

One can solve for the unit-step response of the T/(1 + T ) transfer function, by multiplying
Eq. (9.39) by 1/s and then taking the inverse Laplace transform. The result for Q > 0.5 is
⎡ ⎤
2Qe−ωc t/2Q ⎢⎢⎢ 4Q2 − 1  ⎥⎥
v̂(t) = 1 +  sin ⎢⎣ ⎢ ωc t + tan −1
4Q − 1 ⎥⎥⎥⎦
2 (9.42)
4Q − 1
2 2Q

For Q < 0.5, the result is


ω2 ω1
v̂(t) = 1 − e−ω1 t − e−ω2 t (9.43)
ω2 − ω1 ω1 − ω2
with
ωc   
ω1 , ω2 = 1 ± 1 − 4Q2 (9.44)
2Q
These equations are plotted in Fig. 9.26 for various values of Q.
374 9 Controller Design

Fig. 9.26 Unit-step response of the second-order system, Eqs. (9.42) and (9.43), for various values of Q

According to Eq. (9.39), when f2 > 4 f0 , the Q-factor is less than 0.5, and the closed-loop
response contains a low-frequency and a high-frequency real pole. The transient response in
this case, Eq. (9.43), contains decaying-exponential functions of time, of the form

Ae(pole)t (9.45)

This is called the “overdamped” case. With very low Q, the low-frequency pole leads to a slow
step response.
For f2 = 4 f0 , the Q-factor is equal to 0.5. The closed-loop response contains two real poles
at frequency 2 f0 . This is called the “critically damped” case. The transient response is faster
than in the overdamped case, because the lowest-frequency pole is at a higher frequency. This is
the fastest response that does not exhibit overshoot. At ωc t = π radians (t = 1/2 fc ), the voltage
has reached 82% of its final value. At ωc t = 2π radians (t = 1/ fc ), the voltage has reached
98.6% of its final value.
For f2 < 4 f0 , the Q-factor is greater than 0.5. The closed-loop response contains complex
poles, and the transient response exhibits sinusoidal-type waveforms with decaying amplitude,
Eq. (9.42). The rise time of the step response is faster than in the critically damped case, but the
waveforms exhibit overshoot. The peak value of v(t) is

peak v̂(t) = 1 + e−π/ 4Q −1
2
(9.46)
9.4 Stability 375

This is called the “underdamped” case. A Q-factor of 1 leads to an overshoot of 16.3%, while
a Q-factor of 2 leads to a 44.4% overshoot. Large Q-factors lead to overshoots approaching
100%.
The exact transient response of the feedback loop may differ from the plots of Fig. 9.26,
because of additional poles and zeroes in T , and because of differences in initial conditions.
Nonetheless, Fig. 9.26 illustrates how high-Q poles lead to overshoot and ringing. In most power
applications, overshoot is unacceptable. For example, in a 3.3 V computer power supply, the
voltage must not be allowed to overshoot to 5 or 6 volts when the supply is turned on—this
would likely destroy all of the integrated circuits in the computer! So the Q-factor must be
sufficiently low, often 0.5 or less, corresponding to a phase margin of at least 76◦ .

9.4.5 Load Step Response vs. Damping Factor

Usually we also are interested in the response of the output voltage to a step change in load cur-
rent. Let us consider the case where the closed-loop output impedance can be well approximated
by a second-order function of the form
 
sR0
ωc
Zout (s) =  2 (9.47)
s s
1+ +
Qωc ωc

This constitutes an effective parallel R − L − C impedance having characteristic impedance R0 ,


resonant frequency fc , and Q-factor Q. Also consider that the load current takes a step change
of magnitude I0 , with the following Laplace transform:
I0
îload = (9.48)
s
One can multiply Eqs. (9.47) and (9.48), and then invert the Laplace transform to derive an
expression for the output voltage response v̂(t). For Q < 0.5, the result is:
I0 R0 Q  −ω1 t 
v̂(t) = −  e − e−ω2 t (9.49)
1 − 4Q2

with ω1 and ω2 defined as in Eq. (9.44). For the high-Q case Q > 0.5, the result is:
⎛ ⎞
I0 R0 2Q −ωc t/2Q ⎜⎜⎜ 4Q2 − 1 ⎟⎟
v̂(t) = −  e sin ⎜⎝ ⎜ ωc t⎟⎟⎟⎠ (9.50)
4Q2 − 1 2Q

These equations are plotted in Fig. 9.27 for various values of Q and for I0 R0 = 1. For non-unity
I0 R0 , the curves can be multiplied by I0 R0 : the peak deviation in v̂(t) is proportional to the
magnitude of the current step I0 multiplied by the characteristic impedance R0 . For Q < 0.5, the
peak voltage deviation has magnitude slightly less than I0 R0 Q. At Q = 0.5, the peak voltage
deviation is approximately −0.368 I0 R0 . As Q → ∞, the peak voltage deviation tends to −I0 R0 .
376 9 Controller Design

1
Q = 50
Q = 10
0.5 Q=4
Q=2
Q = 0.05 Q=1
0

Q = 0.1
Q = 0.2
-0.5 Q = 0.3
Q = 0.5
Q = 0.75
-1
0 5 10 15
ct

Fig. 9.27 Response of the second-order system to a unit step change in load current, Eqs. (9.49)
and (9.50), for various values of Q. These curves are plotted for I0 R0 = 1

9.5 Regulator Design


Let’s now consider how to design a regulator system, to meet specifications or design goals re-
garding rejection of disturbances, transient response, and stability. Typical dc regulator designs
are defined using specifications such as the following:
1. Effect of load current variations on the output voltage regulation. The output voltage must
remain within a specified range when the load current varies in a prescribed way. This
amounts to a limit on the maximum magnitude of the closed-loop output impedance of
Eq. (9.6), repeated below

v̂(s)  Zout (s)
 v̂ =0 = (9.51)
− îload (s) g 1 + T (s)
v̂re f =0

If, over some frequency range, the open-loop output impedance Zout has magnitude that
exceeds the limit, then the loop gain T must be sufficiently large in magnitude over the
same frequency range, such that the magnitude of the closed-loop output impedance given
in Eq. (9.51) is less than the given limit.
2. Effect of input voltage variations (for example, at the second harmonic of the ac line fre-
quency) on the output voltage regulation. Specific maximum limits are usually placed on
the amplitude of variations in the output voltage at the second harmonic of the ac line fre-
quency (120 Hz or 100 Hz). If we know the magnitude of the rectification voltage ripple
which appears at the converter input (as v̂g ), then we can calculate the resulting output volt-
age ripple (in v̂) using the closed loop line-to-output transfer function of Eq. (9.5), repeated
below
9.5 Regulator Design 377

v̂(s)  Gvg (s)
 v̂ =0 = (9.52)
v̂g (s) re f 1 + T (s)
îload =0

The output voltage ripple can be reduced by increasing the magnitude of the loop gain at
the ripple frequency. In a typical good design,  T  is 20 dB or more at 120 Hz, so that the
transfer function of Eq. (9.52) is at least an order of magnitude smaller than the open-loop
line-to-output transfer function  Gvg .
3. Transient response time. When a specified large disturbance occurs, such as a large step
change in load current or input voltage, the output voltage may undergo a transient. Dur-
ing this transient, the output voltage typically deviates from its specified allowable range.
Eventually, the feedback loop operates to return the output voltage within tolerance. The
time required to do so is the transient response time; typically, the response time can be
shortened by increasing the feedback loop crossover frequency.
4. Overshoot and ringing. As discussed in Sect. 9.4.4, the amount of overshoot and ringing
allowed in the transient response may be limited. Such a specification implies that the phase
margin must be sufficiently large.
Each of these requirements imposes constraints on the loop gain T (s). Therefore, the design
of the control system involves modifying the loop gain. As illustrated in Fig. 9.2, a compensator
network is added for this purpose. Several well-known strategies for design of the compensator
transfer function Gc (s) are discussed below.

9.5.1 Lead (P D) compensator

This type of compensator transfer function is used to improve the phase margin. A zero is added
to the loop gain, at a frequency fz sufficiently far below the crossover frequency fc , such that
the phase margin of T (s) is increased by the desired amount. The lead compensator is also
called a proportional-plus-derivative, or PD, controller—at high frequencies, the zero causes
the compensator to differentiate the error signal. It often finds application in systems originally
containing a two-pole response. By use of this type of compensator, the bandwidth of the feed-
back loop (i.e., the crossover frequency fc ) can be extended while maintaining an acceptable
phase margin.
A side effect of the zero is that it causes the compensator gain to increase with frequency,
with a +20 dB/decade slope. So steps must be taken to ensure that  T  remains equal to unity
at the desired crossover frequency. Also, since the gain of any practical amplifier must tend to
zero at high frequency, the compensator transfer function Gc (s) must contain high-frequency
poles. These poles also have the beneficial effect of attenuating high-frequency noise. Of partic-
ular concern are the switching frequency harmonics present in the output voltage and feedback
signals. If the compensator gain at the switching frequency is too great, then these switching
harmonics are amplified by the compensator, and can disrupt the operation of the pulse-width
modulator (see Sect. 7.3). So the compensator network should contain poles at a frequency less
than the switching frequency. These considerations typically restrict the crossover frequency
fc to be less than approximately 10% of the converter switching frequency f s . In addition, the
circuit designer must take care not to exceed the gain-bandwidth limits of available operational
amplifiers.
378 9 Controller Design

fp
Gc0
fz fp
||Gc|| Gc0
f max
fz
= fz fp

fp /10 10fz
+ 45 /decade
fz /10
0 /decade
Gc

Fig. 9.28 Magnitude and phase asymptotes of the PD compensator transfer function Gc of Eq. (9.53)

The transfer function of the lead compensator therefore contains a low-frequency zero and
several high-frequency poles. A simplified example containing a single high-frequency pole is
given in Eq. (9.53) and illustrated in Fig. 9.28.
 
s
1+
ωz
Gc (s) = Gc0   (9.53)
s
1+
ωp

The maximum phase occurs at a frequency fϕmax given by the geometrical mean of the pole and
zero frequencies:
,
fϕ max = fz f p (9.54)

To obtain the maximum improvement in phase margin, we should design our compensator so
that the frequency fϕmax coincides with the loop gain crossover frequency fc . The value of the
phase at this frequency can be shown to be
⎛   ⎞
  ⎜⎜ 1 f fz ⎟⎟⎟⎟⎟
−1 ⎜⎜ 1
∠Gc fϕ max = tan ⎜⎜⎜⎝
p
− ⎟ (9.55)
2 fz 2 f p ⎟⎠

This equation is plotted in Fig. 9.29. Equation (9.55) can be inverted to obtain
f p 1 + sin(θ)
= (9.56)
fz 1 − sin(θ)
where θ = ∠Gc ( fϕmax ). Equations (9.55) and (9.53) imply that, to optimally obtain a compen-
sator phase lead of θ at frequency fc , the pole and zero frequencies should be chosen as follows:
9.5 Regulator Design 379

Maximum 90
phase lead
75

60

45

30

15

0
1 10 100 1000
fp / fz

Fig. 9.29 Maximum phase lead θ vs. frequency ratio f p / fz for the lead compensator


1 − sin(θ)
fz = fc
1 + sin(θ)
 (9.57)
1 + sin(θ)
f p = fc
1 − sin(θ)

When it is desired to avoid changing the crossover frequency, the magnitude of the compen-
sator gain is chosen to be unity at the loop gain crossover frequency fc . This requires that Gc0
be chosen according to the following formula:

fz
Gc0 = (9.58)
fp

It can be seen that Gc0 is less than unity, and therefore the lead compensator reduces the dc
gain of the feedback loop. Other choices of Gc0 can be selected when it is desired to shift the
crossover frequency fc ; for example, increasing the value of Gc0 causes the crossover frequency
to increase. If the frequencies f p and fz are chosen as in Eq. (9.57), then fϕmax of Eq. (9.53) will
coincide with the new crossover frequency fc .
The Bode diagram of a typical loop gain T (s) containing two poles is illustrated in Fig. 9.30.
The phase margin of the original T (s) is small, since the crossover frequency fc is substantially
greater than the pole frequency f0 . The result of adding a lead compensator is also illustrated.
The lead compensator of this example is designed to maintain the same crossover frequency but
improve the phase margin.
380 9 Controller Design

60 dB
T0
40 dB || T || T0 Gc0 Original gain
|| T || T
20 dB
Compensated gain f0

0 dB fz
fc
fp
Compensated phase asymptotes
0
0
T
Original phase asymptotes

Fig. 9.30 Compensation of a loop gain containing two poles, using a lead (PD) compensator. The phase
margin ϕm is improved

9.5.2 Lag (PI) Compensator


This type of compensator is used to increase the low-frequency loop gain, such that the output
is better regulated at dc and at frequencies well below the loop crossover frequency. As given
in Eq. (9.59) and illustrated in Fig. 9.31, an inverted zero is added to the loop gain, at frequency
fL .
 ωL 
Gc (s) = Gc∞ 1 + (9.59)
s
If fL is sufficiently lower than the loop crossover frequency fc , then the phase margin is un-
changed. This type of compensator is also called a proportional-plus-integral, or PI, controller.
At low frequencies, the inverted zero causes the compensator to integrate the error signal.
To the extent that the compensator gain can be made arbitrarily large at dc, the dc loop gain
T (0) becomes arbitrarily large. This causes the dc component of the error signal to approach
zero. In consequence, the steady-state output voltage is perfectly regulated, and the disturbance-
to-output transfer functions approach zero at dc. Such behavior is easily obtained in practice,
with the compensator of Eq. (9.59) realized using a conventional operational amplifier.
Although the PI compensator is useful in nearly all types of feedback systems, it is an
especially simple and effective approach for systems originally containing a single pole. For the
example of Fig. 9.32, the original uncompensated loop gain is of the form
T u0
T u (s) =   (9.60)
s
1+
ω0
The compensator transfer function of Eq. (9.59) is used, so that the compensated loop gain is
T (s) = T u (s) Gc (s). Magnitude and phase asymptotes of T (s) are also illustrated in Fig. 9.32.
The compensator high-frequency gain Gc∞ is chosen to obtain the desired crossover frequency
9.5 Regulator Design 381

|| Gc ||
Gc
fL

10fL 0
Gc
+ 45 /decade
fL /10

Fig. 9.31 Magnitude and phase asymptotes of the PI compensator transfer function Gc of Eq. (9.59)

|| T ||
40 dB
Gc Tu0
20 dB fL f0
|| Tu|| Tu0 fc
0 dB
f0
90

Tu
0
10fL

T 10f0
m

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.32 Compensation of a loop gain containing a single pole, using a lag (PI) compensator. The loop
gain magnitude is increased

fc . If we approximate the compensated loop gain by its high-frequency asymptote, then at high
frequencies we can write
++ ++ T u0Gc∞
+T + ≈   (9.61)
f
f0
At the crossover frequency f = fc , the loop gain has unity magnitude. Equation (9.61) predicts
that the crossover frequency is
fc ≈ T u0Gc∞ f0 (9.62)
382 9 Controller Design

40 dB
|| T ||
Gc T u 0
20 dB fL f0
fc
0 dB

fL f0
1 1
1+T G c T u0

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.33 Construction of 1/(1 + T ), for the PI-compensated example of Fig. 9.32

Hence, to obtain a desired crossover frequency fc , we should choose the compensator gain Gc∞
as follows:
fc
Gc∞ = (9.63)
T u0 f0
The corner frequency fL is then chosen to be sufficiently less than fc , such that an adequate
phase margin is maintained.
Magnitude asymptotes of the quantity 1/(1 + T (s)) are constructed in Fig. 9.33. At frequen-
cies less than fL , the PI compensator improves the rejection of disturbances. At dc, where the
magnitude of Gc approaches infinity, the magnitude of 1/(1+T ) tends to zero. Hence, the closed-
loop disturbance-to-output transfer functions, such as Eqs. (9.51) and (9.52), tend to zero at dc.

9.5.3 Combined (PID) Compensator

The advantages of the lead and lag compensators can be combined, to obtain both wide band-
width and zero steady-state error. At low frequencies, the compensator integrates the error sig-
nal, leading to large low-frequency loop gain and accurate regulation of the low-frequency com-
ponents of the output voltage. At high frequency (in the vicinity of the crossover frequency),
the compensator introduces phase lead into the loop gain, improving the phase margin. Such a
compensator is sometimes called a PID controller.
A typical Bode diagram of a practical version of this compensator is illustrated in Fig. 9.34.
The compensator has transfer function
  
ωL  s
1+ 1+
s ωz
Gc (s) = Gcm    (9.64)
s s
1+ 1+
ω p1 ω p2

The inverted zero at frequency fL functions in the same manner as the PI compensator. The
zero at frequency fz adds phase lead in the vicinity of the crossover frequency, as in the PD
9.5 Regulator Design 383

40 dB
|| Gc|| || Gc|| Gc
20 dB fp1 fp2
Gcm fc
0 dB
fL fz

10 fL 10 fz f /10 90
45 /decade p2

0
fp1 /10
/decade
90 /decade
fz /10 10fp1
Gc fL /10

Fig. 9.34 Magnitude and phase asymptotes of the combined (PID) compensator transfer function Gc of
Eq. (9.64)

compensator. The high-frequency poles at frequencies f p1 and f p2 must be present in practical


compensators, to cause the gain to roll off at high frequencies and to prevent the switching ripple
from disrupting the operation of the pulse-width modulator. The loop gain crossover frequency
fc is chosen to be greater than fL and fz , but less than f p1 and f p2 .

9.5.4 Design Example


To illustrate the design of PI and PD compensators, let us consider the design of a combined
PID compensator for the dc–dc buck converter system of Fig. 9.35. The input voltage vg (t) for
this system has nominal value 28 V. It is desired to supply a regulated 15 V to a 5 A load. The
load is modeled here with a 3 Ω resistor. An accurate 5 V reference is available.
The first step is to select the feedback gain H(s). The gain H is chosen such that the regulator
produces a regulated 15 V dc output. Let us assume that we will succeed in designing a good
feedback system, which causes the output voltage to accurately follow the reference voltage.
This is accomplished via a large loop gain T , which leads to a small error voltage: ve ≈ 0.
Hence, Hv ≈ vre f So we should choose
Vre f 5 1
H= = = (9.65)
V 15 3
The quiescent duty cycle is given by the steady-state solution of the converter:
V 15
D= = = 0.536 (9.66)
Vg 28
The quiescent value of the control voltage, Vc , must satisfy Eq. (7.85). Hence,
Vc = DV M = 2.14 V (9.67)
Thus, the quiescent conditions of the system are known. It remains to design the compensator
gain Gc (s).
384 9 Controller Design

L
50 μH
+
iload
vg(t) + C R
v(t)
28 V 500 μF 3
Sensor
H(s) gain
fs = 100 kHz
Transistor Error
gate driver signal
Pulse-width vc G (s) ve Hv
modulator c +
VM = 4 V Compensator vref
5V

Fig. 9.35 Design example

Fig. 9.36 System small-signal ac model, design example

A small-signal ac model of the regulator system is illustrated in Fig. 9.36. The buck con-
verter ac model is represented in canonical form. Disturbances in the input voltage and in the
load current are modeled. For generality, reference voltage variations v̂re f are included in the
diagram; in a dc voltage regulator, these variations are normally zero.
9.5 Regulator Design 385

The open-loop converter transfer functions are discussed in the previous chapters. The open-
loop control-to-output transfer function is
V 1
Gvd (s) = (9.68)
D L
1 + s + s2 LC
R
The open-loop control-to-output transfer function contains two poles, and can be written in the
following normalized form:
1
Gvd (s) = Gd0  2 (9.69)
s s
1+ +
Q0 ω0 ω0
By equating like coefficients in Eqs. (9.68) and (9.69), one finds that the dc gain, corner fre-
quency, and Q-factor are given by
V
Gd0 = = 28 V
D
ω0 1
f0 = = √ = 1 kHz (9.70)
2π 2π LC

C
Q0 = R = 9.5 ⇒ 19.5 dB
L
In practice, parasitic loss elements, such as the capacitor equivalent series resistance (esr),
would cause a lower Q-factor to be observed. Figure 9.37 contains a Bode diagram of Gvd (s).

40 dB

|| T || Q0 = 9.5 19.5 dB
T0 = 8.6 18.7 dB
20 dB
f0
0 dB fz
1 fc
1+T 1/T0 = 0.12
fp
Q0

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.37 Converter small-signal control-to-output transfer function Gvd , design example
386 9 Controller Design

The open-loop line-to-output transfer function is


1
Gvg (s) = D (9.71)
L
1 + s + s2 LC
R
This transfer function contains the same poles as in Gvd (s), and can be written in the normalized
form
1
Gvg (s) = Gg0  2 (9.72)
s s
1+ +
Q0 ω0 ω0
with Gg0 = D. The open-loop output impedance of the buck converter is
++ 1 ++ sL
Zout (s) = R ++ ++ sL = (9.73)
sC L
1 + s + s2 LC
R
Use of these equations to represent the converter in block-diagram form leads to the com-
plete system block diagram of Fig. 9.38. The loop gain of the system is
 
1
T (s) = Gc (s) Gvd (s)H(s) (9.74)
VM
Substitution of Eq. (9.69) into (9.74) leads to
 
Gc (s)H(s)  V  1
T (s) = ⎛  2 ⎞ (9.75)
VM D ⎜⎜⎜ ⎟
⎜⎜⎝1 + s + s ⎟⎟⎟⎟⎠
Q0 ω0 ω0

The closed-loop disturbance-to-output transfer functions are given by Eqs. (9.5) and (9.6).

Fig. 9.38 System block diagram, design example


9.5 Regulator Design 387

40 dB
|| Tu || Tu
20 dB || Tu || Q0 = 9.5 19.5 dB
Tu0 2.33 7.4 dB

0 dB f0
1 kHz

1
0 10 2Q f0 = 900 Hz
0
Tu

1
10 2Q f0 = 1.1 kHz

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.39 Uncompensated loop gain T u , design example

The uncompensated loop gain T u (s), with unity compensator gain, is sketched in Fig. 9.39.
With Gc (s) = 1, Eq. (9.75) can be written
1
T u (s) = T u0  2 (9.76)
s s
1+ +
Q0 ω0 ω0
where the dc gain is
HV
T u0 == 2.33 ⇒ 7.4 dB (9.77)
DV M
The uncompensated loop gain has a crossover frequency of approximately 1.8 kHz, with a
phase margin of less than five degrees.
Let us design a compensator, to attain a crossover frequency of fc = 5 kHz, or one twentieth
of the switching frequency. From Fig. 9.39, the uncompensated loop gain has a magnitude at
5 kHz of approximately T u0 ( f0 / fc )2 = 0.093 ⇒ −20.6 dB. So to obtain unity loop gain at 5 kHz,
our compensator should have a 5 kHz gain of +20.6 dB. In addition, the compensator should
improve the phase margin, since the phase of the uncompensated loop gain is nearly −180◦ at
5 kHz. So a lead (PD) compensator is needed. Let us (somewhat arbitrarily) choose to design for
a phase margin of 52◦ . According to Fig. 9.25, this choice leads to closed-loop poles having a Q-
factor of 1. The unit step response, Fig. 9.26, then exhibits a peak overshoot of 16%. Evaluation
of Eq. (9.57), with fc = 5 kHz and θ = 52◦ , leads to the following compensator pole and zero
frequencies:

1 − sin(52◦ )
fz = (5 kHz) = 1.7 kHz (9.78)
1 + sin(52◦ )

1 + sin(52◦ )
f p = (5 kHz) = 14.5 kHz
1 − sin(52◦ )
388 9 Controller Design

40 dB
|| Gc || fp Gc
Gc0
fz fp
20 dB || G c || Gc0
fc
0 dB
fz = fz fp

fp /10 10 fz 90
fz /10
0
0
Gc

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.40 PD compensator transfer function Gc , design example

To obtain a compensator gain of 20.6 dB ⇒ 10.7 at 5 kHz, the low-frequency compensator gain
must be
 2 
fc 1 fz
Gc0 = = 3.7 ⇒ 11.3 dB (9.79)
f0 T u0 fp
A Bode diagram of the PD compensator magnitude and phase is sketched in Fig. 9.40.
With this PD controller, the loop gain becomes
 
s
1+
ωz
T (s) = T u0Gc0   ⎛  2 ⎞ (9.80)

s ⎜⎜⎜ s s ⎟⎟⎟⎟
1+ ⎜⎝1 + + ⎟
ωp Q0 ω0 ω0 ⎠

The compensated loop gain is sketched in Fig. 9.41. It can be seen that the phase of T (s) is
approximately equal to 52◦ over the frequency range of 1.4 kHz to 17 kHz. Hence variations
in component values, which cause the crossover frequency to deviate somewhat from 5 kHz,
should have little impact on the phase margin. In addition, it can be seen from Fig. 9.41 that the
loop gain has a dc magnitude of T u0Gc0 ⇒ 18.7 dB.
Asymptotes of the quantity 1/(1 + T ) are constructed in Fig. 9.42. This quantity has a dc
asymptote of −18.7 dB. Therefore, at frequencies less than 1 kHz, the feedback loop attenu-
ates output voltage disturbances by 18.7 dB. For example, suppose that the input voltage vg (t)
contains a 100 Hz variation of amplitude 1 V. With no feedback loop, this disturbance would
propagate to the output according to the open-loop transfer function Gvg (s), given in Eq. (9.72).
9.5 Regulator Design 389

40 dB
|| T || T
|| T || T0 = 8.6 18.7 dB Q0 = 9.5 19.5 dB
20 dB
f0
0 dB 1 kHz fz
1.7 kHz fc
5 kHz fp
900 Hz 14 kHz
0
0
T 170 Hz

1.4 kHz 17 kHz

1.1 kHz m=52

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.41 The compensated loop gain of Eq. (9.80)

40 dB
Q0 = 9.5 19.5 dB
20 dB
|| T || T0 = 8.6 18.7 dB
f0
0 dB fz
1 fc
1+T 1/T0 = 0.12
fp
Q0

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.42 Construction of 1/(1 + T ) for the PD-compensated design example of Fig. 9.41

At 100 Hz, this transfer function has a gain essentially equal to the dc asymptote D = 0.536.
Therefore, with no feedback loop, a 100 Hz variation of amplitude 0.536 V would be observed
at the output. In the presence of feedback, the closed-loop line-to-output transfer function of Eq.
(9.5) is obtained; for our example, this attenuates the 100 Hz variation by an additional factor of
18.7 dB ⇒ 8.6. The 100 Hz output voltage variation now has magnitude 0.536/8.6 = 0.062 V.
390 9 Controller Design

40 dB
|| Gc || || Gc || Gc
20 dB fp
Gcm fc
0 dB
fL fz

10 fL 10fz 90
45 /decade /dec
0
fp /10
Gc 90 /decade
fz /10
fL /10

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.43 PID compensator transfer function, Eq. (9.81)

The low-frequency regulation can be further improved by addition of an inverted zero, as


discussed in Sect. 9.5.2. A PID controller, as in Sect. 9.5.3, is then obtained. The compensator
transfer function becomes  
s  ωL 
1+ 1+
ωz s
Gc (s) = Gcm   (9.81)
s
1+
ωp
The Bode diagram of this compensator gain is illustrated in Fig. 9.43. The pole and zero frequen-
cies fz and f p are unchanged, and are given by Eq. (9.78). The midband gain Gcm is chosen to be
the same as the previous Gc0 , Eq. (9.79). Hence, for frequencies greater than fL , the magnitude
of the loop gain is unchanged by the inverted zero. The loop continues to exhibit a crossover
frequency of 5 kHz.
So that the inverted zero does not significantly degrade the phase margin, let us (somewhat
arbitrarily) choose fL to be one-tenth of the crossover frequency, or 500 Hz. The inverted zero
will then increase the loop gain at frequencies below 500 Hz, improving the low-frequency regu-
lation of the output voltage. The loop gain of Fig. 9.44 is obtained. The magnitude of the quantity
1/(1 + T ) is also constructed. It can be seen that the inverted zero at 500 Hz causes the magni-
tude of 1/(1 + T) at 100 Hz to be reduced by a factor of approximately (100 Hz)/(500 Hz) = 1/5.
The total attenuation of 1/(1 + T ) at 100 Hz is −32.7 dB. A 1 V, 100 Hz variation in vg (t) would
now induce a 12 mV variation in v(t). Further improvements could be obtained by increasing
fL ; however, this would require redesign of the PD portion of the compensator to maintain an
adequate phase margin.
The line-to-output transfer function is constructed in Fig. 9.45. Both the open-loop transfer
function Gvg (s), Eq. (9.72), and the closed-loop transfer function Gvg (s)/(1 + T (s)), are con-
structed using the algebra-on-the-graph method. The two transfer functions coincide at frequen-
cies greater than the crossover frequency. At frequencies less than the crossover frequency fc ,
9.5 Regulator Design 391

60 dB

40 dB || T ||
Q0
20 dB
fL f0
0 dB fz
fc
fp
1 Q0
1+T

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.44 Construction of T  and 1/(1 + T ) with the PID compensator of Fig. 9.43

20 dB

0 dB Gvg(0) = D Q0

Open-loop || Gvg || f0
D
T u0G cm
fL fz
fc
20 dB/decade

G vg
Closed-loop
1 +T

1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz


f

Fig. 9.45 Comparison of open-loop line-to-output transfer function Gvg and the closed-loop line-to-
output transfer function of Eq. (9.82)

the closed-loop transfer function is reduced by a factor of T (s). It can be seen that the poles
of Gvg (s) are cancelled by zeroes of 1/(1 + T ). Hence the closed-loop line-to-output transfer
function is approximately
Gvg (s) D 1
≈      (9.82)
(1 + T (s)) T u0Gcm ωL s s
1+ 1+ 1+
s ωz ωc
392 9 Controller Design

So the algebra-on-the-graph method allows simple approximate disturbance-to-output closed-


loop transfer functions to be written. Armed with such an analytical expression, the system
designer can easily compute the output disturbances, and can gain the insight required to shape
the loop gain T (s) such that system specifications are met. Computer simulations can then
be used to judge whether the specifications are met under all operating conditions, and over
expected ranges of component parameter values. Results of computer simulations of the design
example described in this section can be found in Sect. 15.4.2.

9.6 Measurement of Loop Gains


It is a good engineering practice to measure the loop gains of prototype feedback systems. The
objective of such an exercise is to verify that the system has been correctly modeled. If so, then
provided that a good controller design has been implemented, then the system behavior will
meet expectations regarding transient overshoot (and phase margin), rejection of disturbances,
dc output voltage regulation, etc. Unfortunately, there are reasons why practical system proto-
types are likely to differ from theoretical models. Phenomena may occur that were not accounted
for in the original model, and that significantly influence the system behavior. Noise and elec-
tromagnetic interference (EMI) can be present, which cause the system transfer functions to
deviate in unexpected ways.
So let us consider the measurement of the loop gain T (s) of the feedback system of Fig. 9.46.
We will make measurements at some point A, where two blocks of the network are connected
electrically. In Fig. 9.46, the output port of block 1 is represented by a Thevenin-equivalent net-
work, composed of the dependent voltage source G1 v̂e and output impedance Z1 . Block 1 is
loaded by the input impedance Z2 of block 2. The remainder of the feedback system is repre-
sented by a block diagram as shown. The loop gain of the system is
 
Z2 (s)
T (s) = G1 (s) G2 (s)H(s) (9.83)
Z1 (s) + Z2 (s)
Measurement of this loop gain presents several challenges not present in other frequency
response measurements.

Fig. 9.46 It is desired to determine the loop gain T (s) experimentally, by making measurements at point A
9.6 Measurement of Loop Gains 393

Fig. 9.47 Measurement of loop gain by breaking the loop

In principle, one could break the loop at point A, and attempt to measure T (s) using the
transfer function measurement method of the previous chapter. As illustrated in Fig. 9.47, a dc
supply voltage VCC and potentiometer would be used, to establish a dc bias in the voltage v x ,
such that all of the elements of the network operate at the correct quiescent point. Ac voltage
variations in vz (t) are coupled into the injection point via a dc blocking capacitor. Any other
independent ac inputs to the system are disabled. A network analyzer is used to measure the
relative magnitudes and phases of the ac components of the voltages vy (t) and v x (t):

v̂y (s) 
T m (s) =  (9.84)
v̂ x (s) v̂re f =0
v̂g =0

The measured gain T m (s) differs from the actual gain T (s) because, by breaking the connection
between blocks 1 and 2 at the measurement point, we have removed the loading of block 2 on
block 1. Solution of Fig. 9.47 for the measured gain T m (s) leads to
T m (s) = G1 (s)G2 (s)H(s) (9.85)
Equations (9.83) and (9.85) can be combined to express T m (s) in terms of T (s):
 
Z1 (s)
T m (s) = T (s) 1 + (9.86)
Z2 (s)
Hence,
T m (s) ≈ T (s) provided that Z2  Z1  (9.87)
So to obtain an accurate measurement, we need to find an injection point where loading is
negligible over the range of frequencies to be measured.
Other difficulties are encountered when using the method of Fig. 9.47. The most serious
problem is adjustment of the dc bias using a potentiometer. The dc loop gain is typically very
large, especially when a PI controller is used. A small change in the dc component of v x (t) can
therefore lead to very large changes in the dc biases of some elements in the system. So it is
difficult to establish the correct dc conditions in the circuit. The dc gains may drift during the
experiment, making the problem even worse, and saturation of the error amplifier is a common
complaint. Also, we have seen that the gains of the converter can be a function of the quiescent
operating point; significant deviation from the correct operating point can cause the measured
gain to differ from the loop gain of actual operating conditions.
394 9 Controller Design

9.6.1 Voltage Injection

An approach that avoids the dc biasing problem [84] is illustrated in Fig. 9.48. The voltage
source vz (t) is injected between blocks 1 and 2, without breaking the feedback loop. Ac vari-
ations in vz (t) again excite variations in the feedback system, but dc bias conditions are deter-
mined by the circuit. Indeed, if vz (t) contains no dc component, then the biasing circuits of the
system itself establish the quiescent operating point. Hence, the loop gain measurement is made
at the actual system operating point.
The injection source is modeled in Fig. 9.48 by a Thevenin equivalent network, containing
an independent voltage source with source impedance Z s (s). The magnitudes of vz and Z s are
irrelevant in the determination of the loop gain. However, the injection of vz does disrupt the
loading of block 2 on block 1. Hence, a suitable injection point must be found, where the loading
effect is negligible.
To measure the loop gain by voltage injection, we connect a network analyzer to measure
the transfer function from v̂ x to v̂y . The system independent ac inputs are set to zero, and the
network analyzer sweeps the injection voltage v̂z (t) over the intended frequency range. The
measured gain is 
v̂y (s) 
T v (s) =  (9.88)
v̂ x (s) v̂re f =0
v̂g =0

Let us solve Fig. 9.48, to compare the measured gain T v (s) with the actual loop gain T (s)
given by (9.83). The error signal is

v̂e (s) = −H(s)G2 (s)v̂ x (s) (9.89)

The voltage v̂y can be written

− v̂y (s) = G1 (s)v̂e (s) − î(s)Z1 (s) (9.90)

where î(s)Z1 (s) is the voltage drop across the source impedance Z1 . Substitution of Eq. (9.89)
into (9.90) leads to
− v̂y (s) = −v̂ x (s)G2 (s)H(s)G1 (s) − î(s)Z1 (s) (9.91)

Fig. 9.48 Measurement of loop gain by voltage injection


9.6 Measurement of Loop Gains 395

But î(s) is
v̂ x (s)
î(s) = (9.92)
Z2 (s)
Therefore, Eq. (9.91) becomes
 
Z1 (s)
v̂y (s) = v̂ x (s) G1 (s)G2 (s)H(s) + (9.93)
Z2 (s)
Substitution of Eq. (9.93) into (9.88) leads to the following expression for the measured gain
T v (s):
Z1 (s)
T v (s) = G1 (s)G2 (s)H(s) + (9.94)
Z2 (s)
Equations (9.83) and (9.94) can be combined to determine the measured gain T v (s) in terms of
the actual loop gain T (s):  
Z1 (s) Z1 (s)
T v (s) = T (s) 1 + + (9.95)
Z2 (s) Z2 (s)
Thus, T v (s) can be expressed as the sum of two terms. The first term is proportional to the actual
loop gain T (s), and is approximately equal to T (s) whenever  Z1   Z2 . The second term
is not proportional to T (s), and limits the minimum T (s) that can be measured with the voltage
injection technique. If Z1 /Z2 is much smaller in magnitude than T (s), then the second term can
be ignored, and T v (s) ≈ T (s). At frequencies where T (s) is smaller in magnitude than Z1 /Z2 ,
the measured data must be discarded. Thus,

T v (s) ≈ T (s) (9.96)

provided
(i) Z1 (s) Z2 (s)
and ++ +
(ii) T (s) ++ Z1 (s) +++
+ Z2 (s) +
Again, note that the value of the injection source impedance Z s is irrelevant.
As an example, consider voltage injection at the output of an operational amplifier, having
a 50 Ω output impedance, which drives a 500 Ω effective load. The system in the vicinity of the
injection point is illustrated in Fig. 9.49. So Z1 (s) = 50 Ω and Z2 (s) = 500 Ω. The ratio Z1 /Z2
is 0.1, or −20 dB. Let us further suppose that the actual loop gain T (s) contains poles at 10 Hz
and 100 kHz, with a dc gain of 80 dB. The actual loop gain magnitude is illustrated in Fig. 9.50.
Voltage injection would result in measurement of T v (s) given in Eq. (9.95). Note that
 
Z1 (s)
1+ = 1.1 ⇒ 0.83 dB (9.97)
Z2 (s)
Hence, for large  T , the measured T v  deviates from the actual loop gain by less than 1 dB.
However, at high frequency where  T  is less than −20 dB, the measured gain differs sig-
nificantly. Apparently, T v (s) contains two high-frequency zeroes that are not present in T (s).
Depending on the Q-factor of these zeroes, the phase of T v at the crossover frequency could be
influenced. To ensure that the phase margin is correctly measured, it is important that Z1 /Z2 be
sufficiently small in magnitude.
396 9 Controller Design

Block 1 Block 2
v̂z
50

+
+

+ v̂x (s) 500


v̂y (s)

Fig. 9.49 Voltage injection example

100 dB

80 dB

60 dB || Tv ||
|| T ||
40 dB

20 dB

0 dB Z1
Z2 || Tv ||

|| T ||
10 Hz 100 Hz 1 kHz 10 kHz 100 kHz 1 MHz
f

Fig. 9.50 Comparison of measured loop gain T v and actual loop gain T , voltage injection example. The
measured gain deviates at high frequency

9.6.2 Current Injection

The results of the preceding paragraphs can also be obtained in dual form, where the loop gain
is measured by current injection [84]. As illustrated in Fig. 9.51, we can model block 1 and the
analyzer injection source by their Norton equivalents, and use current probes to measure î x and
îy . The gain measured by current injection is

îy (s) 
T i (s) =  (9.98)
i x (s) v̂re f =0
v̂g =0
9.6 Measurement of Loop Gains 397

Fig. 9.51 Measurement of loop gain by current injection

Fig. 9.52 Current injection using Thevenin-equivalent source

It can be shown that  


Z2 (s) Z2 (s)
T i (s) = T (s) 1 + + (9.99)
Z1 (s) Z1 (s)
Hence,
T i (s) ≈ T (s) provided
(i)  Z2 (s)   Z1 (s) , and (9.100)
++ +
(ii) T (s) ++ 2 (s) +++
Z
+ Z1 (s) +

So to obtain an accurate measurement of the loop gain by current injection, we must find a
point in the network where block 2 has sufficiently small input impedance. Again, note that the
injection source impedance Z s does not affect the measurement. In fact, we can realize iz by
use of a Thevenin-equivalent source, as illustrated in Fig. 9.52. The network analyzer injection
source is represented by voltage source v̂z and output resistance R s . A series capacitor, Cb , is
inserted to avoid disrupting the dc bias at the injection point.

9.6.3 Measurement of Unstable Systems

When the prototype feedback system is unstable, we are even more eager to measure the loop
gain—to find out what went wrong. But measurements cannot be made while the system oscil-
398 9 Controller Design

Fig. 9.53 Measurement of an unstable loop gain by voltage injection

lates. We need to stabilize the system, yet measure the original unstable loop gain. It is possible
to do this by recognizing that the injection source impedance Z s does not influence the measured
loop gain [84]. As illustrated in Fig. 9.53, we can even add additional resistance Rext , effectively
increasing the source impedance Z s . The measured loop gain T v (s) is unaffected.
Adding series impedance generally lowers the loop gain of a system, leading to a lower
crossover frequency and a more positive phase margin. Hence, it is usually possible to add a
resistor Rext that is sufficiently large to stabilize the system. The gain T v (s), Eq. (9.88), continues
to be approximately equal to the original unstable loop gain, according to Eq. (9.96). To avoid
disturbing the dc bias conditions, it may be necessary to bypass Rext with inductor Lext . If the
inductance value is sufficiently large, then it will not influence the stability of the modified
system.

9.7 Summary of Key Points


1. Negative feedback causes the system output to closely follow the reference input, according
to the gain 1/H(s). The influence on the output of disturbances and variation of gains in the
forward path is reduced.
2. The loop gain T (s) is equal to the products of the gains in the forward and feedback paths.
The loop gain is a measure of how well the feedback system works: a large loop gain leads
to better regulation of the output. The crossover frequency fc is the frequency at which the
loop gain T has unity magnitude, and is a measure of the bandwidth of the control system.
3. The introduction of feedback causes the transfer functions from disturbances to the out-
put to be multiplied by the factor 1/(1 + T (s)). At frequencies where T is large in mag-
nitude (i.e., below the crossover frequency), this factor is approximately equal to 1/T (s).
Hence, the influence of low-frequency disturbances on the output is reduced by a factor of
1/T (s). At frequencies where T is small in magnitude (i.e., above the crossover frequency),
the factor is approximately equal to 1. The feedback loop then has no effect. Closed-loop
disturbance-to-output transfer functions, such as the line-to-output transfer function or the
output impedance, can easily be constructed using the algebra-on-the-graph method.
4. Stability can be assessed using the phase margin test. The phase of T is evaluated at the
crossover frequency, and the stability of the important closed-loop quantities T/(1 + T ) and
1/(1 + T ) is then deduced. Inadequate phase margin leads to ringing and overshoot in the
system transient response, and peaking in the closed-loop transfer functions.
9.7 Summary of Key Points 399

5. Compensators are added in the forward paths of feedback loops to shape the loop gain, such
that desired performance is obtained. Lead compensators, or PD controllers, are added to
improve the phase margin and extend the control system bandwidth. PI controllers are
used to increase the low-frequency loop gain, to improve the rejection of low-frequency
disturbances and reduce the steady-state error.
6. Loop gains can be experimentally measured by use of voltage or current injection. This
approach avoids the problem of establishing the correct quiescent operating conditions in
the system, a common difficulty in systems having a large dc loop gain. An injection point
must be found where interstage loading is not significant. Unstable loop gains can also be
measured.

Problems
9.1 Derive both forms of Eq. (9.41).
9.2 The flyback converter system of Fig. 9.54 contains a feedback loop for regulation of the
main output voltage v1 . An auxiliary output produces voltage v2 . The dc input voltage vg
lies in the range 280 V ≤ vg ≤ 380 V. The compensator network has transfer function
 ω1 
Gc (s) = Gc∞ 1 +
s
where Gc∞ = 0.05, and f1 = ω1 /2π = 400 Hz.
(a) What is the steady-state value of the error voltage ve (t)? Explain your reasoning.
(b) Determine the steady-state value of the main output voltage v1 .
(c) Estimate the steady-state value of the auxiliary output voltage v2 .

64 : 3
+
C1 R1
L = 600 μH v1
220 μF 5

vg +
:1
+
C2 R2
v2
100 μF 2
H(s)
fs = 200 kHz
Isolated H(s) = 0.2
transistor
gate driver
Pulse-width vc G (s) ve
modulator c +
V =4V Compensator
M
Reference v = 3 V
input ref

Fig. 9.54 Flyback converter system of Problem 9.2


400 9 Controller Design

9.3 In the boost converter system of Fig. 9.55, all elements are ideal. The compensator has
gain Gc (s) = 250/s.

Boost converter
L
+
100 μH

vg + R
C v
48 V 12
33 μF
H(s)

Transistor fs = 200 kHz H(s) = 1


T(s) 24
gate driver
Pulse-width vc G (s) ve
modulator c +
V =4V Compensator
M
v
Reference ref
input 5V

Fig. 9.55 Boost converter system of Problem 9.3

(a) Construct the Bode plot of the loop gain T (s) magnitude and phase. Label values of
all corner frequencies and Q-factors, as appropriate.
(b) Determine the crossover frequency and phase margin.
(c) Construct the Bode diagram of the magnitude of 1/(1 + T ), using the algebra-on-the-
graph method. Label values of all corner frequencies and Q-factors, as appropriate.
(d) Construct the Bode diagram of the magnitude of the closed-loop line-to-output trans-
fer function. Label values of all corner frequencies and Q-factors, as appropriate.
9.4 A certain inverter system has the following loop gain
 
s
1+
ωz
T (s) = T 0    
s s s
1+ 1+ 1+
ω1 ω2 ω3
and the following open-loop line-to-output transfer function
1
Gvg (s) = Gg0   
s s
1+ 1+
ω1 ω3
where
T 0 = 100 ω1 = 500 rad/ sec
ω2 = 1000 rad/ sec ω3 = 24000 rad/ sec
ωz = 4000 rad/ sec Gg0 = 0.5
The gain of the feedback connection is H(s) = 0.1.
9.7 Summary of Key Points 401

(a) Sketch the magnitude and phase asymptotes of the loop gain T (s). Determine numer-
ical values of the crossover frequency in Hz and phase margin in degrees.
(b) Construct the magnitude asymptotes of the closed-loop line-to-output transfer func-
tion. Label important features.
(c) Construct the magnitude asymptotes of the closed-loop transfer function from the
reference voltage to the output voltage. Label important features.
9.5 The forward converter system of Fig. 9.56a is constructed with the element values shown.
The quiescent value of the input voltage is Vg = 380 V. The transformer has turns ratio
n1 /n3 = 4.5. The duty cycle produced by the pulse-width modulator is restricted to the
range 0 ≤ d(t) ≤ 0.5. Within this range, d(t) follows the control voltage vc (t) according to
1 vc (t)
d(t) =
2 VM
with V M = 3 V.
(a) Determine the quiescent values of: the duty cycle D, the output voltage V, and the
control voltage Vc .

(a) n1 : n1 : n3 L

500 μH +

C R v(t)
10 μF 7
vg(t) +

fs = 150 kHz
T(s)
C1 R3 R1
13 nF 5.6 k 81.8 k
Isolated
transistor
gate driver R2
Pulse-width vc 18.2 k
modulator +
vref
5.1 V

(b) v

H(s)

vc vref
Gc (s) + Gr (s)

Fig. 9.56 Forward converter system of Problem 9.5: (a) system diagram, (b) modeling the op amp circuit
using a block diagram
402 9 Controller Design

(b) The op-amp circuit and feedback connection can be modeled using the block diagram
illustrated in Fig. 9.56b, with H(s) = R2 /(R1 + R2 ). Determine the transfer functions
Gc (s) and Gr (s).
(c) Sketch a block diagram which models the small-signal ac variations of the complete
system, and determine the transfer function of each block. Hint: the transformer mag-
netizing inductance has negligible influence on the converter dynamics, and can be
ignored. The small-signal models of the forward and buck converters are similar.
(d) Construct a Bode plot of the loop gain magnitude and phase. What is the crossover
frequency? What is the phase margin?
(e) Construct the Bode plot of the closed-loop line-to-output transfer function magnitude
++ ++
++ v̂ ++
++ ++
v̂g
Label important features. What is the gain at 120 Hz? At what frequency do distur-
bances in vg have the greatest influence on the output voltage?
9.6 In the voltage regulator system of Fig. 9.56, described in Problem 9.5, the input voltage
vg (t) contains a 120 Hz variation of peak amplitude 10 V.
(a) What is the amplitude of the resulting 120 Hz variation in v(t)?
(b) Modify the compensator network such that the 120 Hz output voltage variation has
peak amplitude less than 25 mV. Your modification should leave the dc output voltage
unchanged, and should result in a crossover frequency no greater than 10 kHz.
9.7 Design of a boost converter with current feedback and a PI compensator. In some appli-
cations, it is desired to control the converter input terminal current waveform. The boost
converter system of Fig. 9.57 contains a feedback loop which causes the converter input
current ig (t) to be proportional to a reference voltage vre f (t). The feedback connection is a
current sense circuit having gain H(s) = 0.2 volts per ampere. A conventional pulse width
modulator circuit (Fig. 7.29) is employed, having a sawtooth waveform with peak–peak
amplitude of V M = 3 V. The quiescent values of the inputs are: Vg = 120 V, Vre f = 2 V.
All elements are ideal.

ig L

400 μH +

vg + C v R ig
10 μ!F 120
H(s)

Transistor fs = 100 kHz


T(s)
gate driver
Pulse-width vc G (s) ve
modulator c +
H(s) ig(s)
V =3V Compensator
M

Reference
input vref

Fig. 9.57 Boost converter system with current feedback, Problem 9.7
9.7 Summary of Key Points 403

(a) Determine the quiescent values D, V, and Ig .


(b) Determine the small-signal transfer function
îg (s)
Gid (s) =
d̂(s)
(c) Sketch the magnitude and phase asymptotes of the uncompensated (Gc (s) = 1) loop
gain.
(d) It is desired to obtain a loop gain magnitude of at least 35 dB at 120 Hz, while main-
taining a phase margin of at least 72◦ . The crossover frequency should be no greater
than f s /10 = 10 kHz. Design a PI compensator that accomplishes this. Sketch the
magnitude and phase asymptotes of the resulting loop gain, and label important fea-
tures.
(e) For your design of part (d), sketch the magnitude of the closed-loop transfer function
îg (s)
v̂re f (s)
Label important features.
9.8 Design of a buck regulator to meet closed-loop output impedance specifications. The buck
converter with control system illustrated in Fig. 9.58 is to be designed to meet the follow-
ing specifications. The closed-loop output impedance should be less than 0.2 Ω over the
entire frequency range 0 to 20 kHz. To ensure that the transient response is well-behaved,
the poles of the closed-loop transfer functions, in the vicinity of the crossover frequency,
should have Q-factors no greater than unity. The quiescent load current ILOAD can vary
from 5 A to 50 A, and the above specifications must be met for every value of ILOAD in
this range. For simplicity, you may assume that the input voltage vg does not vary. The
loop gain crossover frequency fc may be chosen to be no greater than f s /10, or 10 kHz.
You may also assume that all elements are ideal. The pulse-width modulator circuit obeys
Eq. (7.85).

1 mH +
iload

+ C Zout
vg v Rload
200 μF
100 V
H(s)
fs = 100 kHz H(s) = 0.1
Transistor
gate driver
Pulse-width vc G (s) ve Hv
modulator c +
V =4V Compensator
M vref
5V

Fig. 9.58 Buck regulator system, Problem 9.8


404 9 Controller Design

(a) What is the intended dc output voltage V? Over what range does the effective load
resistance RLOAD vary?
(b) Construct the magnitude asymptotes of the open-loop output impedance Zout (s). Over
what range of frequencies is the output impedance specification not met? Hence, de-
duce how large the minimum loop gain T (s) must be in magnitude, such that the
closed-loop output impedance meets the specification. Choose a suitable crossover
frequency fc .
(c) Design a compensator network Gc (s) such that all specifications are met. Additionally,
the dc loop gain T (s) should be at least 20 dB. Specify the following:
(i) Your choice for the transfer function Gc (s)
(ii) The worst-case closed-loop Q
(iii) Bode plots of the loop gain T (s) and the closed-loop output impedance, for load
currents of 5 A and 50 A. What effect does variation of RLOAD have on the closed-
loop behavior of your design?
(d) Design a circuit using resistors, capacitors, and an op amp to realize your compensator
transfer function Gc (s).
9.9 Design of a buck–boost voltage regulator. The buck–boost converter of Fig. 9.59 operates
in the continuous conduction mode, with the element values shown. The nominal input
voltage is Vg = 48 V, and it is desired to regulate the output voltage at −15 V. Design the
best compensator that you can, which has high crossover frequency (but no greater than
10% of the switching frequency), large loop gain over the bandwidth of the feedback loop,
and phase margin of at least 52◦ .
(a) Specify the required value of H. Sketch Bode plots of the uncompensated loop gain
magnitude and phase, as well as the magnitude and phase of your proposed compen-
sator transfer function Gc (s). Label the important features of your plots.
(b) Construct Bode diagrams of the magnitude and phase of your compensated loop gain
T (s), and also of the magnitude of the quantities T/(1 + T ) and 1/(1 + T ).
(c) Discuss your design. What prevents you from further increasing the crossover fre-
quency? How large is the loop gain at 120 Hz? Can you obtain more loop gain at
120 Hz?

+ L C R
vg v
50 μH 220 μF 5

H(s)
fs = 200 kHz
Transistor
gate driver
Pulse-width vc G (s) ve ++ Hv
modulator c

V =3V Compensator
M vref
5V

Fig. 9.59 Buck–boost voltage regulator system, Problem 9.9


9.7 Summary of Key Points 405

(a) v̂z

+
1k 1k

G1 (s) v̂e (s) + v̂y (s) v̂x (s) 10 k 2 nF

(b) 60 dB
|| Tv ||

40 dB

20 dB

0 dB

Tv 90

100 Hz 1 kHz 10 kHz 100 kHz 1 MHz


f

Fig. 9.60 Experimental measurement of loop gain, Problem 9.10: (a) measurement via voltage injection,
(b) measured data

9.10 The loop gain of a certain feedback system is measured, using voltage injection at a point
in the forward path of the loop as illustrated in Fig. 9.60a. The data in Fig. 9.60b is obtained.
What is T (s)? Specify T (s) in factored pole-zero form, and give numerical values for
all important features. Over what range of frequencies does the measurement give valid
results?

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