Memory Access Methods

These are 4 types of memory access methods:

1. Sequential Access:-

In this method, the memory is accessed in a specific linear sequential manner, like accessing
in a single Linked List. The access time depends on the location of the data.

Applications of this sequential memory access are magnetic tapes, magnetic disk and optical
memories.

2. Random Access: In this method, any location of the memory can be accessed randomly
like accessing in Array. Physical locations are independent in this access method.

Applications of this random memory access are RAM and ROM.

3. Direct Access: In this method, individual blocks or records have a unique address based
on physical location. access is accomplished by direct access to reach a general vicinity plus
sequential searching, counting or waiting to reach the final destination. This method is a
combination of above two access methods. The access time depends on both the memory
organization and characteristics of storage technology. The access is semi-random or direct.
Application of thus direct memory access is magnetic hard disk, read/write header.

4. Associate Access: In this memory, a word is accessed rather than its address. This
access method is a special type of random access method. Application of thus Associate
memory access is Cache memory.

Design and Implementation Issue of Distributed Shared Memory

DSM is a mechanism that manages memory across multiple nodes and makes inter-
process communications transparent to end-users. To design information shared
memory we might deal with certain issues which are called issues.
Issues to Design and Implementation of DSM:
 Granularity
 Structure of shared memory space
 Memory coherence and access synchronization
 Data location and access
 Replacement strategy
 Thrashing
 Heterogeneity
1. Granularity: Granularity refers to the block size of a DSM system. Granularity
refers to the unit of sharing and the unit of data moving across the network when a
network block shortcoming then we can utilize the estimation of the block size as
words/phrases. The block size might be different for the various networks.
[Link] of shared memory space: Structure refers to the design of the shared
data in the memory. The structure of the shared memory space of a DSM system is
regularly dependent on the sort of applications that the DSM system is intended to
support.
3. Memory coherence and access synchronization: In the DSM system the shared
data things ought to be accessible by different nodes simultaneously in the network.
The fundamental issue in this system is data irregularity. The data irregularity might be
raised by the synchronous access. To solve this problem in the DSM system we need
to utilize some synchronization primitives, semaphores, event count, and so on.
4. Data location and access: To share the data in the DSM system it ought to be
possible to locate and retrieve the data as accessed by clients or processors.
Therefore the DSM system must implement some form of data block finding system to
serve network data to meet the requirement of the memory coherence semantics
being utilized.
5. Replacement strategy: In the local memory of the node is full, a cache miss at the
node implies not just a get of the gotten to information block from a remote node but
also a replacement. A data block of the local memory should be replaced by the new
data block. Accordingly, a position substitution methodology is additionally vital in the
design of a DSM system.
6. Thrashing: In a DSM system data blocks move between nodes on demand. In this
way on the off chance that 2 nodes compete for write access to the single data item.
The data relating data block might be moved to back and forth at such a high rate that
no genuine work can get gone. The DSM system should utilize an approach to keep
away from a situation generally known as thrashing.
7. Heterogeneity: The DSM system worked for homogeneous systems and need not
address the heterogeneity issue. In any case, assuming the underlined system
environment is heterogeneous, the DSM system should be designed to deal with
heterogeneous, so it works appropriately with machines having different architectures.

Symmetric Multiprocessing

Most computer systems are single processor systems but multiprocessor systems are
increasing in importance nowadays. These systems have multiple processors working in
parallel that share the computer clock, memory, bus, peripheral devices etc.
There are mainly two types of multiprocessor systems. These are −

 Symmetric Multiprocessor System

 Asymmetric Multiprocessor System
In symmetric multiprocessing, multiple processors share a common memory and operating
system. All of these processors work in tandem to execute processes. The operating system
treats all the processors equally, and no processor is reserved for special purposes.
Features of Symmetric Multiprocessing (SMP)
Some of the key points about symmetric multiprocessing are explained with the help of the
following diagram −
Let us see the points one by one −

 Symmetric multiprocessing is also known as tightly coupled multiprocessing as all the

CPU’s are connected at the bus level and have access to a shared memory.
 All the parallel processors in symmetric multiprocessing have their private cache memory
to decrease system bus traffic and also reduce the data access time.
 Symmetric multiprocessing systems allow a processor to execute any process no matter
where its data is located in memory. The only stipulation is that a process should not be
executing on two or more processors at the same time.
 In general, the symmetric multiprocessing system does not exceed 16 processors as this
amount can be comfortably handled by the operating system.
Uses of Symmetric Multiprocessing
Some of the uses of symmetric multiprocessing are as follows −

 Symmetric multiprocessing is useful for time sharing systems as these have multiple
processes running in parallel. So, these processes can be scheduled on parallel
processors using symmetric multiprocessing.
 Symmetric processing is not that useful in personal computers unless multithreaded
programming is taken into account. The multiple threads can be scheduled on the parallel
processors.
 Time sharing systems that use multithreading programming can also make use of
symmetric multiprogramming.
Advantages of Symmetric Multiprocessing
Some advantages of symmetric multiprocessing are −
  The throughput of the system is increased in symmetric multiprocessing. As there are
multiple processors, more processes are executed.
 Symmetric multiprocessing systems are much more reliable than single processor
systems. Even if a processor fails, the system still endures. Only its efficiency is
decreased a little.
Disadvantages of Symmetric Multiprocessing
Some disadvantages of symmetric multiprocessing are −

 The operating system handles all the processors in symmetric multiprocessing system.
This leads to a complicated operating system that is difficult to design and manage.
 All the processors in symmetric multiprocessing system are connected to the same main
memory. So a large main memory is required to accommodate all these processors.

What is Vector Processing

Vector processing is a central processing unit that can perform the complete vector input in
individual instruction. It is a complete unit of hardware resources that implements a sequential
set of similar data elements in the memory using individual instruction.
The scientific and research computations involve many computations which require extensive
and high-power computers. These computations when run in a conventional computer may
take days or weeks to complete. The science and engineering problems can be specified in
methods of vectors and matrices using vector processing.
Features of Vector Processing
There are various features of Vector Processing which are as follows −
 A vector is a structured set of elements. The elements in a vector are scalar quantities. A
vector operand includes an ordered set of n elements, where n is known as the length of
the vector.
 Each clock period processes two successive pairs of elements. During one single clock
period, the dual vector pipes and the dual sets of vector functional units allow the
processing of two pairs of elements.
As the completion of each pair of operations takes place, the results are delivered to
appropriate elements of the result register. The operation continues just before the
various elements processed are similar to the count particularized by the vector length
register.
 In parallel vector processing, more than two results are generated per clock cycle. The
parallel vector operations are automatically started under the following two circumstances
−
o When successive vector instructions facilitate different functional units and multiple
vector registers.
o When successive vector instructions use the resulting flow from one vector register
as the operand of another operation utilizing a different functional unit. This phase
is known as chaining.
 A vector processor implements better with higher vectors because of the foundation delay
in a pipeline.
  Vector processing decrease the overhead related to maintenance of the loop-control
variables which creates it more efficient than scalar processing.

What is Pipelining?

ipelining is the process of accumulating instruction from the

processor through a pipeline. It allows storing and executing
instructions in an orderly process. It is also known as pipeline
processing.

Before moving forward with pipelining, check these topics out to

understand the concept better :

 Memory Organization
 Memory Mapping and Virtual Memory
 Parallel Processing

Pipelining is a technique where multiple instructions are

overlapped during execution. Pipeline is divided into stages and
these stages are connected with one another to form a pipe like
structure. Instructions enter from one end and exit from another
end.

Pipelining increases the overall instruction throughput.

In pipeline system, each segment consists of an input register

followed by a combinational circuit. The register is used to hold
data and combinational circuit performs operations on it. The
output of combinational circuit is applied to the input register of
the next segment.
Pipeline system is like the modern day assembly line setup in
factories. For example in a car manufacturing industry, huge
assembly lines are setup and at each point, there are robotic
arms to perform a certain task, and then the car moves on ahead
to the next arm.

Types of Pipeline

It is divided into 2 categories:

1. Arithmetic Pipeline
2. Instruction Pipeline

Arithmetic Pipeline

Arithmetic pipelines are usually found in most of the computers.

They are used for floating point operations, multiplication of fixed
point numbers etc. For example: The input to the Floating Point
Adder pipeline is:

X = A*2^a

Y = B*2^b
Here A and B are mantissas (significant digit of floating point
numbers), while a and b are exponents.

The floating point addition and subtraction is done in 4 parts:

1. Compare the exponents.

2. Align the mantissas.
3. Add or subtract mantissas
4. Produce the result.
Registers are used for storing the intermediate results between
the above operations.

Instruction Pipeline

In this a stream of instructions can be executed by

overlapping fetch, decode and execute phases of an instruction
cycle. This type of technique is used to increase the throughput of
the computer system.

An instruction pipeline reads instruction from the memory while

previous instructions are being executed in other segments of the
pipeline. Thus we can execute multiple instructions
simultaneously. The pipeline will be more efficient if the
instruction cycle is divided into segments of equal duration.

Pipeline Conflicts

There are some factors that cause the pipeline to deviate its
normal performance. Some of these factors are given below:
1. Timing Variations

All stages cannot take same amount of time. This problem

generally occurs in instruction processing where different
instructions have different operand requirements and thus
different processing time.

2. Data Hazards

When several instructions are in partial execution, and if they

reference same data then the problem arises. We must ensure
that next instruction does not attempt to access data before the
current instruction, because this will lead to incorrect results.

3. Branching

In order to fetch and execute the next instruction, we must know

what that instruction is. If the present instruction is a conditional
branch, and its result will lead us to the next instruction, then the
next instruction may not be known until the current one is
processed.

4. Interrupts

Interrupts set unwanted instruction into the instruction stream.

Interrupts effect the execution of instruction.
5. Data Dependency

It arises when an instruction depends upon the result of a

previous instruction but this result is not yet available.

Advantages of Pipelining

1. The cycle time of the processor is reduced.

2. It increases the throughput of the system
3. It makes the system reliable.

Disadvantages of Pipelining

1. The design of pipelined processor is complex and costly to

manufacture.
2. The instruction latency is more.

Difference between Uniform Memory Access (UMA) and Non-uniform Memory

Access (NUMA)

Multiprocessors can be categorized into three shared-memory model which are:

1. Uniform Memory Access (UMA)
2. Non-uniform Memory Access (NUMA)
3. Cache-only Memory Access (COMA)
Uniform Memory Access (UMA):
In UMA, where Single memory controller is used. Uniform Memory Access is slower
than non-uniform Memory Access. In Uniform Memory Access, bandwidth is restricted
or limited rather than non-uniform memory access. There are 3 types of buses used in
uniform Memory Access which are: Single, Multiple and Crossbar. It is applicable for
general purpose applications and time-sharing applications.
Advantages of UMA:
 Easy to Implement: UMA architecture is relatively easy to implement, as all
processors or cores have equal access to the memory pool. This makes it an ideal
choice for small-scale systems, such as desktop computers or low-end servers.
 Low Latency: Since all memory locations have equal access times, UMA provides
low latency, which ensures that processors or cores can access memory quickly
and efficiently. This makes UMA ideal for high-performance computing applications
that require fast memory access.
 Low Cost: UMA architecture is relatively inexpensive to implement, as it requires
only a single shared memory bus to connect all processors or cores to the memory
pool. This makes it an ideal choice for low-cost computing systems.
Disadvantages of UMA:
 Limited Scalability: UMA architecture is not scalable beyond a certain point, as
adding more processors or cores to the system can cause contention for the
memory bus. This can result in reduced system performance as processors or
cores have to wait for memory access.
 Limited Bandwidth: UMA architecture provides limited bandwidth, as all processors
or cores share a single memory bus. This can result in reduced performance for
memory-intensive applications.
 Limited Memory Capacity: UMA architecture provides limited memory capacity, as
all processors or cores share a single memory pool. This can limit the amount of
memory available to each processor or core, which can affect system performance.

Non-uniform Memory Access (NUMA):

In NUMA, where different memory controller is used. Non-uniform Memory Access is
faster than uniform Memory Access. Non-uniform Memory Access is applicable for
real-time applications and time-critical applications.
Advantages of a NUMA :
 Improved performance: By providing each processor with its own local memory,
NUMA can reduce memory access times and improve overall system performance.
 Scalability: NUMA systems are highly scalable and can handle large workloads by
adding additional processors and memory nodes.
 Reduced memory contention: NUMA can help reduce memory contention by
allowing each processor to access its own local memory, reducing the need for
multiple processors to access the same memory location.
Disadvantages to NUMA :
 Complexity: NUMA systems can be complex to design and implement, as they
require specialized hardware and software to manage memory access.
 Higher cost: NUMA systems can be more expensive than UMA systems due to the
additional hardware and software required.
 Performance variability: In some cases, the performance of a NUMA system may
be lower than that of a UMA system, especially if the workload requires frequent
access to shared memory.

Similarities :
 Both UMA and NUMA architectures are used in symmetric multiprocessing (SMP)
systems where multiple processors share a common memory pool.
 Both UMA and NUMA architectures require memory management to ensure that all
processors can access the memory they need.
 Both UMA and NUMA architectures require the use of cache memory to improve
memory access times and reduce latency.
 Both UMA and NUMA architectures can be used in a wide range of applications,
including scientific computing, database management, and high-performance
computing.
 Both UMA and NUMA architectures can benefit from using high-speed
interconnects to improve memory access times and reduce latency.
Let’s see the difference between UMA and NUMA:

S.
UMA NUMA
No.

UMA stands for Uniform Memory NUMA stands for Non-uniform Memory
1.
Access. Access.

In Uniform Memory Access, Single In Non-uniform Memory Access,

2.
memory controller is used. Different memory controller is used.

Uniform Memory Access is slower than Non-uniform Memory Access is faster

3.
non-uniform Memory Access. than uniform Memory Access.
 Uniform Memory Access has limited Non-uniform Memory Access has more
4.
bandwidth. bandwidth than uniform Memory Access.

Uniform Memory Access is applicable Non-uniform Memory Access is

5. for general purpose applications and applicable for real-time applications and
time-sharing applications. time-critical applications.

In uniform Memory Access, memory In non-uniform Memory Access, memory

6.
access time is balanced or equal. access time is not equal.

There are 3 types of buses used in While in non-uniform Memory Access,

7. uniform Memory Access which are: There are 2 types of buses used which
Single, Multiple and Crossbar. are: Tree and hierarchical.

Examples of UMA architecture- Examples NUMA architecture-

8.  Sun Starfire Servers  Cray

 Compaq alpha server  TC-2000
 HP v series  BBN and others.
Conclusion
UMA and NUMA are two different memory architectures that are used in computer
systems. UMA provides equal access to memory for all processors and has lower
latency, while NUMA provides higher scalability and better memory utilization. The
choice between UMA and NUMA architecture depends on the specific requirements of
the computer system and the workload it is expected to handle.