1.

Programmed I/O
Definition :- Programmed I/O is an I/O data transfer technique in which the CPU
directly controls all input and output operations. The CPU continuously checks the
status of the I/O device and transfers data between the device and memory. It is also
called Polling I/O because the CPU repeatedly polls (checks) the device status.
Working of Programmed I/O
1. CPU sends a command to the I/O device.
2. CPU checks the device status register continuously.
3. When the device becomes ready, data is transferred.
4. CPU moves data between the I/O device and memory.
5. The process repeats until the transfer is complete.
Block Diagram
+-------+
| CPU |
+-------+
|
+-----------+
| I/O Device|
+-----------+
|
Memory
Steps of Operation
1. CPU issues an I/O command.
2. CPU waits and checks the status of the device.
3. Device becomes ready.
4. CPU transfers one word/byte of data.
5. Transfer continues until all data is moved.
Characteristics
• CPU is fully involved in data transfer.
• No interrupt mechanism is used.
• Simple to implement.
• CPU remains busy during I/O operations.
Advantages
• Simple hardware design.
• Easy to understand and implement.
• Suitable for low-speed I/O devices.
• Low cost.
Disadvantages
• CPU time is wasted while waiting for the device.
• Low system efficiency.
• Not suitable for high-speed data transfer.
• Reduces overall performance.
Conclusion : Programmed I/O is a simple data transfer method where the CPU
continuously monitors and controls I/O devices. Although easy to implement, it is
inefficient because the CPU remains busy waiting for the device to become ready.
2. Interrupt driven I/O.
Definition :- Interrupt-Driven I/O is a data transfer technique in which an I/O device
sends an interrupt signal to the CPU when it is ready for data transfer. The CPU does
not continuously check the device status and can perform other tasks until
interrupted.
Working of Interrupt-Driven I/O
1. CPU sends an I/O request to the device.
2. CPU continues executing other programs.
3. When the device is ready, it sends an interrupt signal.
4. CPU temporarily stops its current task.
5. CPU executes the Interrupt Service Routine (ISR).
6. Data transfer takes place.
7. CPU returns to the interrupted program.
Block Diagram
+-------+
| CPU |
+-------+
^
| Interrupt Signal
|
+-----------+
| I/O Device|
+-----------+
v
Memory
Steps of Operation
1. CPU issues an I/O command.
2. Device starts its operation.
3. CPU performs other useful work.
4. Device generates an interrupt when ready.
5. CPU saves its current stat
6. ISR handles the I/O operation.
7. CPU resumes the previous task.
Interrupt Service Routine (ISR)
• A special program executed when an interrupt occurs.
• Handles data transfer between the I/O device and memory.
• After completion, control returns to the main program.
Advantages
• Better CPU utilization.
• CPU is free to perform other tasks.
• Faster and more efficient than Programmed I/O.
• Suitable for multitasking systems.
Disadvantages
• More complex hardware and software.
• Interrupt handling introduces some overhead.
• Frequent interrupts can affect performance.
3. DMA transfer.
DMA (Direct Memory Access) Transfer – 6 Marks Answer
Definition:- Direct Memory Access (DMA) is a data transfer technique in which data is
transferred directly between an I/O device and main memory without continuous
involvement of the CPU. A special hardware unit called the DMA Controller (DMAC)
manages the transfer.
Need for DMA
• In Programmed I/O and Interrupt-Driven I/O, the CPU participates in every data
transfer operation. For large amounts of data, this wastes CPU time.
• DMA solves this problem by allowing direct data transfer between memory and
I/O devices.
Working of DMA Transfer
1. CPU initializes the DMA controller with:
• Source address
• Destination address
• Number of bytes to transfer
2. DMA controller requests control of the system bus.
3. CPU grants the bus to DMA and temporarily suspends its bus activity.
4. DMA transfers data directly between the I/O device and memory.
5. After the transfer is complete, DMA sends an interrupt to the CPU.
6. CPU resumes normal execution.
Block Diagram
| CPU |
 |
| DMA Control |
+-------------+
/ \
v v
+-----------+ +--------+
| Memory | | I/O Dev|
DMA Transfer Modes
1. Burst Mode
• DMA transfers an entire block of data at once.
• CPU waits until the transfer is completed.
2. Cycle Stealing Mode
• DMA transfers one word at a time.
• Temporarily "steals" bus cycles from the CPU.
3. Transparent Mode
• DMA transfers data only when the CPU is not using the bus.
• Minimal effect on CPU performance.
Advantages
• High-speed data transfer.
• Reduces CPU workload.
• Improves overall system performance.
• Efficient for large data transfers (disk, network, multimedia).
Disadvantages
• Additional hardware (DMA Controller) required.
• More complex design.
• CPU may be delayed when DMA uses the bus.
[Link] handling.
Definition :- Interrupt Handling is the process by which the CPU responds to an
interrupt generated by an I/O device, software, or hardware event. It temporarily
stops the current program, services the interrupt, and then resumes normal
execution.
An interrupt is a signal that requests immediate attention from the CPU.
Steps in Interrupt Handling
1. Interrupt Occurs
• An I/O device or program generates an interrupt signal.
• CPU receives the interrupt request.
2. Complete Current Instruction
• CPU finishes executing the current instruction before responding.
3. Save Current State
• CPU saves the contents of important registers and the Program Counter (PC).
• This information is stored so execution can resume later.
4. Execute Interrupt Service Routine (ISR)
• CPU jumps to a special program called the Interrupt Service Routine (ISR) or
Interrupt Handler.
• ISR performs the required task.
5. Restore Previous State
• After servicing the interrupt, the CPU restores the saved registers and PC.
6. Resume Program Execution
• CPU returns to the interrupted program and continues execution.
Interrupt Service Routine (ISR)
• A special routine that handles the interrupt.
• Executes the required service.
• Returns control to the main program after completion.

Types of Interrupts
1. Hardware Interrupt :- Generated by hardware devices such as:Keyboard, Mouse,
Printer, Disk Controller
2. Software Interrupt :- Generated by software instructions or system calls.
3. Maskable Interrupt :- Can be enabled or disabled by the CPU.
4. Non-Maskable Interrupt (NMI)
• Cannot be ignored.
• Used for critical events such as hardware failures.
Advantages
• Improves CPU utilization.
• Allows efficient multitasking.
• Provides quick response to external events.
• Eliminates continuous polling of devices.
Disadvantages
• Increases system complexity.
• Context switching introduces overhead.
• Too many interrupts can reduce performance.
5. I/O interfaces.
Definition :- An I/O Interface is a hardware component that acts as a bridge between
the CPU/Memory and Input-Output devices. It enables communication by converting
signals and managing data transfer between devices and the computer system.
Since CPU and I/O devices operate at different speeds and formats, an I/O interface is
required for proper communication.
• Functions of I/O Interface
1. Data Transfer – Transfers data between CPU and I/O devices.
2. Device Control – Controls the operation of connected devices.
3. Status Reporting – Indicates whether a device is ready, busy, or has errors.
4. Signal Conversion – Converts data formats and electrical signals.
5. Synchronization – Matches the speed differences between CPU and I/O devices.
• Components of an I/O Interface
1. Data Register :- Stores data being transferred between CPU and device.
2. Status Register :- Stores device status information such as ready, busy, or error.
3. Control Register :- Stores commands from the CPU to control the device.
Types of I/O Interfaces
1. Serial Interface
• Transfers data one bit at a time.
• Suitable for long-distance communication.
• Examples : USB , RS-232
2. Parallel Interface
• Transfers multiple bits simultaneously.
• Faster for short distances.
• Examples: Parallel printer port
Advantages
• Enables communication between CPU and peripherals.
• Handles speed mismatch between devices and CPU.
• Improves reliability of data transfer.
• Simplifies device control.
Disadvantages
• Adds hardware cost.
• Can become a bottleneck if poorly designed.
• Different devices may require different interfaces.