Module-3

1. Explain the history and evolution of embedded systems. Differentiate between General Purpose Computing
Systems and Embedded Systems in terms of design constraints, performance, and application domains.
Ans:
History and evolution of embedded systems
1. Pre-IT era: vacuum tubes and transistors
• Embedded systems existed even before the IT revolution, using vacuum tube and discrete transistor
technology.
• Embedded algorithms were developed in low-level languages and implemented in relatively bulky
hardware.
2. First recognised modern embedded system: Apollo Guidance Computer (AGC)
• The AGC, developed by MIT Instrumentation Laboratory for the lunar expedition, is considered the
first recognised modern embedded system.
• It ran the inertial guidance systems of both the Command Module (CM) and the Lunar Excursion
Module (LEM).
3. Technical features of AGC
• Initial design: about 4K words of fixed ROM and 256 words of erasable RAM; later expanded to 36K
words of fixed memory and 2K words of erasable memory.
• Used around 5000 ICs based on 3-input NOR gates (RTL logic), 16-bit word logic, and a clock
derived from a 2.048 MHz crystal (1.024 MHz operation).
• User interface was the DSKY unit (display/keyboard), similar to a calculator keypad.
4. First mass-produced embedded system
• The guidance computer for the Minuteman-I missile (Autonetics D-17) was the first mass-produced
embedded system.
• It was built using discrete transistor logic and used a hard disk as main memory.
5. Role of integrated circuits
• The first integrated circuit appeared in 1958, and by 1963 IC-based computers started to appear, with
early adoption in embedded systems like the Apollo Guidance Computer and Minuteman-II systems.
6. First generation embedded systems
• Built around 8-bit microprocessors such as Intel 8085 and Zilog Z80, and 4-bit microcontrollers.
• Hardware was simple and firmware was mostly in Assembly language.
• Examples: digital telephone keypads, stepper motor control units.
7. Second generation embedded systems
• Used 16-bit microprocessors and 8/16-bit microcontrollers.
• Instruction sets became more complex and powerful, and some systems included embedded operating
systems.
• Examples: data acquisition systems and SCADA systems.
8. Third generation embedded systems
• Based on powerful 32-bit processors and 16-bit microcontrollers, along with application/domain
specific devices like DSPs and ASICs.
• Concepts like instruction pipelining and complex instruction sets became common, with processors
such as Intel Pentium and Motorola 68K gaining popularity in high-performance embedded designs.
• Embedded systems expanded into robotics, media, industrial process control, and networking.
9. Fourth generation embedded systems
• Characterised by System-on-Chip (SoC), reconfigurable processors, and multi-core processors,
enabling high performance and miniaturisation.
• SoCs integrate processor cores with multiple functionalities on a single IC.
• Examples: smartphones and mobile internet devices (MIDs), typically running high-performance
real-time embedded operating systems.
10. Current trends and future direction
• The processor and embedded market is highly dynamic and demanding, with continuous advances in
integration, performance, and power efficiency.
• The text explicitly notes “what next?” is open, highlighting ongoing evolution beyond the fourth
generation.
Difference between General Purpose Computing Systems and Embedded Systems
Aspect General Purpose Computing System Embedded System

Generic hardware + GPOS for many Special purpose hardware + embedded

Hardware and OS
applications. OS/firmware for specific tasks.
 Aspect General Purpose Computing System Embedded System

User OS and applications can be Firmware pre-programmed; typically not alterable

programmability installed/removed by end user. by end user.

Less focus on low-power; power Strong focus on power efficiency and

Power focus
management secondary. power-saving modes.

Large RAM and storage, relatively Limited RAM/ROM; carefully dimensioned for
Memory/resources
unconstrained. application.

Timing and Response not time-critical; behaviour Often time-critical; many are deterministic,
determinism can be non-deterministic. especially hard real-time.

General computing (office, web, Specific domains like consumer devices,

Application domain
development, entertainment). automotive, telecom, healthcare, control, etc.

2. Describe the system core of an embedded system in detail. Also explain the classification of embedded
systems and discuss the major application domains with examples.
Ans:
System core of an embedded system

Definition of system core

• The core is the central processing block around which the rest of the embedded system is designed.
• It executes the control algorithm, processes sensor inputs, and generates actuator outputs as per
application requirements.
Possible categories of cores
The core of an embedded system falls into one of these categories:
• General purpose and domain-specific processors
• Microprocessors
• Microcontrollers
• Digital Signal Processors (DSPs)
• Application Specific Integrated Circuits (ASICs)
• Programmable Logic Devices (PLDs)
• Commercial off-the-shelf components (COTS)
Processor/controller based cores (dominant type)
• About 80% of embedded systems are processor/controller based, using microprocessors,
microcontrollers or DSPs depending on the domain.
 • Industrial control and monitoring systems typically use standard microprocessors or microcontrollers,
while signal-processing applications (speech coding, recognition, etc.) use DSPs.
Microprocessor as core
• A microprocessor is a silicon CPU capable of arithmetic and logical operations based on an
instruction set.
• It is a dependent unit, requiring external memory, timers, interrupt controllers and I/O devices to form
a complete embedded system.
Microcontroller as core
• A microcontroller integrates CPU, on-chip RAM, ROM/FLASH for program storage, timers, interrupt
controllers and I/O ports on a single chip.
• Because it is self-contained, cheap and compact, microcontrollers are widely used in embedded
systems instead of bare microprocessors.
Digital Signal Processor (DSP) as core
• DSPs are special-purpose microprocessors (8/16/32-bit) optimised for high-speed arithmetic
operations in audio, video and communication applications.
• They have program memory, data memory, a computational engine with parallel arithmetic units, and
an I/O unit to interface with external signals.
ASIC and PLD based cores
• ASICs are microchips designed for a specific application, integrating several functions into one chip
to reduce size and cost; ASSPs are standardised ASICs sold for common applications (e.g. ADE7760
energy metering IC).
• PLDs (CPLDs, FPGAs) provide a configurable hardware core, allowing designers to implement
custom logic and even soft processors for embedded control.
Embedded firmware and memory within the core
• Embedded firmware stored in ROM/FLASH (MROM, PROM, OTP, EPROM, EEPROM, FLASH)
holds the control algorithm and configuration.
• Working memory (RAM: SRAM, DRAM, NVRAM) stores variables and temporary data during
execution; some controllers have on-chip memory, others use off-chip memory.
Communication interfaces and I/O connection
• The core connects to the external world through input ports (sensors) and output ports (actuators),
often via signal conditioning and A/D or D/A converters.
• Chip-level interfaces (I²C, SPI, UART, 1-Wire, parallel bus) and external interfaces (RS-232C, USB,
etc.) are part of the system core’s communication block to exchange data with peripherals and other
systems.
Classification of embedded systems
1. Classification based on generation
1. First generation embedded systems
• Built around 8-bit microprocessors (8085, Z80) and 4-bit microcontrollers.
• Simple hardware, firmware in assembly language; examples: digital telephone keypads, stepper motor
control units.
2. Second generation embedded systems
• Based on 16-bit microprocessors and 8/16-bit microcontrollers.
• More powerful instruction sets; some include embedded operating systems.
• Examples: data acquisition systems, SCADA systems.
3. Third generation embedded systems
• Use powerful 32-bit processors and 16-bit microcontrollers, plus application-specific devices like
DSPs and ASICs.
• Introduced instruction pipelining and complex instruction sets; processors like Intel Pentium and
Motorola 68K used in high-performance embedded applications.
• Applied in robotics, media, industrial process control, networking, etc.
4. Fourth generation embedded systems
• Characterised by Systems-on-Chip (SoC), reconfigurable processors and multicore processors, giving
high performance and strong integration.
• Use high-performance real-time embedded operating systems.
• Examples: smartphones and mobile internet devices (MIDs).
5. Future direction (“What next?”)
• The processor/embedded market is highly dynamic; the text notes that further generations will depend
on future “smart moves” in technology.
2. Classification based on complexity and performance
1. Small-scale embedded systems
• Simple application needs, non-time-critical performance.
• Built around low-performance, low-cost 8 or 16-bit microprocessors/microcontrollers; may or may
not use an OS.
• Example: electronic toy.
2. Medium-scale embedded systems
• Moderately complex hardware and firmware.
• Use medium-performance, low-cost 16 or 32-bit microprocessors/microcontrollers or DSPs.
• Typically include an embedded OS (general purpose or real-time).
3. Large-scale / complex embedded systems
• Very complex hardware and firmware, used in mission-critical high-performance applications.
• Built around 32 or 64-bit RISC processors, reconfigurable SoCs, multicore processors and
programmable logic devices, often with multiple processors and hardware accelerators.
• Use high-performance RTOS for task scheduling, prioritization and management.

Major application domains and examples

The module lists several important domains where embedded systems are widely used
1. Consumer electronics
• Products: camcorders, digital cameras.
• Example: a digital camera uses an embedded controller to perform image capture, storage and display
2. Household appliances
• Products: television, DVD players, washing machines, refrigerators, microwave ovens.
• Example: a washing machine controller manages wash cycles, water levels and motor control using an
embedded microcontroller.
3. Home automation and security systems
• Products: air conditioners, sprinklers, intruder detection alarms, CCTV cameras, fire alarms.
• Example: an air conditioner uses sensors and actuators to maintain room temperature.
4. Automotive industry
• Products: anti-lock braking systems (ABS), engine control units, ignition systems, automatic
navigation systems.
• Example: ABS uses embedded controllers and sensors to prevent wheel lock-up during braking.
5. Telecommunications
• Products: cellular phones, telephone switches, handset multimedia applications.
• Example: a mobile phone includes an embedded system with application-specific user interface.
6. Computer peripherals
• Products: printers, scanners, fax machines.
• Embedded controllers manage paper handling, print engines, and communication protocols.
7. Computer networking systems
• Products: network routers, switches, hubs, firewalls.
• Example: a wireless router is an embedded system for data communication.
8. Healthcare
• Products: scanners, EEG (electroencephalogram), ECG (electrocardiogram) machines.
• Example: an ECG machine is an embedded monitoring system that measures heartbeat but does not
control it.
9. Measurement and instrumentation
• Products: digital multimeters, digital CROs, logic analysers, PLC systems.
• These systems acquire analog/digital data, process it, and display measurements using embedded
controllers.
10. Banking, retail and card readers
• Banking and retail: ATMs, currency counters, point-of-sale (POS) terminals.
• Card readers: barcode readers, smart-card readers, handheld terminals.
• All of these contain embedded processors to handle user interface, transaction logic and secure
communication.
3. Explain the different types of memories used in embedded system design. Describe the role, characteristics,
and appropriate usage of each memory type.
Ans:
ROM and non-volatile memories
Masked ROM (MROM)
• Role and characteristics
• Contents are permanently written (masked) at fabrication time; cannot be altered later.
• Very reliable, low per-unit cost for high volumes, but requires long lead time and no field updates.
• Appropriate usage
• Used in very high volume, stable products where firmware rarely changes (e.g., simple consumer
electronics with fixed features).
• Not suitable for prototyping or products needing frequent firmware upgrades.
PROM (Programmable ROM)
• Role and characteristics
• Comes blank from the manufacturer and can be programmed once by the user using a PROM
programmer.
• After programming, it behaves like a normal ROM; no erase or re-programming possible.
• Appropriate usage
• Good for low/medium volume production where the code is final but you do not want mask ROM
tooling costs.
• Not suitable where firmware updates in the field are required.
OTP (One Time Programmable ROM)
• Role and characteristics
• Technically similar in concept to PROM; “OTP” often refers to EPROM-like devices in packages
without a quartz window, so they can be programmed once but not erased by UV.
• After a single programming, contents are permanent.
• Appropriate usage
• Cost-effective alternative to EPROM for one-time programmed embedded firmware in moderate
volumes.
• Used when development is stabilised and you want more security against code reading/modification.
EPROM (Erasable Programmable ROM)
• Role and characteristics
• Can be electrically programmed and erased using ultraviolet (UV) light through a quartz window.
• Erase operation takes several minutes and clears the whole chip.
• Requires removal from the circuit and a UV eraser; limited erase/program cycles compared to modern
FLASH.
• Appropriate usage
• Very useful for development and prototyping stages where firmware is re-written multiple times
before freezing.
• Less popular in new designs because FLASH offers easier in-circuit erase/program.
EEPROM (Electrically Erasable Programmable ROM)
• Role and characteristics
• Contents can be altered electrically at byte or register level, instead of erasing the whole chip.
• Can be erased and reprogrammed in-circuit; devices often support a “chip erase” mode that clears the
entire memory in milliseconds.
• Provides high flexibility; capacity is generally limited to a few kilobytes compared with standard
ROMs.
• Appropriate usage
• Storing configuration parameters, calibration data, serial numbers and small user data that may change
during product life.
• Ideal when you need non-volatile storage with fine-grained (byte-level) updates but only modest
capacity.
FLASH memory
• Role and characteristics
• Most popular ROM technology in modern embedded designs; derived from EEPROM technology.
• Combines EEPROM’s re-programmability with high capacity of standard ROMs.
• Organised as sectors (blocks) or pages; stores information in arrays of floating-gate MOSFETs.
• Erase is done by sector or page (not individual bytes), and each sector/page must be erased before
re-programming.
• Typical erase endurance is around 1000 cycles (as given in the text for embedded use).
 •Appropriate usage
• Used for program (firmware) storage in microcontrollers and SoCs, and for larger data storage such as
file systems in embedded devices.
• W27C512 (64 KB) from Winbond is cited as an example of FLASH device.
NVRAM (Non-volatile RAM)
• Role and characteristics
• Random access memory combined with an internal battery backup, so data is retained when main
power is removed.
• Internally uses static RAM plus a small battery, both packaged together.
• Typical life span around 10 years; example: DS1644, 32 KB NVRAM from Maxim/Dallas.
• Appropriate usage
• Ideal for applications that need fast RAM-like access with non-volatility, such as critical logs,
counters, or state that must survive power-down.
• Used where rewrite frequency is high (unsuitable for limited-cycle FLASH/EEPROM) but data loss is
unacceptable

RAM and working memories

RAM is the working data memory of the controller/processor: it holds variables, stacks, buffers and temporary data
while the system is running.
General characteristics of RAM
• Role
• RAM is read-write memory; processor can freely read from and write to any location.
• It is volatile: all contents are lost when power is turned off.
• Access model
• RAM is random (direct) access: any location can be accessed directly without traversing through
previous addresses.
• This contrasts with Sequential Access Memory (SAM), e.g., magnetic tapes or CD-ROMs, where you
must traverse or seek to reach a particular location.
• Main categories
• The book classifies RAM as: Static RAM (SRAM), Dynamic RAM (DRAM) and Non-volatile RAM
(NVRAM).
Static RAM (SRAM)
• Role and internal structure
• Stores data in the form of voltage using flip-flops; a typical SRAM cell uses six transistors (6
MOSFETs).
• Four transistors form a latch (cross-coupled inverters) and two transistors act as access switches
controlled by the word line.
• Characteristics
• Fastest form of RAM due to resistive network and switching behaviour.
• Does not need refresh cycles as long as power is present.
• Larger cell size (more transistors) makes it more expensive and of lower density than DRAM.
• Appropriate usage
• Used where speed is critical and capacity requirement is moderate: CPU caches, on-chip data memory
in microcontrollers, small high-speed buffers.
• Preferable for time-critical real-time tasks in embedded systems.
Dynamic RAM (DRAM)
• Role and internal behaviour
• Stores data as charge in capacitors inside the memory cell.
• Charge leaks over time, so each cell requires periodic refresh operations to maintain data.
• Characteristics
• Higher density and lower cost per bit compared to SRAM.
• Access is slower than SRAM due to charge sensing and refresh overhead.
• Appropriate usage
• Used when large memory capacity is needed, such as external main memory in more complex
embedded systems (e.g., high-end routers, multimedia devices).
• Not typically used on very small controllers due to interface complexity and refresh requirements.
NVRAM in the RAM classification
• As working memory
• NVRAM appears both under ROM-like non-volatile devices and under RAM classification because it
behaves like RAM but retains data on power loss using a battery.
 • From the processor’s perspective it is random access read-write memory; from a system viewpoint it
is non-volatile storage.
• Appropriate usage
• Used when RAM-speed and non-volatility are both needed, particularly for critical system variables,
counters, or logs that must survive resets.

Memory
Volatility Main role Key characteristics Typical embedded usage
type

Programmed at fabrication; Mass-produced devices with

Masked
Non-volatile Fixed firmware very low unit cost in volume; stable code (e.g., simple
ROM
not changeable. appliances).

User programmed once; no Production after firmware

One-time
PROM/OTP Non-volatile erase; cheaper than EPROM finalisation where no field
firmware
with window. updates expected.

Development and
Re-programmable UV-erasable, full-chip erase, prototyping of firmware
EPROM Non-volatile
firmware (lab) off-circuit erasure; slower erase. before moving to
OTP/FLASH.

Byte-level electrical Parameters, calibration data,

Config/state
EEPROM Non-volatile erase/program; limited capacity small logs needing updates
storage
(kB range). in field.

Sector/page erase; high Primary firmware storage

Main program &
FLASH Non-volatile capacity; limited erase cycles and data storage in most
bulk data
(~1000). modern embedded systems.

Flip-flop based; very fast; no On-chip RAM, caches,

High-speed
SRAM Volatile refresh; low density, higher speed-critical buffers and
working memory
cost. stacks.

Capacitor based; requires External main memory in

Large-capacity
DRAM Volatile refresh; slower but high density complex/high-end
working memory
and cheaper. embedded systems.

Critical logs, counters, or

Non-volatile Critical state SRAM + battery pack; retains states that must survive
NVRAM
(battery-backed) memory contents ~10 years. power loss but need
RAM-speed access.

4. Explain the following embedded system components with neat diagrams:

(i) 7-Segment LED Display
(ii) Stepper Motor
(iii) Programmable Logic Devices (PLD) and its types
(iv) Oscillator Unit in Embedded Systems
Ans:
(i) 7-Segment LED Display
Basic structure and purpose
• A 7-segment LED display is an output device used to display alphanumeric characters,
commonly digits 0–9 and a few letters.
• It consists of 8 LED segments: seven segments labelled A to G and one decimal point
segment labelled DP.
 2. Arrangement of segments
• The segments are arranged in a rectangular figure so that by lighting different combinations
of A–G, various characters can be formed.
• Example:
• To display “4”, segments F, G, B and C are lit.
• To display “3”, segments A, B, C, D, G and DP are lit.
• To display character “d”, segments B, C, D, E and G are lit.
3. Common anode and common cathode configurations
• 7-segment displays are available as:
• Common anode: all anodes of segments are tied together.
• Common cathode: all cathodes are tied together.

(ii) Stepper Motor

1. Basic principle
• A stepper motor is an electromechanical device that converts digital pulse inputs into discrete
mechanical shaft rotation steps.
• Each pulse sequence energises motor windings in a specific order, causing the rotor to move
by a fixed angle (step).
2. Types used in embedded systems
• The text highlights two-phase unipolar stepper motors as a popular choice for embedded
systems.
• Unipolar stepper motors have centre-tapped windings, simplifying driving and allowing
easier direction control.
3. Control by coil energising sequence
• The rotation direction and stepping are controlled by energising coils (A, B, C, D) in the
correct sequence.
• The book provides an example step table (steps 1–8; different combinations of H/L on coils
A–D), and reversing the order of energising reverses rotation

(iii) Programmable Logic Devices (PLD)

1. Definition and role
• Programmable Logic Devices (PLDs) are digital ICs whose internal logic functions can be configured
by the designer after manufacturing.
• In embedded systems, PLDs allow designers to implement custom logic functions, glue logic, or even
complete processor cores and peripheral controllers.
 2. Place in system core
• In the classification of cores, PLDs are listed along with microprocessors, microcontrollers, DSPs and
ASICs as one category of embedded system cores.
• PLDs are particularly useful when fixed-function logic is insufficient and flexibility or
post-deployment updates are required.

(iv) Oscillator Unit in Embedded Systems

1. Purpose of the oscillator unit
• The oscillator unit provides the clock signal required for proper operation of the
microprocessor/microcontroller and synchronous peripherals.
• It determines instruction execution speed, timing of communication interfaces and the overall
temporal behaviour of the embedded system.
2. Typical implementation in controllers
• Many microcontrollers include an internal oscillator circuit that connects to an external crystal,
ceramic resonator or RC network through dedicated pins (e.g., XTAL1/XTAL2).
3. Role in system stability and timing
• A stable oscillator ensures deterministic execution timing, important for real-time tasks and
communication protocols.
• Clock frequency directly affects the instruction cycle time and thus performance and power
consumption.

5. Explain the following communication interfaces used in embedded systems:

(i) I²C Bus
(ii) SPI Interface
(iii) 1-Wire Interface
(iv) Reset Circuit
Ans:
(i) I²C bus (Inter-Integrated Circuit)
The I²C bus is a simple, synchronous two-wire serial bus used for communication between integrated circuits in
embedded systems. It is widely used to connect microcontrollers with peripherals like EEPROMs, sensors and RTCs
on the same board.
• Signals and basic structure
• I²C uses two open-drain lines: SCL (Serial Clock) and SDA (Serial Data), both pulled up by resistors
to Vcc.
• Any device can only pull lines low; the pull-ups bring them high, enabling wired-AND arbitration on
a shared bus.
• Devices are either master (generates clock, starts transfers) or slaves (respond to addresses); multiple
masters and multiple slaves are allowed.
• Addressing and data transfer
• Each slave has a unique address; the master starts communication with a START condition, sends
address + R/W bit, then data bytes, and ends with a STOP condition.
• After each byte, the receiver sends an ACK bit

(ii) SPI interface (Serial Peripheral Interface)

The SPI interface is a high-speed, full-duplex synchronous serial bus used to connect a master device to one or more
slaves. It offers higher speed and simpler protocol compared to I²C, at the cost of more wires.
• Signals and structure
• Standard SPI uses four main signals:
• SCLK (Serial Clock) – generated by master.
• MOSI (Master Out Slave In) – data from master to slave.
• MISO (Master In Slave Out) – data from slave to master.
• SS/CS (Slave Select / Chip Select) – active-low select line for each slave.
• For multiple slaves, SCLK, MOSI and MISO are shared, while each slave has its own SS line.
• Data transfer
• On each clock edge, master shifts out data on MOSI and simultaneously shifts in data on MISO,
enabling full-duplex communication.
• Clock polarity (CPOL) and phase (CPHA) modes define which clock edge is used for sampling and
shifting.
(iii) 1-Wire interface
The 1-Wire interface is an extremely low-pin-count single-wire serial communication bus (plus ground) developed for
simple, low-speed embedded communication. It is commonly used for ID chips, temperature sensors, and small
memory devices.
• Signals and topology
• Uses a single data line for both communication and, in some cases, powering the slave (parasitic
power), together with a common ground.
• The line is pulled up to Vcc via a resistor; devices pull the line low to transmit.
• Supports multiple devices on the same bus, each with a unique ROM code (identifier).
• Communication basics
• The master initiates communication with a reset pulse and detects presence pulses from slaves.
• Data is encoded as time-based pulses; the master controls timing windows to read/write bits.

(iv) Reset circuit

The reset circuit ensures that the embedded system starts in a known, defined state after power-on or fault conditions.
It holds the processor in reset until supply voltage and clock are stable, then releases it to start executing code from a
fixed address.
• Functions of reset
• Clears internal registers, program counter and status registers to defined values.
• Ensures peripherals and I/O ports come up in a safe default state.
• Types and implementation
• Simple RC reset: an RC network plus a transistor or Schmitt trigger generates a pulse at power-on.
• Dedicated reset supervisor IC: monitors supply voltage and asserts reset if Vcc is below threshold or
on manual reset input.
• Many microcontrollers also support watchdog-initiated reset for software hangs.

6. Write an assembly-level program with structural representation to display hexadecimal digits 0 to F on a 7-

segment LED interface with an appropriate time delay between each digit. (Program 9)
Ans:
START: MOV P1, #00H; Turn all segments off

MAIN: MOV DPTR, #LUT; DPTR -> start of lookup table

MOV R0, #10H; 16 digits (0...F)

NEXT_DIGIT:
CLR A; A = index (0...15)
MOVC A, @A+DPTR; Read pattern from table
MOV P1, A; Output pattern to 7-seg
ACALL DELAY; Delay between digits

INC DPTR; Next table entry

DJNZ R0, NEXT_DIGIT

SJMP MAIN; Repeat 0..F forever

DELAY: MOV R1, #0FFH

D1: MOV R2, #0FFH
D2: DJNZ R2, D2
DJNZ R1, D1
RET

LUT: DB 03FH ; 0
DB 006H ; 1
DB 05BH ; 2
DB 04FH ; 3
DB 066H ; 4
DB 06DH ; 5
DB 07DH ; 6
DB 007H ; 7
 DB 07FH ; 8
DB 06FH ; 9
DB 077H ; A
DB 07CH ; B
DB 039H ; C
DB 05EH ; D
DB 079H ; E
DB 071H ; F
END

7. With an interfacing diagram, write an assembly-level program to interface a 4×4 matrix keyboard and
display the corresponding key code on an LCD.(Program 10)
Ans:

#include <LPC21XX.h>
unsigned int delay;
unsigned int Switchcount=0;
unsigned int Disp[16]={0x003F0000, 0x00060000, 0x005B0000, 0x004F0000, 0x00660000,
0x006D0000, 0x007D0000, 0x00700000, 0x007F0000, 0x006F0000, 0x00770000, 0x007C0000,
0x00390000, 0x005E0000, 0x00790000, 0x00710000 };
#define SELDISP1 0x10000000
#define SELDISP2 0x20000000
#define SELDISP3 0x40000000
#define SELDISP4 0x80000000
#define ALLDISP 0x00000000
#define DATAPORT 0x00FF0000
int main (void)
{
PINSEL0 = 0x00000000;
PINSEL1 = 0x00000000;
IO0DIR = 0x0FF00000;
IO1DIR = 0x00000000;
while(1)
{
IO0SET |= ALLDISP;
IO0CLR = 0x00FF0000;
IO0SET = Disp[Switchcount];
 if(!(IO1PIN & 0x00800000))
{
for(delay=0;delay<100000;delay++)
{
if((IO1PIN & 0x00800000))
{
Switchcount++;
if(Switchcount == 0x10)
{
Switchcount = 0;
}
IO0CLR = 0x0FF00000;
}
}
}
}
}

8. Explain the purpose and significance of embedded systems in various application domains. Provide specific
examples from automotive, industrial, consumer electronics, and medical domains.
Ans:
Automotive domain
• Purpose and significance: Automotive embedded systems enhance safety, performance, comfort and
emissions control by continuously processing sensor data and controlling actuators in real time.
• Examples:
• Anti-lock Braking System (ABS) – prevents wheel lock by modulating brake pressure based on
wheel-speed sensors, improving vehicle stability and steering control during hard braking.
• Engine control and ignition systems – engine control units (ECUs) adjust fuel injection, ignition
timing and air–fuel ratio to optimise power, fuel economy and emission levels.

Industrial domain
• Purpose and significance: In industrial automation, embedded systems provide precise, reliable monitoring
and control of processes, improving productivity, quality and safety.
• Examples:
• Data acquisition systems – collect analog/digital signals from field sensors (temperature, pressure,
flow) and convert them to digital data for logging and analysis.
• SCADA systems – Supervisory Control and Data Acquisition systems use embedded controllers at
remote sites (plants, pipelines) to monitor status and execute control commands.

Consumer electronics / household domain

• Purpose and significance: Embedded systems in consumer products and appliances implement control
algorithms and user interfaces that deliver automation, convenience, energy efficiency and advanced features
at low cost.
• Examples:
• Household appliances – washing machines, refrigerators, microwave ovens and air conditioners
contain embedded controllers for cycle control, temperature regulation, timing and safety interlocks;
for instance, an air conditioner continuously senses room temperature and controls the compressor
and fan to maintain a set point.
• Home automation and security – systems such as intruder alarms, sprinklers, CCTV cameras and
fire alarms use embedded controllers to monitor sensors and trigger alarms or actuators when events
occur.

Medical domain
• Purpose and significance: In healthcare, embedded systems provide accurate monitoring and assist in
diagnosis and therapy, where high reliability and safety are critical.
• Examples:
• ECG machines – embedded monitoring systems that read heart signals via electrodes, digitise and
display/print the ECG waveform for diagnosis; they illustrate pure monitoring without control over
the patient’s heart.
 • EEG machines and medical scanners – capture and process biosignals or imaging data using
embedded processors, then present results on displays.

9. Explain the following embedded system components:

(i) I²C Bus protocol and frame structure
(ii) Watchdog Timer — purpose, configuration, and application
Ans:
(i) I²C bus protocol and frame structure
Basic idea and signals
• I²C (Inter-Integrated Circuit) is a synchronous, serial two-wire bus used for short-distance communication
between a master (microcontroller) and one or more slave devices on the same PCB.
• It uses two open-drain lines with pull-up resistors:
• SCL – Serial Clock (generated by master)
• SDA – Serial Data (bidirectional)
Multiple devices share SCL and SDA; bus arbitration and addressing allow several masters and slaves on the same
lines.
Logic levels and line control
• Lines are open-drain/open-collector: devices only pull lines low; the pull-up resistors bring them high.
• This allows wired-AND operation, multi-master arbitration, and safe sharing of lines.
Protocol operations
1. START condition (S)
• Initiated by master to begin a transfer.
• Defined as SDA transitioning from HIGH to LOW while SCL is HIGH.
2. Address phase
• Immediately after START, master transmits:
• 7-bit (or 10-bit) slave address, MSB first.
• 1-bit R/W flag: 0 = write (master → slave), 1 = read (slave → master).
3. ACK/NACK bit
• After each 8-bit byte, the receiver pulls SDA LOW during the 9th clock to acknowledge (ACK).
• If SDA remains HIGH during 9th clock, it is NACK, indicating no device responded or slave cannot
accept more data.
4. Data transfer
• Data bytes are transferred MSB first, with each byte followed by an ACK/NACK bit.
• For a write, the master sends data; for a read, the slave sends data and the master ACKs each byte
until the last one, which it ends with NACK.
5. STOP condition (P)
• Marks the end of the transfer.
• SDA transitions from LOW to HIGH while SCL is HIGH

Frame structure (byte-level)

A typical I²C write frame:
• START
• [7-bit slave address] + [R/W = 0]
• ACK from slave
• Data byte 1
• ACK
• Data byte 2
• ACK
• (more bytes + ACKs as needed)
• STOP
A typical I²C read frame (with internal register address):
• START
• [7-bit slave address] + [R/W = 0] (write phase)
• ACK
• Register address byte
• ACK
• Repeated START
• [7-bit slave address] + [R/W = 1] (read phase)
• ACK
• Data byte 1 (from slave)
 • ACK / NACK (NACK after last byte)
• STOP

(ii) Watchdog timer — purpose, configuration, and application

Purpose
• A watchdog timer (WDT) is a hardware timer used to automatically reset an embedded system if the software
fails to operate correctly (e.g., hangs or gets stuck in an infinite loop).
• It significantly improves system reliability in unattended or safety-critical applications by recovering from
software faults without human intervention.
Basic operation
• The watchdog counts down (or up) based on a clock source (internal RC, main clock, or separate oscillator).
• Normal software must periodically “service” or “kick” the watchdog (writing a specific value or toggling a
bit) before the timeout period expires.
• If the watchdog is not serviced in time (because code is stuck, interrupts are disabled, etc.), it times out and
asserts a reset signal that restarts the microcontroller as if from power-on reset.

Configuration
Typical configuration parameters in a microcontroller:
• Enable/disable:
• WDT can be turned on by configuration bits or control registers; some systems allow enabling it early
at boot; some lock it so firmware cannot disable it after startup.
• Timeout period:
• Programmable prescaler or reload value selects how long the watchdog waits before timeout (from
milliseconds to seconds).
• The period is chosen longer than the worst-case execution time of the main loop or critical tasks.
• Clock source:
• WDT may have an independent low-frequency oscillator so it continues to run even if the main clock
fails.
• Windowed watchdog (in some MCUs):
• Requires servicing only within a specific time window; servicing too early or too late also causes a
reset, catching runaway code more effectively.
The firmware usually has a specific function (e.g., Feed_Watchdog) called from the main loop or a periodic task that
writes the required sequence to the WDT register to prevent reset.
Applications
• Safety-critical control:
• Automotive ECUs, industrial controllers, and medical devices use watchdogs to ensure that if control
software crashes, the system automatically resets into a safe state.
• Unattended/remote systems:
• Remote data loggers, telecom base stations, network routers, and embedded gateways rely on
watchdogs so that a lockup does not require a physical power-cycle.
• Consumer electronics:
• In appliances (washing machines, microwaves, TVs), watchdogs reset the system if the user interface
or control logic becomes unresponsive, avoiding “frozen” products.

10. Write difference between

(i)Micro Processor and Micro Controller
(ii) RISC and CISC
(iii)Harvard and Von-Neumann
(iv)Big Endian and Little Endian
Ans:
(i) Microprocessor vs Microcontroller
Microprocessor Microcontroller

A highly integrated chip that contains CPU, scratchpad RAM,

A silicon chip representing only the CPU, capable
special and general-purpose registers, on-chip ROM/FLASH for
of arithmetic and logical operations according to a
program storage, timer and interrupt control units, and
predefined instruction set.
dedicated I/O ports.
 Microprocessor Microcontroller

Dependent unit – requires external chips like

program and data memory, timers, interrupt Self-contained unit – usually does not require external
controller, I/O interfaces, etc., for proper interrupt controller, timer, UART, etc., for basic functioning.
functioning.

Mostly general-purpose in design and operation. Mostly application-oriented or domain-specific.

Does not contain built-in I/O ports; I/O is

Contains multiple built-in I/O ports, which can often be used as
implemented using external programmable
8/16/32-bit ports or as individual pins.
peripheral interface chips like 8255.

Targeted at embedded markets where overall application

Traditionally targeted at high-end
constraints (power, cost, integration) are more critical than raw
performance markets.
performance.

Limited power-saving features compared to Includes many power-saving features, tailored for low-power
microcontrollers. operation.

(ii) RISC vs CISC

RISC (Reduced Instruction Set Computing) CISC (Complex Instruction Set Computing)

Possesses a smaller number of instructions, typically Has a larger, more complex instruction set with many
about 30–40. instructions (e.g., classic 8051 has 255 instructions).

Instructions are more complex, like macros; a single

Instructions are simple; programmer may need to
CISC instruction may perform what would be several
write more instructions to implement a function.
RISC instructions.

Instruction set is non-orthogonal – not all instructions

Instruction set is orthogonal – most instructions can
can use all registers/addressing modes; usage is
operate on any register and use any addressing mode.
instruction-specific.

Operations are performed on registers only; memory is

Operations can be performed directly on registers or
accessed explicitly via load and store instructions (load–
memory, depending on the instruction.
store architecture).

Typically supports instruction pipelining and achieves Generally does not emphasise pipelining in the same
higher execution speed. way; individual instructions are more complex.

Uses single, fixed-length instructions. Uses variable-length instructions.

Requires less silicon and has lower pin count (simpler Requires more silicon due to complex instruction
decoding logic). decoding logic.

Often associated with Harvard architecture. Can be Harvard or Von-Neumann.

Example: Atmel AVR microcontroller (RISC, 32 Example: 8051 microcontroller (CISC, 255 instructions
instructions). in original version).
(iii) Harvard vs Von-Neumann
Harvard Architecture Von-Neumann Architecture

Single shared bus for both instruction and data

Separate buses for instruction (program) and data memory.
memory.

Program and data are stored in a common main

Program memory and data memory are physically separate.
memory.

CPU must first fetch instruction then fetch the data

Allows simultaneous instruction fetch and data access,
over the same bus, which slows execution compared
supports efficient pipelining and higher performance.
to Harvard.

Typically, higher cost due to extra buses and control logic. Cheaper because of simpler bus structure.

No chance of accidental program memory corruption by Greater chance of accidental program memory
data operations, since program and data are in different corruption since program and data reside in the same
physical memories. physical memory.

Self-modifying code is generally not natural/easy because Allows self-modifying code, since code is just another
code and data spaces are separate. part of writable memory.

(iv) Big-Endian vs Little-Endian

Endianness describes byte order in memory for multi-byte data (word length > 1 byte).
Let the 4-byte quantity be: Byte3 Byte2 Byte1 Byte0 (Byte3 = MSB, Byte0 = LSB).
Little-Endian Big-Endian

Stores the lower-order byte at the lowest memory Stores the higher-order byte at the lowest memory
address, and the higher-order bytes at increasing address, and the lower-order bytes at increasing
addresses. addresses.

“The little end comes first.” “The big end comes first.”

Example (base address 0x20000): - 0x20000 → Byte0 - Example (base address 0x20000): - 0x20000 → Byte3 -
0x20001 → Byte1 - 0x20002 → Byte2 - 0x20003 → 0x20001 → Byte2 - 0x20002 → Byte1 - 0x20003 →
Byte3 Byte0