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VLSI Design

This document outlines the examination details for the VLSI Design course at Dr. Babasaheb Ambedkar Technological University for the Summer 2024 semester. It includes instructions for students, the structure of the exam, and a list of questions covering various topics in VLSI design, such as MOSFET characteristics, CMOS logic, and FPGA architectures. Each question specifies the course outcomes and marks allocation, emphasizing the need for comprehensive understanding and application of the subject matter.

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4 views2 pages

VLSI Design

This document outlines the examination details for the VLSI Design course at Dr. Babasaheb Ambedkar Technological University for the Summer 2024 semester. It includes instructions for students, the structure of the exam, and a list of questions covering various topics in VLSI design, such as MOSFET characteristics, CMOS logic, and FPGA architectures. Each question specifies the course outcomes and marks allocation, emphasizing the need for comprehensive understanding and application of the subject matter.

Uploaded by

yuvarajdhage14
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

DR.

BABASAHEB AMBEDKAR TECHNOLOGICAL UNIVERSITY, LONERE


Regular Summer 2024
Course: B. Tech. Branch : Electronics and Computer Engineering Semester :VI
Subject Code & Name: BTECOE604A VLSI Design
Max Marks: 60 Date:21/06/2024 Duration: 3 Hr.
Instructions to the Students:
1. All the questions are compulsory.
2. The level of question/expected answer as per OBE or the Course Outcome (CO) on
which the question is based is mentioned in ( ) in front of the question.
3. Use of non-programmable scientific calculators is allowed.
4. Assume suitable data wherever necessary and mention it clearly.
(Level/CO) Marks
Q. 1 Solve Any Two of the following. 12
A) Explain Ids and Vds characteristics of depletion and enhancement type CO1 6
mosfet.
B) Explain CMOS Inverter analysis and design. Implement a three-input CO4 6
NOR gate using CMOS logic.
C) Explain pass transistor logic with neat [Link] NAND and CO2 6
NOR gate using PTL.

Q.2 Solve Any Two of the following. 12


A) Design stick diagram for: CO2 6
i) F= ( A.B)+C
ii) F= A+B+C
B) What is Stick Diagram? What are the uses of Stick [Link] the CO2 6
stick diagram and layout for CMOS inverter.
C) Differentiate between NMOS,CMOS and Bi CMOS inverters. CO1 6

Q. 3 Solve Any Two of the following. 12


A) Explain transmission gate with its [Link] NOR gate using CO2 6
TG.
B) Explain Pseudo nMOS Logic, Dynamic CMOS LOGIC and clocked CO1 6
CMOS logic.
C) Explain different alternate gate circuits. CO2 6

Q.4 Solve Any Two of the following. 12


A) Explain twin tub process for CMOS fabrication. CO1 6
B) With neat diagram explain different operating regions for a MOS CO1 6
transistor.
C) Give the subsystem design considerations of a four-bit adder. CO3/CO4 6

Q. 5 Solve Any Two of the following. 12


A) Explain about different programmable elements in FPGA architectures. CO5 6
B) Implement the following functions using PLA. CO4 6
A(x,y,z) = ∑m(1,2,4,6) B(x,y,z) = ∑m(0,1,6,7) C(x,y,z) = ∑m(2,6)
C) Write about the following CO4 6
i) Transistor-transistor Logic (TTL)
ii) Emitter – coupled Logic (ECL)
iii) CMOS Logic
*** End ***

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