EEE 4105: POWER ELECTRONICS

Lecturer: Peter Yegon

Prerequisites

EEE 2203 Physical Electronics II, EEE 3101 Analogue Electronics I

Purpose of the Course

The aim of this course is to enable the student to understand the working principle of
various power devices and their applications in the industry.

Course Outline
Week 1-3: Introduction and Power Devices
• Controllable and uncontrollable switches
• Ideal switch characteristics and switching losses
• Power Diode
• SCR (Silicon Controlled Rectifier), Thyristor
• Bipolar Junction Transistor
• Power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor)
• IGBT (Insulated Gate Bipolar Transistor)
• Uni-junction transistor (UJT)
• Triac
• Gate turnoff switch (GTO)
• Diac
Switching frequencies, switch ratings, and safe operating area
Week 4-5: Rectifiers
• Single-phase half-wave uncontrolled rectifiers with resistive and inductive loads
• Free-wheeling diode for continuous current
• Capacitor filter for steady voltage
• Single-phase and three-phase full-wave uncontrolled rectifier bridges
• Harmonics for non-linear loads
• Continuous current and discontinuous current operation
• AC voltage control
• Control of single-phase power output through phase angle control
• Applications in heater control, induction motor speed control, and static VAR control
Week 6 – CAT I
Week 7-8: Power Converters
• Conversion of power
• Classification and applications of converters
• Controlled three-phase rectifiers and their operation as inverters
• Inverters
Week 8-10: DC to DC Converters
• Buck Converter
• Boost converter
• Buck-Boost converter
Transfer function
Output voltage ripple
Week 11: CAT II
Week 12-13: Snubbers, Switching Circuits, and Protection

• Snubbers for power devices

• Switching circuits
• Protection mechanisms for power devices
Week 14: CAT III
Course Assessment
Cats 10%
Assignments 5%
Labs 15%
Exam 70%
Total 100%

Core Text Book

1. Bradley D. (2005). Power electronics, CRC Press, 2nd Ed

Reference Text Books

1. S. Rama R. (2000). Fundamentals of power electronics, CRC Press, illustrated

Ed.

2. Nihal K. (1998). Power electronics design handbook: low-power components

and applications, Newnes.

Course Journals
1. IEEJ Transactions on Electrical and Electronic Engineering, ISSN:1931-4981
1.1. INTRODUCTION
Power electronics is a subject that concerns the application of electronic-principles into
situations that are rated at power level rather than signal level. It may also be defined as a
subject that deals with the apparatus and equipment working on the principle of electronics but
rated at power level rather than signal level.
In broad terms, the task of power electronics is to process and control the flow of
electric energy by supplying voltages and currents in a form that is optimally suited for user
loads. Figure 1-1 shows a power electronic system in a block diagram form. The power input
to this power processor is usually (but not always) from the electric utility at a line frequency
of 60 or 50 Hz, single phase or three phases. The phase angle between the input voltage and
the current depends on the topology and the control of the power processor. The processed
output (voltage, current, frequency, and the number of phases) is as desired by the load. If the
power processor’s output can be regarded as a voltage source, the output current and the phase
angle relationship between the output voltage and the current depend on the load characteristic.
Normally, a feedback controller compares the output of the power processor unit with a desired
(or a reference) value, and the error between the two is minimized by the controller. The power
flow through such systems may be reversible, thus interchanging the roles of the input and the
output. In recent years, the field of power electronics has experienced a large growth due to
confluence of several factors. The controller in the block diagram of Fig. 1-1 consists of linear
integrated circuits and/or digital signal processors. Revolutionary advances in microelectronics
methods have led to the development of such controllers. Moreover, these advances in
semiconductor fabrication technology have made it possible to significantly improve the
voltage- and current-handling capabilities and the switching speeds of power semiconductor
devices, which make up the power processor unit of Fig. 1-1. At the same time, the market for
power electronics has significantly expanded.

Figure 1-1 Block diagram of a power Controller

[Link] ELECTRONICS VERSUS LINEAR ELECTRONICS
In any power conversion process such as that shown by the block diagram in Fig. 1-1,
a small power loss and hence a high energy efficiency is important because of two reasons: the
cost of the wasted energy and the difficulty in removing the heat generated due to dissipated
energy. Other important considerations are reduction in size, weight, and cost. The above
objectives in most systems cannot be met by linear electronics where the semiconductor
devices are operated in their linear (active) region and a line-frequency transformer is used for
electrical isolation. As an example, consider the direct current (dc) power supply of Fig. 1-2a
to provide a regulated output voltage V„ to a load. The utility input may be typically at 120 or
240 V and the output voltage may be, for example, 5 V. The output is required to be electrically
isolated from the utility input. In the linear power supply, a line-frequency transformer is used
to provide electrical isolation and for stepping down the line voltage. The rectifier converts the
alternating current (ac) output of the transformer low-voltage winding into dc. The filter
capacitor reduces the ripple in the dc voltage vd. Figure 1-2b shows the vd waveform, which
depends on the utility voltage magnitude (normally in a ± 10% range around its nominal value).
The transformer turns ratio must be chosen such that the minimum of the input voltage vd is
greater than the desired output Va. For the range of the input voltage waveforms shown in Fig.
1-2b, the transistor is controlled to absorb the voltage difference between vd and Vo thus
providing a regulated output. The transistor operates in its active region as an adjustable
resistor, resulting in a low energy efficiency. The line-frequency transformer is relatively large
and heavy.

In power electronics, the above voltage regulation and the electrical isolation are
achieved, for example, by means of a circuit shown in Fig. l-3a. In this system, the utility input
is rectified into a dc voltage vd, without a line-frequency transformer. By operating the
transistor as a switch (in a switch mode, either fully on or fully off) at some high switching
frequency/,, for example at 300 kHz, the dc voltage vd is converted into an ac voltage at the
switching frequency. This allows a high-frequency transformer to be used for stepping down
the voltage and for providing the electrical isolation.
[Link] AND APPLICATIONS
The expanded market demand for power electronics has been due to several factors
discussed below.
1. Switch-mode (dc) power supplies and uninterruptible power supplies. Advances in
microelectronics fabrication technology have led to the development of computers,
communication equipment, and consumer electronics, all of which require regulated dc power
supplies and often uninterruptible power supplies.
2. Energy conservation. Increasing energy costs and the concern for the environment
have combined to make energy conservation a priority. One such application of power
electronics is in operating fluorescent lamps at high frequencies (e.g., above 20 kHz) for higher
efficiency. Another opportunity for large energy conservation is in motor-driven pump and
compressor systems. Load-proportional, capacity modulated heat pumps and air conditioners
are examples of applying power electronics to achieve energy conservation.
3. Process control and factory automation. There is a growing demand for the enhanced
performance offered by adjustable-speed-driven pumps and compressors in process control.
Robots in automated factories are powered by electric servo (adjustable-speed and position)
drives. It should be noted that the availability of process computers is a significant factor in
making process control and factory automation feasible.
4. Transportation. In many countries, electric trains have been in widespread use for a
long time. Now, the use electric vehicles expanding at an exponential rate in the world due to
its low carbon footprint. Electric vehicles require battery chargers and also converters that
utilize power electronics.
5. Electro-technical applications. These include equipment for welding, electroplating,
and induction heating.
6. Utility-related applications. One such application is in transmission of power over
high-voltage dc (HVDC) lines. At the sending end of the transmission line, line-frequency
voltages and currents are converted into dc. This dc is converted back into the line-frequency
ac at the receiving end of the line. Power electronics is also beginning to play a significant role
as electric utilities attempt to utilize the existing transmission network to a higher capacity.
Potentially, a large application is in the interconnection of photovoltaic and wind-electric
systems to the utility grid.
1.3.1. Some Applications of Power Electronics
1. Aerospace:
Space shuttle power supplies, satellite power supplies, aircraft power systems.
2. Commercial:
Advertising, heating, air conditioning, central refrigeration, computer and office equipment,
uninterruptible power supplies, elevators, light dimmers and flashers.
3. Industrial:
Arc and industrial furnaces, blowers and fans, pumps and compressors, industrial lasers,
transformer-tap -changers, rolling mills, textile mills, excavators, cement mills, welding.
4. Residential:
Airconditioning, cooking, lighting, space heating, refrigerators, electric-door openers, dryers,
fans, personal computers, other entertainment equipment, vacuum cleaners, washing and
sewing machines, light dimmers, food mixers, electric blankets, food-warmer trays.
5. Telecommunication:
Battery chargers, power supplies (DC and UPS).
[Link]:
Battery chargers, traction control of electric vehicles, electric locomotives, street cars, trolley
buses, subways, automotive electronics.
7. Utility systems:
High voltage dc transmission (HVDC), excitation systems, VAR compensation, ·static circuit
breakers, fans and boiler-feed pumps, supplementary energy systems (solar, wind).
[Link] OF POWER ELECTRONIC CONVERTERS
A power electronic system consists of one or more power electronic converters. A
power electronic converter is made up of some power semiconductor devices controlled by
integrated circuits. The switching characteristics of power semiconductor devices permit a
power electronic converter to shape the input power of one form to output power of some other
form.
Static power converters perform these functions of power conversion very efficiently.
Broadly speaking, power electronic converters (or circuits) can be classified into six types as
under:
1. Diode Rectifiers: A diode rectifier circuit converts ac input voltage into a fixed dc
voltage. The input voltage may be single-phase or three phase. Diode rectifiers find
wide use in electric traction, battery charging, electroplating, electrochemical
processing, power supplies, welding and uninterruptible power supply (UPS)
systems.

2. Ac to dc converters (Phase-controlled rectifiers): These convert constant ac

voltage to variable DC output voltage. These rectifiers use line voltage for their commutation,
as such these are also called line-commutated or naturally-commutated ac to dc converters.
Phase-controlled converters may be fed from 1-phase or 3-phase source. These are used in dc
drives, metallurgical and chemical industries, excitation systems for synchronous machines etc.
3. DC to dc converters (DC Choppers): A dc chopper converts fixed dc input voltage
to a controllable dc output voltage. The chopper circuits require forced, or load, commutation
to turn-off the thyristors. For lower power circuits, thyristors are replaced by power transistors.
Classification of chopper circuits is dependent upon the type of commutation and also on the
direction of power flow. Choppers find wide applications in dc drives, subway cars, trolley
trucks, battery-driven vehicles etc.
4. DC to ac converters (Inverters): An inverter converts fixed dc voltage to a variable
ac voltage. The output may be a variable voltage and variable frequency. These converters use
line, load or forced commutation for turning-off the thyristors. Inverters find wide use in
induction-motor and synchronous-motor drives, induction heating, UPS, HVDC transmission
etc. At present, conventional thyristors are also being replaced by GTOs in high-power
applications and by power transistors in low-power applications.
5. AC to ac converters: These convert fixed ac input voltage into variable ac output
voltage. These are of two types as under:
(a) AC voltage controllers (AC voltage regulators): These converter circuits convert
fixed ac voltage directly to a variable ac voltage at the same frequency. AC voltage controller
employ two thyristors in antiparallel or a triac. Turn-off of both the devices is obtained by line
commutation. Output voltage is controlled by varying the firing angle delay. AC voltage
controllers are widely used for lighting control, speed control of fans, pumps etc.
(b) Cycloconverters: These circuits convert input power at one frequency to output
power at a different frequency through one-stage conversion. Line commutation is more
common in these converters, though forced and load commutated cycloconverters are also
employed. These are primarily used for slow-speed large ac drives like rotary kiln etc.
6. Static switches: The power semiconductor devices can operate as static switches or
contactors. Static switches possess many advantages over mechanical and electromechanical
circuit breakers. Depending upon the input supply, the static switches are called ac static
switches or dc static switches.

Classifying converters according to how the devices within the converter are
switched
Further insight can be gained by classifying converters according to how the devices
within the converter are switched. There are three possibilities:
1. Line frequency (naturally commutated) converters, where the utility line voltages
present at one side of the converter facilitate the turn-off of the power semiconductor devices.
Similarly, the devices are turned on, phase locked to the line voltage waveform. Therefore, the
devices switch on and off at the line frequency of 50 or 60 Hz.
 2. Switching (forced-commutated) converters, where the controllable switches in the
converter are turned on and off at frequencies that are high compared to the line frequency. In
spite of the high switching frequency internal to the converter, the converter output may be
either dc or at a frequency comparable to the line frequency. As a side note in a switching
converter, if the input appears as a voltage source, then the output must appear as a current
source, or vice versa.
3. Resonant and quasi-resonant converters, where the controllable switches turn on
and/or turn off at zero voltage and/or zero current.
[Link] AND DISADVANTAGES OF POWER-ELECTRONIC
CONVERTERS
The advantages possessed by power-electronic systems are:
(i) High efficiency due to low loss in power-semiconductor devices.
(ii) High reliability of power-electronic converter systems.
(iii) Long life and less maintenance due to the absence of any moving parts.
(iv) Fast dynamic response of the power-electronic system as compared to electromechanical
converter systems.
(v) Small size and less weight result in less floor space and therefore lower installation cost.
(vi) Mass production of power-semiconductor devices has resulted in lower cost of the
converter equipment.
Systems based on power electronics, however, suffer from the following disadvantages:
(a) Power-electronic converter circuits have a tendency to generate harmonics in the supply
system as well as in the load circuit.
In the load circuit, the performance of the load is influenced, for example, a high harmonic
content in the load circuit causes commutation problems in dc machines, increased motor
heating and more acoustical noise in both dc and ac machines. So, steps must be taken to filter
these out from the output side of a converter.
In the supply system, the harmonics distort the voltage waveform and seriously
influence the performance of other equipment connected to the same supply line. In addition,
the harmonics in the supply line can also cause interference with communication lines. It is,
therefore, necessary to insert filters on the input side of a converter.
(b) Ac to dc and ac to ac converters operate at a low input power factor under certain operating
conditions. In order to avoid a low pf, some special measures have to be adopted.
(c) Power-electronic controllers have low overload capacity. These converters must, therefore,
be rated for taking momentary overloads. As such, cost of power electronic controller may
increase.
(d) Regeneration of power is difficult in power electronic converter systems.
 The advantages possessed by power electronic converters far outweigh their
disadvantages mentioned above. As a result, semiconductor-based converters are being
extensively employed in systems where power flow is to be regulated. As already stated,
conventional power controllers used in many installations have already been replaced by
semiconductor-based power electronic controllers.
[Link] NATURE OF POWER ELECTRONICS
The discussion in this introductory chapter shows that the study of power electronics
encompasses many fields within electrical engineering, as illustrated by Fig. 1-10. These
include power systems, solid-state electronics, electrical machines, analog/digital control and
signal processing, electromagnetic field calculations, and so on. Combining the knowledge of
these diverse fields makes the study of power electronics challenging as well as interesting.
There are many potential advances in all these fields that will improve the prospects for
applying power electronics to new applications.

Figure. Interdisciplinary nature of power electronics

[Link]
1.1. (a) What is power electronics? Discuss briefly the concept of power electronics.
(b) What is a converter? Illustrate your answer with examples.
(c) Enumerate at least ten applications of power electronics.
(d) Give the advantages and disadvantages of power electronic converters.
1.2 (a) Discuss the various types of power electronic converters.
(b) Describe a power electronic system with its general block diagram. (Linear and
SMPS)
1.3 (a) Give the differences between an ac voltage controller and a cycloconverters.
(b) What is power-electronic module? Describe smart-power.
(c) Discus the scope and specific applications of power electronics
(d) Discuss the relationship between power electronics and other electrical
engineering fields
2 POWER SEMICONDUCTOR DEVICES
Based on (i) turn-on and turn-off characteristics and (ii) gate signal requirements, the power
semiconductor devices can be classified as under:
(a) Diodes: These are uncontrolled rectifying devices. Their on and off states are controlled
by power supply.
(b) Thyristors: These have controlled turned-on by a gate signal. After thyristors are turned-
on, they remain latched-in on-state due to internal regenerative action.
(c) Controllable switches: These devices are turned-on and turned-off by the application
of control signals. The devices which behave as controllable switches are BJT, MOSFET,
GTO, SITH, IGBT, SIT and MCT.
SCR, GTO, SITH and MCT require pulse-gate signal for turning them on; once these
devices are on, gate pulse is removed. But BJT, MOSFET, IGBT and SIT require
continuous signal for keeping them in tum-on state.
The devices which can withstand unipolar voltage are BJT, MOSFET, IGBT and MCT.
Thyristors and GTOs are capable of supporting bipolar voltages.
Triac and RCT (reverse conducting thyristor) possess bidirectional current capability
whereas all other remaining devices (diode, SCR, GTO, BJT, MOSFET, IGBT, SIT, SITH,
MCT) are unidirectional current devices.

Power Semiconductor Diodes and Transistors

Power semiconductor diodes are similar to low-power p-n junction diodes, called signal
diodes. Similarly, power transistors are identical with npn or pnp signal transistors. As a
matter of fact, power semiconductor devices are more complex in structure and in operation
than their low-power counterparts. This complexity arises because low-power devices must
be modified in order to make them suitable for high-power applications, for example,
power diodes are constructed with n- layer, called drift region, between p+ layer (anode)
and n+ layer or substrate (cathode). This is done to support large blocking voltages. This n-
type layer is, however, 1tot present in signal diodes. The voltage, current and power ratings
of power diodes and transistors are much higher than the corresponding ratings for signal
devices. In addition, power devices operate at lower switching speeds whereas signal
diodes and transistors operate at higher switching speeds. Power semiconductor devices
are used extensively in power-electronic circuits. Some applications of power diodes
include their use as freewheeling diodes, for AC to DC conversion, for recovery of trapped
energy etc. Power transistors, used as a switching device in power-electronic circuits, must
operate in the saturation region in order that their on-state voltage drop is low. Their
applications as switching elements include dc choppers and inverters.
2.1. POWER DIODES
Power diode is a two-layer, two-terminal, p-n semiconductor device. It has one pn-junction
formed by alloying, diffusing or epitaxial growth. The two terminals of diode are called
anode and cathode, Fig. 2.1 (a). Two important characteristics of power diodes are now
described.

2.1.1 Diode V-I Characteristics

When anode is positive with respect to cathode, diode is said to be forward biased. With
increase of the source voltage v. from zero value, initially diode current is zero. From Vs =
0 to cut-in voltage, the forward-diode current is very small. Cut-in voltage is also known
as threshold voltage or turn-on voltage. Beyond cut-in voltage, the diode current rises
rapidly and the diode is said to conduct. For silicon diode, the cut-in voltage is around 0. 7
V. When diode conducts, there is a forward voltage drop of the order of 0.8 to 1 V.
When cathode is positive with respect to anode, the diode is said to be reverse biased. In
the reverse biased condition of the diode, a small reverse current, called leakage current,
of the order of microamperes or milliamperes (for large diodes) flows. The leakage current
increases slowly with the reverse voltage until breakdown or avalanche voltage is reached.
At this breakdown voltage, diode is turned on in the reversed direction. If current in the
reversed direction is not limited by a series resistance, the current will become quite high
to destroy the diode. The reverse avalanche breakdown of a diode is avoided by operating
the diode below specified peak repetitive reverse voltage 𝑉𝑉𝑅𝑅𝑅𝑅𝑅𝑅 .· Fig. 2.1 (c) illustrates
diode characteristics where 𝑉𝑉𝑅𝑅𝑅𝑅𝑅𝑅 and cut-in voltage are shown.

Fig. 2.1. (a) p-n junction (b) diode symbol (c) V-I characteristics of diode.

Diode manufacturers also indicate the value of peak inverse voltage (PIV) of a diode. This
is the largest reverse voltage to which a diode may be subjected during its working. PIV is
the same as 𝑉𝑉𝑅𝑅𝑅𝑅𝑅𝑅 ·
The power diodes are now available with forward current ratings of 1 A to several
thousands of amperes and with reverse voltage ratings of 50 V to 3000 V or more.
2.1.2. Diode Reverse Recovery Characteristics
After the forward diode current decays to zero, the diode continues to conduct in the reverse
direction because of the presence of stored charges in the two layers. The reverse current
flows for a time called reverse recovery time 𝑡𝑡𝑟𝑟𝑟𝑟 . The diode regains its blocking capability
until reverse recovery current decays to zero. The reverse recovery time 𝑡𝑡𝑟𝑟𝑟𝑟 is defined as
the time between the instant forward diode current become& zero and the instant reverse
recovery current decays to 25% of its reverse peak value 𝐼𝐼𝑅𝑅𝑅𝑅 as shown in Fig. 2.2 (a).

The reverse recovery time is composed of two segments of time 𝑡𝑡𝑎𝑎 and 𝑡𝑡𝑏𝑏 , i.e., 𝑡𝑡𝑟𝑟𝑟𝑟 = 𝑡𝑡𝑎𝑎 +
𝑡𝑡𝑏𝑏
Time 𝑡𝑡𝑎𝑎 is the time between zero crossing of forward current and peak reverse current 𝐼𝐼𝑅𝑅𝑅𝑅 .
During the time 𝑡𝑡𝑎𝑎 , charge stored in depletion region is removed. Time 𝑡𝑡𝑏𝑏 is measured
from the instant of 𝐼𝐼𝑅𝑅𝑅𝑅 to the instant where 0.25 𝐼𝐼𝑅𝑅𝑅𝑅 is reached, Fig. 2.2(a). During 𝑡𝑡𝑏𝑏
charge from the two semiconductor layers is removed. The shaded area in Fig. 2.2(a)
represents the stored charge, or reverse recovery charge, 𝑄𝑄𝑅𝑅 which must be removed during
the reverse recovery time 𝑡𝑡𝑟𝑟𝑟𝑟 . The ratio 𝑡𝑡𝑏𝑏 /𝑡𝑡𝑎𝑎 is called the softness factor or S-factor. This
factor is a measure of the voltage transients that occur during the time diode recovers. Its
usual value is unity and this indicates low oscillatory reverse recovery process. In case S-
factor is small, diode has large oscillatory over voltages. A diode with S-factor equal to
one is called soft-recovery diode and a diode with S-factor less than one is called snappy-
recovery diode or fast-recovery diode. In Fig. 2.2 (b) is shown the waveform of forward-
voltage drop 𝑉𝑉𝑓𝑓 across the diode. The product of 𝑉𝑉𝑓𝑓 and 𝑖𝑖𝑓𝑓 gives the power loss in a diode.
Its variation is shown in Fig.2.2 (c). The average value of 𝑣𝑣𝑓𝑓 𝑖𝑖𝑓𝑓 gives the total power loss
in a diode. Fig. 2.2 (c) reveals that major power loss in a diode occurs during the period 𝑡𝑡𝑏𝑏 .

Fig. 2.2. Reverse recovery characteristics (a) variation of forward current 𝑖𝑖𝑓𝑓 (b) forward
voltage drop 𝑣𝑣𝑓𝑓 and (c) power loss in a diode.

It is noticed from Fig. 2.2 (a) that peak inverse current 𝐼𝐼𝑅𝑅𝑅𝑅 can be expressed as
𝑑𝑑𝑑𝑑
𝐼𝐼𝑅𝑅𝑅𝑅 = 𝑡𝑡𝑎𝑎 𝑑𝑑𝑑𝑑 …….. (2.1)
𝑑𝑑𝑑𝑑
Where, 𝑑𝑑𝑑𝑑
is the rate of change of reverse current.
The reverse recovery characteristics of Fig.2.2(a) can be taken to be triangular. Under this
assumption, storage charge QR, from Fig.2.2(a), is given by
1
𝑄𝑄𝑅𝑅 = 2 𝐼𝐼𝑅𝑅𝑅𝑅 ⋅ 𝑡𝑡𝑟𝑟𝑟𝑟
𝟐𝟐𝑄𝑄𝑅𝑅 …….. (2.2)
𝑜𝑜𝑜𝑜 𝐼𝐼𝑅𝑅𝑅𝑅 = 𝑡𝑡𝑟𝑟𝑟𝑟
If 𝑡𝑡𝑟𝑟𝑟𝑟 ≅ 𝑡𝑡𝑎𝑎 , then from Eq. (2.1),
𝑑𝑑𝑑𝑑
𝐼𝐼𝑅𝑅𝑅𝑅 = 𝑡𝑡𝑟𝑟𝑟𝑟 ⋅ 𝑑𝑑𝑑𝑑 ..…… (2.3)
From Eqs. (2.2) and (2.3), we get
𝑑𝑑𝑑𝑑 2𝑄𝑄
𝑡𝑡𝑟𝑟𝑟𝑟 ⋅ 𝑑𝑑𝑑𝑑 = 𝑡𝑡 𝑅𝑅
𝑟𝑟𝑟𝑟
1/2 ..…… (2.4)
2𝑄𝑄
𝑅𝑅
𝑡𝑡𝑟𝑟𝑟𝑟 = �(𝑑𝑑𝑑𝑑/𝑑𝑑𝑑𝑑) �
From Eq. (2.1), with 𝑡𝑡𝑎𝑎 ≡ 𝑡𝑡𝑟𝑟𝑟𝑟 , we get
𝑑𝑑𝑑𝑑 2𝑄𝑄 1/2 𝑑𝑑𝑑𝑑
𝑅𝑅
𝐼𝐼𝑅𝑅𝑅𝑅 = 𝑡𝑡𝑟𝑟𝑟𝑟 ⋅ 𝑑𝑑𝑑𝑑 = �(𝑑𝑑𝑑𝑑/𝑑𝑑𝑑𝑑) � ⋅ 𝑑𝑑𝑑𝑑
..…… (2.5)
𝑑𝑑𝑑𝑑 1/2
= �2𝑄𝑄𝑅𝑅 �𝑑𝑑𝑑𝑑�
It is seen from Eqs. (2.4) and (2.5) that reverse recovery time and peak inverse current are
𝑑𝑑𝑑𝑑
dependent on storage charge and rate of change of current 𝑑𝑑𝑑𝑑. The storage charge depends
upon the forward diode current 𝐼𝐼𝐹𝐹 . This shows that reverse recovery time and peak inverse
current depend on forward field current.

A power-electronics engineer must know peak reverse current 𝐼𝐼𝑅𝑅𝑅𝑅 stored charge 𝑄𝑄𝑅𝑅 , S-
factor, PIV etc in order to be able to design the circuitry employing power diodes. These
parameters are usually specified in the catalogue supplied by the diode manufacturers.

2.2. TYPES OF POWER DIODES

Diodes are classified according to their reverse recovery characteristics. The three types of
power diodes are as under:
(i) General purpose diodes
(ii) Fast recovery diodes
(iii) Schottky diodes.
These are now described briefly.
2.2.1. General-purpose Diodes
These diodes have relatively high reverse recovery time, of the order of about 25 μs. Their
current ratings vary from 1 A to several thousand amperes and the range of voltage rating
is from 50 V to about 5 kV. Applications of power diodes of this type include battery
charging, electric traction, electroplating, welding and uninterruptible power supplies
(UPS).
2.2.2. Fast-recovery Diodes
The diodes with low reverse recovery time, of about 5 μs or less, are classified as fast-
recovery diodes. These are used in choppers, commutation circuits, switched mode power
supplies, induction heating etc. Their current ratings vary from about 1 A to several
thousand amperes and voltage ratings from 50 V to about 3 kV.
For voltage ratings below about 400 V, the epitaxial process is used for diode fabrication.
These diodes have fast recovery time, as low as 50 ns. For voltage ratings above 400 V,
diffusion technique is used for the fabrication of diodes. In order to shorten the reverse-
recovery time, platinum or gold doping is carried out. But this doping may increase the
forward voltage drop in a diode.
2.2.3. Schottky Diodes
This class of diodes use metal-to-semiconductor junction for rectification purposes instead
of pn-junction. Schottky diodes are characterised by very fast recovery time and low
forward voltage drop. Rectified current flow is by majority carriers only and this avoids
the turn-off delay accompanied with minority carrier recombination. Their reverse voltage
ratings are limited to about 100 V and forward current ratings vary from 1 A to 300 A.
Applications of Schottky diodes include high-frequency instrumentation and switching
power supplies. The electrical and thermal characteristics of power diodes are similar to
those of thyristors
POWER TRANSISTORS
Power diodes are uncontrolled devices. In other words, their turn-on and turn-off
characteristics are not under control. Power transistors, however, possess controlled
characteristics. These are turned on when a current signal is given to base, or control,
terminal. The transistor remains in the on-state so long as control signal is present. When
this control signal is removed, a power transistor is turned off.
Power transistors are of three types as under:
(i) Bipolar junction transistors (BJTs)
(ii) Metal-oxide-semiconductor field-effect transistors (MOSFETs)
(iii) Insulated gate bipolar transistors (IGBTs)

These three types are now described one after the other.

2.3.1. Bipolar Junction Transistors

A bipolar transistor is a three-layer, two junction npn or pnp semiconductor device. With
one p-region sandwiched by two n-regions, Fig. 2.3(a), npn transistor is obtained. With two
p-regions sandwiching one n-region, Fig. 2.3(b), pnp transistor is obtained. The term'
bipolar 'denotes that the current flow in the device is due to the movement of both holes
and electrons.
A BJT has three terminals named collector, emitter and base. An emitter is indicated by an
arrowhead indicating the direction of emitter current. No arrow is associated with base or
collector.

Fig. 2.3. Bipolar junction transistors (a) npn type and (b)pnp type.

[Link]. Steady-state Characteristics. Out of the three possible circuit configurations for
a transistor, common-emitter arrangement is more common in switching applications. So,
henceforth, npn transistors will only be considered.
;Input characteristics. A graph between base current 𝑰𝑰𝑩𝑩 and base-emitter voltage 𝑉𝑉𝐵𝐵𝐵𝐵
gives input characteristics. As the base-emitter junction of a transistor is like a diode, 𝑰𝑰𝑩𝑩
versus 𝑉𝑉𝐵𝐵𝐵𝐵 graph resembles a diode curve. When collector-emitter voltage 𝑉𝑉𝐶𝐶𝐶𝐶2 is more
than 𝑉𝑉𝐶𝐶𝐶𝐶1 base current decreases as shown in Fig. 2.4 (b).
Fig. 2.4.(a) npn transistor circuit characteristics, (b) input characteristics and (c) output
characteristics.

Output characteristics. A graph between collector current 𝐼𝐼𝐶𝐶 and collector-emitter voltage
𝑉𝑉𝐶𝐶𝐶𝐶 gives output characteristics of a transistor. For zero base current, i.e. for 𝐼𝐼𝐵𝐵 = 0, as 𝑉𝑉𝐶𝐶𝐶𝐶
is increased, a small leakage (collector) current exists as shown in Fig. 2.4 (c). As the base
current is increased from 𝐼𝐼𝐵𝐵 = 0 to 𝐼𝐼𝐵𝐵1 , 𝐼𝐼𝐵𝐵2 etc, collector current also rises as shown in Fig.
2.4 (c).

Fig. 2.5 (a) shows two of the output characteristic curves, 1 for 𝐼𝐼𝐵𝐵 = 0 and 2 for 𝐼𝐼𝐵𝐵 ≠ 0.
The initial part of curve 2, characterised by low 𝑉𝑉𝐶𝐶𝐶𝐶 , is called the saturation region. In this
region, the transistor acts like a switch. The flat part of curve 2, indicated by increasing 𝑉𝑉𝐶𝐶𝐶𝐶
and almost constant 𝐼𝐼𝐶𝐶 , is the active region. In this region, transistor acts like an amplifier.
Almost vertically rising curve is the breakdown region which must be avoided at all costs.

Fig. 2.5. (a) Output characteristics and load line for npn transistor and (b) electron flow
in an npn transistor.
For load resistor 𝑅𝑅𝐶𝐶 , Fig. 2.4 (a), the collector current 𝐼𝐼𝐶𝐶 is given by

𝑉𝑉𝐶𝐶𝐶𝐶 −𝑉𝑉𝐶𝐶𝐶𝐶
𝐼𝐼𝐶𝐶 = ….. (2.6)
𝑅𝑅𝐶𝐶
This is the equation of load line. It is shown as line AB in Fig. 2.5 (a). A load line is the
locus of all possible operating points. Ideally, when transistor is on, 𝑉𝑉𝐶𝐶𝐶𝐶 is zero and 𝐼𝐼𝐸𝐸 =
𝑉𝑉𝐶𝐶𝐶𝐶 /𝑅𝑅𝐸𝐸 . This collector current is shown by point A on the vertical axis. When the transistor
is off, or in the cut-off region, 𝑉𝑉𝐶𝐶𝐶𝐶 appears across collector-emitter terminals and there is
no collector current. This value is indicated by point B on the horizontal axis. For the
resistive load, the line joining points A and B is the load line.

Relation between 𝛂𝛂 and 𝛃𝛃 Most of the electrons, proportional to 𝐼𝐼𝐸𝐸 given out by emitter,
reach the collector as shown in Fig. 2.5 (b). In other words, collector current 𝐼𝐼𝐶𝐶 , though
less than emitter current 𝐼𝐼𝐸𝐸 , is almost equal to 𝐼𝐼𝐸𝐸 . A symbol 𝛂𝛂 is used to indicate how close
in value these two currents are. Here α, called forward current gain, is defined as

𝐼𝐼𝐶𝐶
α=
𝐼𝐼𝐸𝐸
As 𝐼𝐼𝐶𝐶 < 𝐼𝐼𝐸𝐸 , value of 𝛂𝛂 varies from 0.95 to 0.99.

In a transistor, base current is effectively the input current and collector current is the output
current. The ratio of collector (output) current 𝐼𝐼𝐶𝐶 to base (input) current 𝐼𝐼𝐵𝐵 is known as the
current gain 𝛽𝛽.
𝐼𝐼
∴ 𝛽𝛽 = 𝐼𝐼 𝐶𝐶 ….. 2.7
𝐵𝐵
As 𝐼𝐼𝐵𝐵 is much smaller, 𝛽𝛽 is much more than unity; its value varies from 50 to 300. In
another system of analysis, called ℎ parameters, ℎ𝐹𝐹𝐹𝐹 is used in place of 𝛽𝛽.
𝐼𝐼𝐶𝐶
𝛽𝛽 = ℎ𝐹𝐹𝐹𝐹 =
𝑙𝑙𝐵𝐵
Use of KCL in Fig. 2.4(𝑎𝑎) gives
𝐼𝐼𝐸𝐸 = 𝐼𝐼𝐶𝐶 + 𝐼𝐼𝐵𝐵 ….. 2.8
Remember that emitter current is the largest of the three currents, collector current is almost
equal to, but less than, emitter current. Base current has the least value. Dividing both sides
of 𝐸𝐸𝐸𝐸. (2.8) by 𝐼𝐼𝑐𝑐 , we get
and
𝐼𝐼𝐸𝐸 𝐼𝐼
= 1 + 𝐼𝐼𝐵𝐵
𝐼𝐼 𝐶𝐶 𝐶𝐶
1 1
𝛼𝛼
= 1 + 𝛽𝛽
𝛼𝛼 ….. 2.9, 2.10
𝛽𝛽 = 1−𝛼𝛼
𝛽𝛽
𝛼𝛼 = 𝛽𝛽+1
Transistor Switch. Transistor operation as a switch means that transistor operates either
in the saturation region or in the cut-off region and nowhere else on the load line. As an
ideal switch, the transistor operates at point 𝐴𝐴 in the saturated state as closed switch with
𝑉𝑉𝐶𝐶𝐶𝐶 = 0 and at point 𝐵𝐵 in the cut-off state as an open switch with 𝐼𝐼𝐶𝐶 = 0, Fig. 2.5 (a). In
practice, the large base current will cause the transistor to work in the saturation region at
point 𝐴𝐴′ with small saturation voltage 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 . Here subscript 𝑆𝑆 is used to denote saturated
value. Voltage 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 represents on-state voltage drop of the transistor which is of the order
of about 1 V. When the control, or base, signal is reduced to zero, the transistor is turned
off and its operation shifts to 𝐵𝐵 ′ in the cut-off region, Fig. 2.5(𝑎𝑎). A small leakage current
𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 flows in the collector circuit when the transistor is off.
For Fig. 2.4 (a), KVL for the circuit consisting of 𝑉𝑉𝐵𝐵 , 𝑅𝑅𝐵𝐵 and emitter gives
𝑉𝑉𝐵𝐵 − 𝑅𝑅𝐵𝐵 𝐼𝐼𝐵𝐵 − 𝑉𝑉𝐵𝐵𝐵𝐵 = 0
or
𝑉𝑉𝐵𝐵 − 𝑉𝑉𝐵𝐵𝐵𝐵
𝐼𝐼𝐵𝐵 =
𝑅𝑅𝐵𝐵
Also, from Fig. 2.4(𝑎𝑎)
𝑉𝑉𝐶𝐶𝐶𝐶 = 𝑉𝑉𝐶𝐶𝐶𝐶 + 𝐼𝐼𝐶𝐶 𝑅𝑅𝐶𝐶
or
𝑉𝑉𝐶𝐶𝐶𝐶 = 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝐼𝐼𝐶𝐶 𝑅𝑅𝐶𝐶 = 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝛽𝛽𝐼𝐼𝐵𝐵 𝑅𝑅𝐶𝐶
𝛽𝛽𝑅𝑅 ….. 2.11
= 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝐶𝐶 (𝑉𝑉𝐵𝐵 − 𝑉𝑉𝐵𝐵𝐵𝐵 )
𝑅𝑅𝐵𝐵
Also
𝑉𝑉𝐶𝐶𝐶𝐶 = 𝑉𝑉𝐶𝐶𝐶𝐶 + 𝑉𝑉𝐵𝐵𝐵𝐵
or
𝑉𝑉𝐶𝐶𝐶𝐶 = 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐵𝐵𝐵𝐵 ….. 2.12
If 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 is the collector-emitter saturation voltage, then collector current 𝐼𝐼𝐶𝐶𝐶𝐶 is given by
𝑉𝑉 −𝑉𝑉
𝐼𝐼𝐶𝐶𝐶𝐶 = 𝐶𝐶𝐶𝐶 𝑅𝑅 𝐶𝐶𝐶𝐶𝐶𝐶 ….. 2.13
𝐶𝐶
and
𝐼𝐼𝐶𝐶𝐶𝐶
𝐼𝐼𝐵𝐵𝐵𝐵 = ….. 2.14
𝛽𝛽
Where, 𝐼𝐼𝐵𝐵𝐵𝐵 is the base current that produces saturation.
If base current is less than 𝐼𝐼𝐵𝐵𝐵𝐵 , the transistor operates in the active region, i.e, somewhere
between the saturation and cut-off points. If base current is more than 𝐼𝐼𝐵𝐵𝐵𝐵 , 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 is almost
zero and collector current from Eq. (2.13) is given by 𝐼𝐼𝐶𝐶𝐶𝐶 = 𝑉𝑉𝐶𝐶𝐶𝐶 /𝑅𝑅𝐶𝐶 . This shows that
collector current at saturation remains substantially constant even if base current is
increased.
With base current more than 𝐼𝐼𝐵𝐵𝐵𝐵 , hard drive of transistor is obtained. With hard saturation,
𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 becomes low and on-state losses of transistor are reduced. Under hard-drive
conditions, the ratio of 𝐼𝐼𝐵𝐵 and 𝐼𝐼𝐵𝐵𝐵𝐵 is defined as the overdrive factor (ODF).
𝐼𝐼
𝑂𝑂𝑂𝑂𝑂𝑂 = 𝐼𝐼 𝐵𝐵 ….. 2.15
𝐵𝐵𝐵𝐵
The ratio of 𝐼𝐼𝐶𝐶𝐶𝐶 to 𝐼𝐼𝐵𝐵 is called forced current gain 𝛽𝛽𝑓𝑓 where;
𝐼𝐼𝐶𝐶𝐶𝐶
𝛽𝛽𝑓𝑓 = < natural current gain 𝛽𝛽 or ℎ𝐹𝐹𝐹𝐹 ….. 2.16
𝐼𝐼𝐵𝐵
The total power loss in the two junctions of a transistor is
𝑃𝑃𝑇𝑇 = 𝑉𝑉𝐵𝐵𝐵𝐵 𝐼𝐼𝐵𝐵 + 𝑉𝑉𝐶𝐶𝐶𝐶 𝐼𝐼𝐶𝐶 ….. 2.17
Under saturated state, 𝑉𝑉𝐵𝐵𝐵𝐵𝐵𝐵 is greater than 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 and Eq. (2.12) shows that 𝑉𝑉𝐶𝐶𝐶𝐶 is negative.
It means both transistor junctions are forward biased under saturated condition.

[Link]. Transistor Switching Performance.

A transistor cannot be turned on instantly because of the presence of internal capacitances.
Fig. 2.6 (b) shows switching waveforms of an 𝑛𝑛𝑛𝑛𝑛𝑛 transistor with resistive load between
collector and emitter Fig. 𝟐𝟐. 𝟔𝟔(𝑎𝑎). When base-emitter voltage 𝑉𝑉𝐵𝐵𝐵𝐵 is applied, the base
current rises to 𝐼𝐼𝐵𝐵𝐵𝐵 ; the collector current, however, remains zero or equal to collector-
emitter leakage current 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 as shown. After sometime delay 𝑡𝑡𝑑𝑑 , called delay time, the
collector current begins to rise. This delay is due to the time required to charge base-emitter
capacitance to 𝑉𝑉𝐵𝐵𝐵𝐵𝐵𝐵 = 0.7 V. After this delay 𝑡𝑡𝑑𝑑 , collector current rises to steady state value
𝐼𝐼𝑐𝑐𝑐𝑐 in time 𝑡𝑡𝑟𝑟 , which is known as rise time. This means that turn-on time for BJT is 𝑡𝑡𝑜𝑜𝑜𝑜 =
𝑡𝑡𝑑𝑑 + 𝑡𝑡𝑟𝑟 . Rise time depends upon the input capacitances. During rise time 𝑡𝑡𝑟𝑟 , collector-
emitter voltage falls from 𝑉𝑉𝐶𝐶𝐶𝐶 to 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 . The transistor remains in the on and saturated state
so long as forward base current is maintained.
When the base-emitter voltage 𝑉𝑉𝐵𝐵𝐵𝐵 is removed at time 𝑡𝑡1 , the collector current does not
change for a time 𝑡𝑡𝑠𝑠 , called storage time. During 𝑡𝑡𝑠𝑠 , saturating charge is removed from the
base. After 𝑡𝑡𝑠𝑠 , collector current begins to fall and at the same time, collector voltage starts
building up. After times 𝑡𝑡𝑓𝑓 called fall time, 𝐼𝐼𝐶𝐶 decreases to 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 (almost zero) and collector-
emitter voltage rises to 𝑉𝑉𝐶𝐶𝐶𝐶. Sum of storage time and fall time gives the transistor turn-off time, i.e. 𝑡𝑡off =
𝑡𝑡𝑠𝑠 + 𝑡𝑡𝑓𝑓 . The various waveforms during transistor switching are shown

Fig, 2.6. (𝑎𝑎) Transistor with resistive load and (𝑏𝑏) switching waveforms for 𝑛𝑛𝑛𝑛𝑛𝑛 transistor.
in Fig. 2.6(𝑏𝑏). In this figure, 𝑡𝑡𝑛𝑛 = conduction period, 𝑡𝑡0 = off period and 𝑇𝑇 = 1/𝑓𝑓 is the
periodic time.

2.3. 1.3. Safe Operating Area.

The safe operating area (SOA or SOAR ) of a power transistor specifies the safe operating
limits of collector current 𝐼𝐼𝐶𝐶 versus collector-emitter voltage 𝑉𝑉𝐶𝐶𝐶𝐶 For reliable operation of
the transistor, the collector current and voltage must always lie within this area. Actually,
two types of safe operating areas are specified by the manufacturers, FBSOA and RBSOA.
The forward-base safe operating area (FBSOA) pertains to the transistor operation when
base-emitter junction is forward biased to turn-on the transistor. For a power transistor,
Fig. 2.7 shows tyoical FBSOA for its dc as well as single-pulse operation. The scale for 𝐼𝐼𝐶𝐶
and 𝑉𝑉𝐶𝐶𝐶𝐶 are logarithmic. Boundary 𝐴𝐴𝐴𝐴 is the maximum limit for dc and continuous current
for 𝑉𝑉𝐶𝐶𝐶𝐶 less than about 80 V. For 𝑉𝑉𝐶𝐶𝐶𝐶 for more than 80 V, collector current has to be reduced
to boundary BC so as to limit the junction temperature to safe values. For still higher 𝑉𝑉𝐶𝐶𝐶𝐶 ,
corrent should further be reduced so as to avoid secondary breakdown limit. Boundary CD
current should further be reduced so as to aroid secondary breakdown limit. Boundary CD
for this particular transistor.
For pulsed operation, power transistor can dissipate mare peak power so long as average
power loss is within safe limits of junction temperature. In Fig. 2.7; 5 ms, 500𝜇𝜇s etc.
indicate pulse widths for which transistor is on. It is seen that FBSOA increases as pulse-
width is decreased.
It should he noted that FBSOA curves, as given by the manufacturers, are for a case
temperature of 25∘ C and for dc and single-pulse operation. In order to take into
consideration, the actual working temperature and repetitive nature of the pulses, these
curves must be modified with the help of thermal impedance of the device.

Fig. 2.7. Typical forward biased safe Fig, 2.8. Typical reverse-block safe
operating area (FBSOA) for a power operating area (RBSOA) for a power
transistor (logarithmic scale) transistor.
During turn-off, a transistor is subjected to high current and high voltage with base-emitter
junction reverse biased. Safe operating area for transistor during turn-off is specified as
reverse blocking safe operating area (RBSOA). This RBSOA is a plot of collector current
versus collector-emitter voltage as shown in Fig. 2.8. RBSOA specifies the limits of
transistor operation at turn-off when the base current is zero or when the base-emitter
junction is reverse biased (i.e. with base current negative). With increased reverse bias,
area RBSOA decreases in size as shown in Fig. 2.8.

Example 2.1.
For a power transistor, typical switching waveforms are shown in Fig. 2.6 The various
parameters of the transistor circuit are as under:𝑉𝑉𝐶𝐶𝐶𝐶 = 220𝑉𝑉, 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 = 2𝑉𝑉, 𝐼𝐼𝐶𝐶𝐶𝐶 = 80𝐴𝐴, 𝑡𝑡𝑑𝑑 =
0.4𝜇𝜇𝑠𝑠 , 𝑡𝑡𝑟𝑟 = 1𝜇𝜇𝜇𝜇, 𝑡𝑡𝑛𝑛 = 50𝜇𝜇𝜇𝜇,
𝑡𝑡𝑠𝑠 = 3𝜇𝜇s, 𝑡𝑡𝑓𝑓 = 2𝜇𝜇s, 𝑡𝑡𝑜𝑜 = 40𝜇𝜇s, 𝑓𝑓 = 5kHz. Collector to emitter leakage current = 2 mA.
Determine average power loss due to collector current during 𝑡𝑡𝑜𝑜𝑜𝑜 and 𝑡𝑡𝑛𝑛 . Find also the
peak instantaneous power loss due to collector current during turn-on time.
Solution.
During delay time, the time limits are 0 ≤ 𝑡𝑡 ≤ 𝑡𝑡𝑑𝑑 . Fig. 2.6 (b) shows that in this time,
𝑖𝑖𝐶𝐶 (𝑡𝑡) = 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 and 𝑣𝑣𝐶𝐶𝐶𝐶 (𝑡𝑡) = 𝑉𝑉𝐶𝐶𝐶𝐶
∴ Instantaneous power loss during delay time is
𝑃𝑃𝑑𝑑 (𝑡𝑡) = 𝑖𝑖𝐶𝐶 𝑈𝑈𝐶𝐶𝐶𝐶 = 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶 = 2 × 10−3 × 220 = 0.44 W
Average power loss during delay time with 0 ≤ 𝑡𝑡 ≤ 𝑡𝑡𝑑𝑑 is given by
1 𝑡𝑡𝑑𝑑
𝑃𝑃𝑑𝑑 = � 𝑖𝑖𝐶𝐶 (𝑡𝑡) ⋅ 𝑣𝑣𝐶𝐶𝐶𝐶 (𝑡𝑡)𝑑𝑑𝑑𝑑
𝑇𝑇 0
1 𝑡𝑡𝑑𝑑
= � 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶 𝑑𝑑𝑑𝑑 = 𝑓𝑓 ⋅ 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡𝑑𝑑
𝑇𝑇 0
= 5 × 103 × 2 × 10−3 × 220 × 0.4 × 10−6 = 0.88 mW
1
𝑓𝑓 = = frequency of transistor switching
𝑇𝑇
Where;
0 ≤ 𝑡𝑡 ≤ 𝑡𝑡𝑟𝑟 ,
During rise time, and
𝐼𝐼𝐶𝐶𝐶𝐶
𝑖𝑖𝐶𝐶 (𝑡𝑡) = ⋅ 𝑡𝑡
𝑡𝑡𝑟𝑟
𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
𝑣𝑣𝐶𝐶𝐶𝐶 (𝑡𝑡) = �𝑉𝑉𝐶𝐶𝐶𝐶 − ⋅ 𝑡𝑡�
𝑡𝑡𝑟𝑟
∴ Average power loss during rise time is
1 𝑡𝑡𝑟𝑟 𝐼𝐼𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
𝑃𝑃𝑟𝑟 = � ⋅ 𝑡𝑡 �𝑉𝑉𝐶𝐶𝐶𝐶 − ⋅ 𝑡𝑡� 𝑑𝑑𝑑𝑑
𝑇𝑇 0 𝑡𝑡𝑟𝑟 𝑡𝑡𝑟𝑟
𝑉𝑉𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
= 𝑓𝑓 ⋅ 𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡𝑟𝑟 � − �
2 3
220 220 − 2
= 5 × 103 × 80 × 1 × 10−6 � − � = 14.933 W
2 3
Instantaneous power loss during rise time is
𝐼𝐼𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
𝑃𝑃𝑟𝑟 (𝑡𝑡) = ⋅ 𝑡𝑡 �𝑉𝑉𝐶𝐶𝐶𝐶 − ⋅ 𝑡𝑡�
𝑡𝑡𝑟𝑟 𝑡𝑡𝑟𝑟
𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡 𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡 2
= 𝑉𝑉𝐶𝐶𝐶𝐶 − [𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ]
𝑡𝑡𝑟𝑟 𝑡𝑡𝑟𝑟2
𝑑𝑑𝑃𝑃𝑟𝑟 (𝑡𝑡)
𝑑𝑑𝑑𝑑
= 0 gives time 𝑡𝑡𝑚𝑚 at which instantaneous power loss during 𝑡𝑡𝑟𝑟 would be maximum.
It is seen from Eq. (i) that
𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡𝑟𝑟 220 × 1 × 10−6
𝑡𝑡𝑚𝑚 = = = 0.5046𝜇𝜇s
2[𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ] 2[220 × −2]
Peak instantaneous power loss 𝑃𝑃𝑟𝑟𝑟𝑟 during rise time is obtained by substituting the value of
𝑡𝑡 = 𝑡𝑡𝑚𝑚 in Eq. (𝑖𝑖).
2
𝐼𝐼𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡𝑟𝑟 𝐼𝐼𝐶𝐶𝐶𝐶 (𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡𝑟𝑟 )2 [𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ]
𝑃𝑃𝑟𝑟𝑟𝑟 = ⋅ − 2
𝑡𝑡𝑟𝑟 2[𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ] 𝑡𝑡𝑟𝑟 4[𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ]2
2 2
𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶 80 × 220
= = = 4440.4 W
4[𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ] 4[220 − 2]
Total average power loss during turn-on
𝑃𝑃on = 𝑃𝑃𝑑𝑑 + 𝑃𝑃𝑟𝑟 = 0.00088 + 14.933 = 14.9339 W
During conduction time, 0 ≤ 𝑡𝑡 ≤ 𝑡𝑡𝑛𝑛
𝑖𝑖𝐶𝐶 (𝑡𝑡) = 𝐼𝐼𝐶𝐶𝐶𝐶 and 𝑉𝑉𝐶𝐶𝐶𝐶 (𝑡𝑡) = 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
Instantaneous power loss during 𝑡𝑡𝑛𝑛 is
𝑃𝑃𝑛𝑛 (𝑡𝑡) = 𝑖𝑖𝐶𝐶 𝑣𝑣𝐶𝐶𝐶𝐶 = 𝐼𝐼𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 = 80 × 2 = 160 W
Average power loss during conduction period is
1 𝑡𝑡𝑛𝑛
𝑃𝑃𝑛𝑛 = � 𝑖𝑖𝐶𝐶 ⋅ 𝑣𝑣𝐶𝐶𝐶𝐶 ⋅ 𝑑𝑑𝑑𝑑 = 𝑓𝑓𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡𝑛𝑛
𝑇𝑇 0
= 5 × 103 × 80 × 2 × 50 × 10−6 = 40w.

Example 2.2.
Repeat Example 2.1 for obtaining average power loss during turn-off time and off-period,
and also peak instantaneous power loss during fall time due to collector current.
Sketch the instantaneous power loss for period 𝑇𝑇 as a function of time.
Solution.
During storage time, 0 ≤ 𝑡𝑡 ≤ 𝑡𝑡𝑠𝑠 ,
𝑖𝑖𝐶𝐶 (𝑡𝑡) = 𝐼𝐼𝐶𝐶𝐶𝐶 and 𝑣𝑣𝐶𝐶𝐶𝐶 (𝑡𝑡) = 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
Instantaneous power loss during 𝑡𝑡𝑠𝑠 is
𝑃𝑃𝑠𝑠 (𝑡𝑡) = 𝑖𝑖𝐶𝐶 (𝑡𝑡)𝑈𝑈𝐶𝐶𝐶𝐶 (𝑡𝑡)
= 𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 = 80 × 2 = 160 W
Average power loss during 𝑡𝑡𝑠𝑠 is
1 𝑡𝑡𝑠𝑠
𝑃𝑃𝑠𝑠 = � 𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑑𝑑𝑑𝑑 = 𝑓𝑓 ⋅ 𝐼𝐼𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡𝑠𝑠
𝑇𝑇 0
= 5 × 103 × 80 × 2 × 3 × 10−6 = 2.4 W
𝐼𝐼 −𝐼𝐼
During fall time, 0 ≤ 𝑡𝑡 ≤ 𝑡𝑡𝑓𝑓 , 𝑖𝑖𝐶𝐶 (𝑡𝑡) = �𝐼𝐼𝐶𝐶𝐶𝐶 − 𝐶𝐶𝐶𝐶 𝑡𝑡 𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡�
𝑓𝑓
During 𝑡𝑡𝑓𝑓 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 is negligibly small in comparison with 𝐼𝐼𝐶𝐶𝐶𝐶 ,
and
𝑡𝑡
𝑖𝑖𝐶𝐶 (𝑡𝑡) = 𝐼𝐼𝐶𝐶𝐶𝐶 �1 − �
𝑡𝑡𝑓𝑓
𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
𝑣𝑣𝐶𝐶𝐶𝐶 (𝑡𝑡) = ⋅ 𝑡𝑡
𝑡𝑡𝑓𝑓
Average power loss during fall time is
1 𝑡𝑡𝑓𝑓 𝑡𝑡 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
𝑃𝑃𝑓𝑓 = � 𝐼𝐼𝐶𝐶𝐶𝐶 �1 − � � ⋅ 𝑡𝑡� 𝑑𝑑𝑑𝑑
𝑇𝑇 0 𝑡𝑡𝑓𝑓 𝑡𝑡𝑓𝑓
𝐼𝐼𝐶𝐶𝐶𝐶 𝐼𝐼𝐶𝐶𝐶𝐶
= 𝑓𝑓(𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ) ⋅ 𝑡𝑡𝑓𝑓 � − �
2 3
𝐼𝐼𝐶𝐶𝐶𝐶
= 𝑓𝑓 ⋅ 𝑡𝑡𝑓𝑓 ⋅ [𝑉𝑉 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ]
6 𝐶𝐶𝐶𝐶
1
= 5 × 103 × 3 × 10−6 × 80 × × (220 − 2) = 43.6 W
6
Instantaneous power loss during fall time is
 𝑡𝑡 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
𝑃𝑃𝑓𝑓 (𝑡𝑡) = 𝐼𝐼𝐶𝐶𝐶𝐶 �1 − �� 𝑡𝑡�
𝑡𝑡𝑓𝑓 𝑡𝑡𝑓𝑓
𝐼𝐼𝐶𝐶𝐶𝐶 �𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶) ⋅ 𝑡𝑡 𝑡𝑡 2
= − 𝐼𝐼𝐶𝐶𝐶𝐶 (𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 ) 2
𝑡𝑡𝑓𝑓 𝑡𝑡𝑓𝑓
𝑑𝑑𝑃𝑃𝑓𝑓 (𝑡𝑡)
= 0 gives time 𝑡𝑡𝑚𝑚 at which instantaneous power loss during 𝑡𝑡𝑟𝑟 would be maximum.
𝑑𝑑𝑑𝑑
Here 𝑡𝑡𝑚𝑚 = 𝑡𝑡𝑓𝑓 /2.
∴ Peak instantaneous power dissipation during 𝑡𝑡𝑓𝑓 is
1 𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 𝐼𝐼𝐶𝐶𝐶𝐶 (𝑉𝑉𝐶𝐶𝐶𝐶 − 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 )
𝑃𝑃𝑓𝑓𝑓𝑓 = 𝐼𝐼𝐶𝐶𝐶𝐶 �1 − � � �=
2 2 4
80(220 − 2)
= = 4360 W
4
Total average power loss during turn-off process is
𝑃𝑃𝑜𝑜𝑜𝑜𝑜𝑜 = 𝑃𝑃𝑠𝑠 + 𝑃𝑃𝑓𝑓 = 2.4 + 43.6 = 46 W
During off-period, 0 ≤ 𝑡𝑡 ≤ 𝑡𝑡0
𝑖𝑖𝐶𝐶 (𝑡𝑡) = 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 and 𝑣𝑣𝐶𝐶𝐶𝐶 (𝑡𝑡) = 𝑉𝑉𝐶𝐶𝐶𝐶
Instantaneous power loss during 𝑡𝑡𝑜𝑜 is
𝑃𝑃0 (𝑡𝑡) = 𝑖𝑖𝐶𝐶 ⋅ 𝑣𝑣𝐶𝐶𝐶𝐶 = 𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶 = 2 × 10−3 × 220 = 0.44 W
Average power loss during 𝑡𝑡𝑜𝑜 is
1 𝑡𝑡0
𝑃𝑃0 = � 𝑃𝑃0 (𝑡𝑡)𝑑𝑑𝑑𝑑 = 𝑓𝑓𝐼𝐼𝐶𝐶𝐶𝐶𝐶𝐶 ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝑡𝑡0
𝑇𝑇 0
= 5 × 103 × 2 × 10−3 × 220 × 40 × 10−6 = 0.088 W
Total average power loss in power-transistor due to collector current over a period 𝑇𝑇 is
𝑃𝑃𝑇𝑇 = 𝑃𝑃on + 𝑃𝑃𝑛𝑛 + 𝑃𝑃off + 𝑃𝑃0 = 14.9339 + 40 + 46 + 0.088 = 101.022 W

Fig 2.9. Sketch of instantaneous power loss in a transistor for Examples 2.1 and 2.2.
From the data obtained in Examples 2.1 and 2.2, the power loss variation as a function of
time, over a period 𝑇𝑇, is sketched in Fig. 2.9.

Example 2.3.
A power transistor has its switching waveforms as shown in Fig. 2.10. If the average power
loss in the transistor is limited to 300 W, find the switching frequency at which this
transistor can be operated.
1. Solution.
𝑡𝑡𝑜𝑜𝑜𝑜 𝑡𝑡
𝑜𝑜𝑜𝑜
Energy loss during turn-on = ∫0 𝑖𝑖𝐶𝐶 ⋅ = ∫0 (2 × 106 𝑡𝑡)(200 − 5 × 106 𝑡𝑡)𝑑𝑑𝑑𝑑
𝑣𝑣𝐶𝐶𝐶𝐶 𝑑𝑑𝑑𝑑 = 0.1067 watt-sec
𝑡𝑡an 𝐼𝐼𝐶𝐶𝐶𝐶
= ∫0 � × 106 𝑡𝑡� �𝑉𝑉𝐶𝐶𝐶𝐶
50
𝑉𝑉𝐶𝐶𝐶𝐶
− × 106 𝑡𝑡� 𝑑𝑑𝑑𝑑
40

Fig. 2.10. Switching waveform for Example 2.3

𝑡𝑡𝑜𝑜 𝑓𝑓𝑓𝑓 100 200
Energy loss during turn-off = ∫0 �100 − 60 × 106 𝑡𝑡� � 75 × 106 𝑡𝑡� 𝑑𝑑𝑑𝑑
= 0.1603 watt-sec
Total energy loss in one cycle
= 0.1067 + 0.1603 = 0.267 W − sec
Average power loss in transistor
= switching frequency × energy loss in one cycle
∴ Allowable switching frequency,
300
𝑓𝑓 = = 1123.6 Hz
0.267
2.4. POWER MOSFETs
A metal-oxide-semiconductor field-effect transistor (MOSFET) is a recent device
developed by combining the areas of field-effect concept and MOS technology.
A power MOSFET has three terminals called drain, source and gate in place of the
corresponding three terminals collector, emitter and base for BJT. The circuit symbol of
power MOSFET is as shown in Fig. 2.11 (a). Here arrow indicates the direction of electron
flow. A BJT is a current controlled device whereas a power MOSFET is a voltage-
controlled device. As its operation depends upon the flow of majority carriers only,
MOSFET is a unipolar device. The control signal, or base current in BJT is much larger
than the control signal (or gate current) required in a MOSFET. This is because of the fact
that gate circuit impedance in MOSFET is extremely high, of the order of 109 ohm. This
large impedance permits the MOSFET gate to be driven directly from microelectronic
circuits. BJT suffers from second breakdown voltage whereas MOSFET is free from this
problem. Power MOSFETs are now finding increasing applications in low-power high
frequency converters.
 Fig.
2.11. 𝑁𝑁-channel enhancement power MOSFET (a) circuit symbol and (𝑏𝑏) its basic
structure.
Power MOSFETs are of two types; 𝑛𝑛-channel enhancement MOSFET and 𝑝𝑝-channel
enhancement MOSFET. Out of these two types, 𝑛𝑛-channel enhancement MOSFET is more
common because of higher mobility of electrons. As such, only this type of MOSFET is
studied in what follows. A simplified structure of n-channel planar MOSFET of low power
rating is shown in Fig. 2.11 (b). On 𝑝𝑝-substrate (or body), two heavily doped 𝑛𝑛+ regions
are diffused as shown. An insulating layer of silicon dioxide (SiO2 ) is grown on the surface.
Now this insulating layer is etched in order to embed metallic source and drain terminals.
Note that 𝑛𝑛+ regions make contact with source and drain terminals as shown. A layer of
metal is also deposited on SiO2 layer so as to form the gate of MOSFET.
When gate circuit is open, no current flows from drain to source and load because of one
reverse-biased 𝑛𝑛+ − 𝑝𝑝 junction. When gate is made positive with respect to source, an
electric field is established as shown in Fig. 2.11(𝑏𝑏). Eventually, induced negative charges
in the 𝑝𝑝-substrate below SiO2 layer are formed. These negative charges, called electrons,
form n-channel and current can flow from drain to source as shown by the arrow. If 𝑉𝑉𝐺𝐺𝐺𝐺 is
made more positive, 𝑛𝑛-channel becomes more deep and therefore more current flows from
𝐷𝐷 to 𝑆𝑆. This shows that drain current 𝐼𝐼𝐷𝐷 is enhanced by the gradual increase of gate voltage,
hence the name enhancement MOSFET.
The main disadvantage of 𝑛𝑛-channel planar MOSFET of Fig. 2.11 (𝑏𝑏) is that conducting
n-channel in between drain and source gives large on-state resistance. This leads to high
power dissipation in 𝑛𝑛-channel. This shows that planar MOSFET construction of Fig. 2.11
(b) is feasible only for low-power MOSFETs.
The constructional details of high power MOSFET are illustrated in Fig. 2.12.
Fig. 2.12. Basic structure of a 𝑛𝑛-channel DMOS power MOSFET.

In this figure is shown a planar diffused metal-oxide-semiconductor (DMOS) structure for

𝑛𝑛-channel which is quite common for power MOSFETs. On 𝑛𝑛+ substrate, high resistivity
𝑛𝑛− layer is epitaxially grown. The thickness of 𝑛𝑛 - layer determines the voltage blocking
capability of the device. On the other side of 𝑛𝑛+ substrate, a metal layer is deposited to form
the drain terminal. Now 𝑝𝑝− regions are diffused in the epitaxially grown 𝑛𝑛− layer. Further,
𝑛𝑛+ regions are diffused in 𝑝𝑝 regions as shown. As before, SiO2 layer is added, which is then
etched so as
• A mixture of silicon atoms and pentavalent atoms, deposited on wafer, forms a
layer of 𝑛𝑛-type semiconductor on heated surface. This layer is called expitaxial
layer. to fit metallic source and gate terminals. A power MOSFET actually consists
of a parallel connection of thousands of basic MOSFET cells on the same single
chip of silicon.
When gate circuit voltage is zero, and 𝑉𝑉𝐷𝐷𝐷𝐷 is present, 𝑛𝑛− − 𝑝𝑝− junctions are reverse biased
and no current flows from drain to source. When gate terminal is made positive with respect
to source, an electric field is established and electrons form 𝑛𝑛-channel in the 𝑝𝑝− regions as
shown. So a current from drain to source is established as indicated by arrows. With gate
voltage increased current 𝐼𝐼𝐷𝐷 also increases as expected. Length of 𝑛𝑛-channel can be
controlled and therefore on-resistance can be made low if short length is used for the
channel.
Power MOSFET conduction is due to majority carriers, therefore, time delays caused by
removal or recombination of minority carriers are eliminated. Thus, power MOSFET can
work at switching frequencies in the megahertz range.
2.4.1. MOSFET Characteristics
The static characteristics of power MOSFET are now described briefly. The basic circuit
diagram for 𝑛𝑛-channel power MOSFET is shown in Fig. 2.13(𝑎𝑎) where voltages and
currents are as indicated.
(a) Transfer characteristics. This characteristic shows the variation of drain current 𝐼𝐼𝐷𝐷 as a
function of gate-source voltage 𝑉𝑉𝐺𝐺𝐺𝐺 . Fig. 2.13(𝑏𝑏) shows typical transfer characteristic for
𝑛𝑛-channel power MOSFET. It is seen that there is threshold voltage 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 below which the
device is off. The magnitude of 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 is of the order of 2 to 3 V.

Fig. 2.13. (a) N-channel power MOSFET circuit diagram and (b) its typical transfer
characteristic.
(b) Output characteristics. Power MOSFET output characteristics shown in Fig. 2.14
indicate the variation of drain current 𝐼𝐼𝐷𝐷 as a function of drain-source voltage 𝑉𝑉𝐺𝐺𝐺𝐺 as a
parameter. For low values of 𝑉𝑉𝐷𝐷𝐷𝐷 , the graph between 𝐼𝐼𝐷𝐷 − 𝑉𝑉𝐷𝐷𝐷𝐷 is almost linear; this
indicates a constant value of on-resistance 𝑅𝑅𝐷𝐷𝐷𝐷 = 𝑉𝑉𝐷𝐷𝐷𝐷 /𝐼𝐼𝐷𝐷 . For given 𝑉𝑉𝐺𝐺𝐺𝐺 , if 𝑉𝑉𝐷𝐷𝐷𝐷 is
increased, output characteristic is relatively flat indicating that drain current is nearly
constant. A load line intersects the output characteristics at 𝐴𝐴 and 𝐵𝐵. Here 𝐴𝐴 indicates fully-
on condition and 𝐵𝐵 fully-off state. Power MOSFET operates as a switch either at 𝐴𝐴 or at 𝐵𝐵
just like a BJT.

Fig. 2.14. Output characteristics of a Fig. 2.15. Switching waveforms for

power MOSFET. power MOSFET.
(c) Switching characteristics. The switching characteristics of a power MOSFET are influenced
to a large extent by the internal capacitance of the device and the internal impedance of the
gate drive circuit. At turn-on, there is an initial delay 𝑡𝑡𝑑𝑑𝑑𝑑 during which input capacitance
charges to gate threshold voltage 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 . Here 𝑡𝑡𝑑𝑑𝑑𝑑 is called turn-on delay time.
There is further delay 𝑡𝑡𝑟𝑟 called rise time, during which gate voltage rises to 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 , a voltage
sufficient to drive the MOSFET into on state. During 𝑡𝑡𝑟𝑟 , drain current rises from zero to full
on current 𝐼𝐼𝐷𝐷 . Thus, the total turn-on time is 𝑡𝑡𝑜𝑜𝑜𝑜 = 𝑡𝑡𝑑𝑑𝑑𝑑 + 𝑡𝑡𝑟𝑟 . The turn-on time can be reduced
by using low-impedance gate drive source.
As MOSFET is a majority carrier device, turn-off process is initiated soon after removal of
gate voltage at time 𝑡𝑡1 . The turn-off delay time, 𝑡𝑡𝑑𝑑𝑑𝑑 , is the time during which input capacitance
discharges from overdrive gate voltage 𝑉𝑉1 to 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 . The fall time, 𝑡𝑡𝑓𝑓 is the time during which
input capacitance discharges from 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 to threshold voltage. During 𝑡𝑡𝑓𝑓 , drain current falls from
𝐼𝐼𝐷𝐷 to zero. So when 𝑉𝑉𝐺𝐺𝐺𝐺 ≤ 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 , MOSFET turn-off is complete. Switching waveforms for a
power MOSFET are shown in Fig. 2.15.
Power MOSFETs are very popular in switched mode power supplies. They are, at present,
available with 500 V, 140 A ratings.

1.1.2. Comparison of MOSFET with BJT

Power MOSFET has several features different from those of BJT. These are outlined as under:
(i) Power MOSFET has lower switching losses but its on-resistance and conduction losses are
more. A BJT has higher switching losses but lower conduction loss. So at high frequency
applications, power MOSFET is the obvious choice. But at lower operating frequencies (less
than about 10 to 30𝐤𝐤𝐤𝐤𝐤𝐤, BJT is superior.
(ii) MOSFET is voltage-controlled device whereas BJT is current controlled device.
(iii) MOSFET has positive temperature coefficient for resistance. This makes parallel operation
of MOSFET easy. If a MOSFET shares increased current initially, it heats up faster, its
resistance rises and this increased resistance causes this current to shift to other devices in
parallel. A BJT has negative temperature coefficient, so current-sharing resistors are necessary
during parallel operation of BJTs.

(iv) In MOSFET, secondary breakdown does not occur, because it has positive temperature
coefficient. As BJT has negative temperature coefficient, secondary breakdown occurs. In BJT,
with decrease in resistance, the current increases. This increased current over the same area
results in hot spots and breakdown of the BJTT.
(v) Power MOSFETs in higher voltage ratings have more conduction loss.
(vi) The state-of-the-art MOSFETs are available with ratings up to 500 V, 140 A whereas BJTs
are available with ratings up to 1200 V, 800 A.

5.2. INSULATED GATE BIPOLAR TRANSISTOR. (IGBT)

IGBT is a new development in the area of power MOSFET technology. This device combines
into it the advantages of both MOSFET and BJT. So, an IGBT has high input impedance like
a MOSFET and low-on-state power loss as in a BJT. Further, IGBT is free from second
breakdown problem present in BJT. IGBT is also known as metal-oxide insulated gate
transistor (MOSIGT), conductively-modulated field effect transistor (COMFET) or gain-
modulated FET (GEMFET). It was also initially called insulated gate transistor (IGT).
5.2.1. Basic Structure and Working
Fig. 2.16 illustrates the basic structure of an IGBT. It is constructed virtually in the same
manner as a power MOSFET. There is, however; a major difference in the substrate. The
𝑛𝑛+ layer substrate at the drain in a power MOSFET is now substituted in the IGBT by a 𝑝𝑝+
layer substrate called collector. Like a power MOSFET, an IGBT has also thousands of basic
structure cells connected appropriately on a single chip of silicon.

Fig. 2.16. Basic structure of an insulated gate bipolar transistor (IGBT).

When gate is positive with respect to emitter and with gate-emitter voltage more than the
threshold voltage of IGBT, an 𝑛𝑛-channel is formed in the 𝑝𝑝-regions as in a power MOSFET,
Fig. 2.16. This 𝑛𝑛-channel short circuits the 𝑛𝑛− region with 𝑛𝑛+ emitter regions. An electron
movement in the 𝑛𝑛-channel, in turn, causes substantial hole injection from 𝑃𝑃+ substrate layer
into the epitaxial 𝑛𝑛− layer. Eventually, a forward current is established as shown in Fig. 2.16.
The three layers 𝑝𝑝+ , 𝑛𝑛− and 𝑝𝑝 constitute a 𝑝𝑝𝑝𝑝𝑝𝑝 transistor with 𝑝𝑝+ as emitter, 𝑛𝑛− as base and 𝑝𝑝 as
collector. Also 𝑛𝑛− , 𝑝𝑝 and 𝑛𝑛+ layers constitute 𝑛𝑛𝑛𝑛𝑛𝑛 transistor as shown in Fig. 2.17 (a).

Fig. 2.17. IGBT (a) Basic structure, (b) its equivalent circuit and (c) its circuit symbol.
Here 𝑛𝑛− serves as base for 𝑝𝑝𝑝𝑝𝑝𝑝 transistor and also as collector for 𝑛𝑛𝑛𝑛𝑛𝑛 transistor. Further,
Here 𝑛𝑛− serves as base for 𝑝𝑝𝑝𝑝𝑝𝑝 transistor and also as collector for 𝑛𝑛𝑛𝑛𝑛𝑛 transistor. Further, 𝑝𝑝
serves as collector for 𝑝𝑝𝑝𝑝𝑝𝑝 device and also as base for 𝑛𝑛𝑛𝑛𝑛𝑛 transistor. The two 𝑝𝑝𝑝𝑝𝑝𝑝 and npn
transistors can, therefore, be connected as shown in Fig. 2.17 (b) to give the equivalent circuit
of an IGBT. Fig. 2.17(𝑐𝑐) is the circuit symbol for IGBT with gate (𝐺𝐺), emitter (𝐸𝐸) and
collector (𝐶𝐶) as its three terminals.

5.2.2. IGBT Characteristics

The circuit of Fig. 2.18(𝑎𝑎) shows the various parameters pertaining to IGBT characteristics.

Fig. 2.18. IGBT (a) circuit diagram, (b) static V-I characteristics and (c) transfer characteristics.
Static 𝑉𝑉 − 𝐼𝐼 or output characteristics of an IGBT (n-channel type) show the plot of collector
current 𝐼𝐼𝐶𝐶 versus collector-emitter voltage 𝑉𝑉𝐶𝐶𝐶𝐶 for various values of gate-emitter voltages.
These characteristics are shown in Fig. 2.18(𝑏𝑏). In the forward direction, the shape of the
output characteristics is similar to that of BJT. But here the controlling parameter is gate-
emitter voltage 𝑉𝑉𝐺𝐺𝐺𝐺 because IGBT is a voltage-controlled device.
The transfer characteristic of an IGBT is a plot of collector current 𝐼𝐼𝐶𝐶 versus gate-emitter
voltage 𝑉𝑉𝐺𝐺𝐺𝐺 as shown in Fig. 2.18 (c). This characteristic is identical to that of power MOSFET.
When 𝑉𝑉𝐺𝐺𝐺𝐺 is less than the threshold voltage 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 , IGBT is in the off-state.
When the device is off, junction 𝐽𝐽2 blocks forward voltage and in case reverse voltage appears
across collector and emitter, junction 𝐽𝐽1 blocks it.
1.2.3. Switching Characteristics
Switching characteristics of an IGBT during turn-on and turn-off are sketched in Fig. 2.19. The
turn-on time is defined as the time between the instants of forward blocking to forward on-state
(7). Turn-on time is composed of delay time 𝑡𝑡𝑑𝑑𝑑𝑑 and rise time 𝑡𝑡𝑟𝑟 , 𝑖𝑖. 𝑒𝑒. 𝑡𝑡𝑜𝑜𝑜𝑜 = 𝑡𝑡𝑑𝑑𝑑𝑑 + 𝑡𝑡𝑟𝑟 . The
delay time is defined as the time for the collector-emitter voltage to fall from 𝑉𝑉𝐶𝐶𝐶𝐶 to 0.9𝑉𝑉𝐶𝐶𝐶𝐶 .
Here 𝑉𝑉𝐶𝐶𝐶𝐶 is the initial collector-emitter voltage. Time 𝑡𝑡𝑑𝑑𝑑𝑑 may also be defined as the time for
the collector current to rise from its initial leakage current 𝐼𝐼𝐶𝐶𝐶𝐶 to 0.1𝐼𝐼𝐶𝐶 . Here 𝐼𝐼𝐶𝐶 is the final
value of collector current.
Fig. 2,19. IGBT turn-on and turn-off characteristics.
The rise time 𝑡𝑡𝑟𝑟 is the time during which collector-emitter voltage falls from 0.9𝑉𝑉𝐶𝐶𝐶𝐶 to 0.1𝑉𝑉𝐶𝐶𝐶𝐶
It is also defined as the time for the collector current to rise from 0.1𝐼𝐼𝐶𝐶 to its final value 𝐼𝐼𝐶𝐶 .
After time 𝑡𝑡𝑜𝑜𝑜𝑜 , the collector current is 𝐼𝐼𝐶𝐶 and the collector-emitter voltage falls to small value
called conduction drop = 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 where subscript 𝑆𝑆 denotes saturated value. The turn-off time is
somewhat complex. It consists of three intervals: (𝑖𝑖) delay time, 𝑡𝑡𝑑𝑑𝑑𝑑 (ii) initial fall time, 𝑡𝑡𝑓𝑓1
and (iii) final fall time, 𝑡𝑡𝑓𝑓2 ; i.e. 𝑡𝑡𝑜𝑜𝑜𝑜𝑜𝑜 = 𝑡𝑡𝑑𝑑𝑑𝑑 + 𝑡𝑡𝑓𝑓1 + 𝑡𝑡𝑓𝑓2 . The delay time is the time during which
gate voltage falls from 𝑉𝑉𝐺𝐺𝐺𝐺 to threshold voltage 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 . As 𝑉𝑉𝐺𝐺𝐺𝐺 falls to 𝑉𝑉𝐺𝐺𝐺𝐺𝐺𝐺 during 𝑡𝑡𝑑𝑑𝑑𝑑 , the
collector current falls from 𝐼𝐼𝐶𝐶 to 0.9𝐼𝐼𝐶𝐶 . At the end of 𝑡𝑡𝑑𝑑𝑑𝑑 collector-emitter voltage begins to
rise. The first fall time 𝑡𝑡𝑓𝑓1 is defined as the time during which collector current falls from 90
to 20% of its initial value 𝐼𝐼𝐶𝐶 , or the time during which collector-emitter voltage rises from 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶
to 0.1𝑉𝑉𝐶𝐶𝐶𝐶 -
The final fall time 𝑡𝑡𝑓𝑓2 is the time during which collector current falls from 20 to 10% of 𝐼𝐼𝐶𝐶 , or
the time during which collector-emitter voltage rises from 0.1𝑉𝑉𝐶𝐶𝐶𝐶 to final value 𝑉𝑉𝐶𝐶𝐶𝐶 , see Fig.
2.19.
1.2.4. Applications of IGBT
IGBTs are widely used in medium power applications such as dc and ac motor drives, UPS
systems, power supplies and drives for solenoids, relays and contactors. Though IGBTs are
somewhat more expensive than BJTs, yet they are becoming popular because of lower gate-
drive requirements, lower switching losses and smaller snubber circuit requirements. IGBT
converters are more efficient with less size as well as cost, as compared to converters based on
BJTs. Recently, IGBT inverter induction-motor drives using 15 − 20kHz switching frequency
are finding favour where audio-noise is objectionable. In most applications, IGBTs will
eventually push out BJTs. At present, the state-of-the-art IGBTs are available up to 1200 V,
500 A.
1.3. MOS-CONTROLLED THYRISTOR (MCT)
An MCT is a new device in the field of semiconductor-controlled devices. It is basically a
thyristor with two MOSFETs built into the gate structure. One MOSFET is used for turning on
the MCT and the other for turning off the device. An MCT is a high-frequency, high-power,
low-conduction drop switching device.
An MCT combines into it the features of both conventional four-layer thyristor having
regenerative action and MOS-gate structure. However, in MCT, anode is the reference with
respect to which all gate signals are applied. In a conventional SCR, cathode is the reference
terminal for gate signals.
Fig. 2.20. Basic structure of an MCT.
The basic structure of an MCT is shown in Fig. 2.20. A practical MCT consists of thousands
of these basic cells connected in parallel, just like a power MOSFET (7,8). This is done in
order to achieve a high-current carrying capacity of the device.
The equivalent circuit of MCT is shown in Fig. 2.21 (a). It consists of one on-FET, one off-
FET and two transistors. The on-FET is a 𝑝𝑝-channel MOSFET and off-FET is an 𝑛𝑛-channel
MOSFET. An arrow towards the gate terminal indicates 𝑛𝑛-channel MOSFET and the arrow
away from the gate terminal as the 𝑝𝑝-channel MOSFET. The two transistors in the equivalent
circuit indicate that there is regenerative feedback in the MCT just as it is in an ordinary
thyristor. Fig. 2.21(𝑏𝑏) gives the circuit symbol of an MCT.
An MCT is turned-on by a negative voltage pulse at the gate with respect to the anode and is
turned-off by a positive voltage pulse. Working of MCT can be understood better by referring
to Fig. 2.21(𝑎𝑎).
Turn-on process. As stated above, MCT is turned on by applying a negative voltage pulse at
the gate with respect to anode. In other words, for turning on MCT, gate is made negative with
respect to anode by the voltage pulse between gate and anode. With the application of this
negative voltage pulse, on-FET gets turned-on and off-FET is off.
Fig. 2.21. MCT (𝑎𝑎) equivalent circuit and (𝑏𝑏) circuit symbol.
With on-FET on, current begins to flow from anode 𝐴𝐴, through on-FET and then as the base
current and emitter current of npn transistor and then to cathode 𝐶𝐶. This turns on npn transistor.
As a result, collector current begins to flow in npn transistor. As off-FET is off, this collector
current of npn transistor acts as the base current of pnp transistor. Subsequently, pnp transistor
is also turned on. Once both the transistors are on, regenerative action of the connection scheme
takes place and the thyristor or MCT is turned on.
Note that on-FET and pnp transistor are in parallel when thyristor is in conduction state. During
the time MCT is on, base current of npn transistor flows mainly through pnp trangistor because
of its better conducting property.
Turn-off process. For turning-off the MCT, off-FET (or 𝑛𝑛-channel MOSFET) is energized by
positive voltage pulse at the gate. With the applicatidn of positive voltage pulse, off-FET is
turned on and on-FET is turned off. After off-FET is turned on, emitter-base terminals of 𝑝𝑝𝑝𝑝𝑝𝑝
transistor are short circuited by off-FIT. So now anode current begins to flow through off-FET
and therefore base current of 𝑝𝑝𝑝𝑝𝑝𝑝 transistor begins to decrease. Further, collector current of
𝑝𝑝𝑝𝑝𝑝𝑝 transistor that forms the base current of 𝑛𝑛𝑛𝑛𝑛𝑛 transistor also begins to decrease. As a
consequence, base currents of both 𝑝𝑝𝑝𝑝𝑝𝑝 and 𝑛𝑛𝑛𝑛𝑛𝑛 transistors, now devoid of stored charge in
their 𝑛𝑛 and 𝑝𝑝 bases respectively, begin to decay. This regenerative action eventually turns off
the MCT.
An MCT has the following merits:
(i) Low forward conduction drops,
(ii) fast turn-on and turn-off times,
(iii) low switching losses and
(iv) high gate input impedance, which allows simpler design of drive circuits.
An MCT is a brand-new device which is likely to be available commercially very soon. As it
possesses highly adaptable features for its use as a switching device, it seems to have
tremendous scope for its widespread applications. Its potential applications include dc and ac
motor drives, UPS systems, induction heating, dc-dc converters, power line conditioners etc. It
may, in the near future, challenge the existence of most of the available devices like thyristors,
GTOs, BJTs, IGBTs (7).
1.4. NEW SEMICONDUCTING MATERIALS
At present, silicon enjoys monopoly as a semiconductor material for the commercial production
of power-control devices. This is because silicon is cheaply available and semiconductor
devices of any size can be easily fabricated on a single silicon chip. There are, however, new
types of materials like gallium arsenic (GaAs), silicon carbide and diamond which possess the
desirable properties required for switching devices. At present, state-of-the-art technology for
these materials is primitive compared with silicon, and many more years of research investment
are required before these materials become commercially viable for the production of power-
controlled devices. Superconductive materials may also be used in the manufacture of such
devices, but work in this direction has not yet been reported.
Germanium is not used in the fabrication of thyristors because of the following reasons:
(i) Germanium has much lower thermal conductivity; its thermal resistance is, therefore, more.
As a consequence, germanium thyristors suffer from more losses, more temperature rise and
therefore lower operating life.
(ii) Its breakdown voltage is much less than that of silicon. It means that germanium thyristor
can be built for small voltage ratings only.
(iii) Germanium is much costlier than silicon.

2. PROBLEMS
2.1. (a) What is a diode? Give the difference between power and signal diodes. (b) Discuss the
differences between 𝑝𝑝 − 𝑛𝑛 junction diodes and Schottky diodes.
(c) Describe reverse recovery characteristics of diodes. Show that reverse recovery time and
peak inverse current are dependent upon storage charge and rate of change of current.
2.2 (a) Describe the various types of power diodes indicating clearly the differences amongst
them.
(b) Discuss static V-I characteristic of a power diode.
2.3. (a) What is cut-in voltage in a diode? What are other terms used for cut-in voltage?
(b) Discuss the following terms for diodes:
Softness factor, PIV, reverse recovery time, reverse recovery current. (c) For a power diode,
the reverse recovery time is 3.9𝜇𝜇 and the rate of diode-current decay is 50 A/𝜇𝜇s. For a softness
factor of 0.3, calculate the peak inverse current and storage charge.
[ Ans. (c) 150 A, 292.5𝜇𝜇c]
2.4. (a) Discuss the power loss in a diode during the reverse recovery transients.
(b) The forward characteristic of a power diode can be represented by 𝑣𝑣𝑓𝑓 = 0.88 + 0.015𝑖𝑖𝑓𝑓 .
Determine the average power loss and rms current for a constant cuirrent of 50 A for 2/3 of a
cycle.
1 2𝑇𝑇/3
[Hint. (b) With 𝑇𝑇 as the time of a cycle, average power loss = 𝑇𝑇 ∫0 𝑣𝑣𝑓𝑓 ⋅ 𝐼𝐼𝑓𝑓 𝑑𝑑𝑑𝑑 etc ]
[Ans. (b) 54.33 W, 40.825 A ]
2.5. (a) Enumerate the types of power transistors along with their circuit symbols.
(b) What is a bipolar junction transistor? Why is it so called?
Describe the types of BJTs with their circuit symbols
(c) Define 𝛼𝛼 and 𝛽𝛽 for BJT and develop a relation between the two. Why is 𝛼𝛼 less than 1 and
𝛽𝛽 more than 1?
(d) Why is it preferrable to use hard drive for BJT?
2.6. (a) What is the difference between 𝛽𝛽 and forced 𝛽𝛽𝑓𝑓 for BJTs?
(b) What are the conditions under which a transistor operates as a switch?
Discuss hard-drive and overdrive factor for BJTT.
(c) Show that collector current at saturation remains substantially constant even if base current
is increased.
2.7. (a) Explain the switching performance of BJT with relevant waveforms. Indicate clearly
turn-on and turn-off times and their components.
(b) Describe FBSOA and RBSOA for BJTs.

2.8. (a) Describe the input and output characteristic for a BJT. Show the region of the transistor
characteristic where it acts like a switch.

Fig. 2.22. Pertaining to Prob. 2.8(𝑏𝑏)

(b) Typical switching waveforms for a power transistor are shown in Fig. 2.22. Show that
switch-on energy loss is given by
𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝐼𝐼𝐶𝐶𝐶𝐶
𝑡𝑡𝑜𝑜𝑜𝑜
6
Also obtain an expression for the average value of switch-on loss.
(c) Derive expressions for the switch-off energy loss and also for its average value for the
waveforms shown in Fig, 2.22.
𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝐼𝐼𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝐼𝐼𝐶𝐶𝐶𝐶 𝑉𝑉𝐶𝐶𝐶𝐶 ⋅ 𝐼𝐼𝐶𝐶𝐶𝐶
� Ans (𝑏𝑏) 𝑓𝑓 ⋅ 𝑡𝑡𝑜𝑜𝑜𝑜 (𝑐𝑐) 𝑡𝑡𝑜𝑜𝑜𝑜𝑜𝑜 , 𝑓𝑓 ⋅ 𝑡𝑡off �
6 6 6
2.9. In case 𝐼𝐼𝐶𝐶𝐶𝐶 = 80 A, 𝑉𝑉𝐶𝐶𝐶𝐶 = 220 V, 𝑡𝑡𝑜𝑜𝑜𝑜 = 1.5𝜇𝜇s and 𝑡𝑡𝑜𝑜𝑜𝑜𝑜𝑜 = 4𝜇𝜇s for the switching
waveforms shown in Fig. 2.22, find the energy loss during switch-on and switch-off intervals.
Find also the average power loss in the power transistor for a switching frequency of 2kHz.
[Ans 4.4mWs, 11.73mWs, 32.267 W ]
Derive the expressions used.
2.10. (a) For the typical switching waveforms shown in Fig. 2.22 for a power trangistor, find
expressions that give peak instantaneous power loss during 𝑡𝑡𝑜𝑜𝑜𝑜 and 𝑡𝑡𝑜𝑜𝑜𝑜𝑜𝑜 intervals respectively.
(b) In case 𝐼𝐼𝐶𝐶𝐶𝐶 = 80 A, 𝑉𝑉𝐶𝐶𝐶𝐶 = 220 V, 𝑡𝑡𝑜𝑜𝑜𝑜 = 1.5𝜇𝜇s and 𝑡𝑡𝑜𝑜𝑜𝑜𝑜𝑜 = 4𝜇𝜇s, find the peak value of
instantaneous power loss during 𝑡𝑡𝑜𝑜𝑜𝑜 and 𝑡𝑡𝑜𝑜𝑜𝑜𝑜𝑜 intervals respectively. power loss during 𝑡𝑡𝑜𝑜𝑜𝑜 and
𝑡𝑡𝑜𝑜𝑜𝑜 intervals respectively.
𝐼𝐼𝐶𝐶𝐶𝐶 𝐼𝐼𝐶𝐶𝐶𝐶 ⋅𝑉𝑉𝐶𝐶𝐶𝐶 off
[Ans. (a) ⋅ 𝑉𝑉𝐶𝐶𝐶𝐶 , ( b) 4400 W, 4400 W] power loss during 𝑡𝑡on and intervals
4 4
𝐼𝐼𝐶𝐶𝐶𝐶 ⋅𝑉𝑉𝐶𝐶𝐶𝐶 𝐼𝐼𝐶𝐶𝐶𝐶 ⋅𝑉𝑉𝐶𝐶𝐶𝐶
respectively (𝑎𝑎) 4 , 4 (𝑏𝑏)4400 W, 4400 W�
2.11. A power transistor is used as a switch and typical waveforms are shown in Fig. 2.6. The
parameters for the transistor circuit are as under:
 𝑉𝑉𝐶𝐶𝐶𝐶 = 200 V, 𝑉𝑉𝐶𝐶𝐶𝐶𝐶𝐶 = 2.5 V, 𝐼𝐼𝐶𝐶𝐶𝐶 = 60 A, 𝑡𝑡𝑑𝑑 = 0.5𝜇𝜇s, 𝑡𝑡𝑟𝑟
𝑡𝑡𝑛𝑛 = 40𝜇𝜇s, 𝑡𝑡𝑠𝑠 = 4𝜇𝜇s, 𝑡𝑡𝑓𝑓 = 3𝜇𝜇s, 𝑡𝑡0 = 30𝜇𝜇s, 𝑓𝑓 = 10kHz.
𝑡𝑡𝑛𝑛 = 40𝜇𝜇s, 𝑡𝑡𝑠𝑠 = 4𝜇𝜇s, 𝑡𝑡𝑓𝑓 = 3𝜇𝜇s, 𝑡𝑡0 = 30
emitter leakage current = 1.5 mA
Collector to emitter leakage current = 1.5 mA. Determine average power loss due to collector
current during ton
instantaneous power loss due to collector current during turn-on time. [Ans.
20.5015 W, 60 W, 3037.97 W ] Sketch the instantaneous power loss during 𝑡𝑡𝑜𝑜𝑜𝑜 and 𝑡𝑡𝑛𝑛 .
ass during turn-off time and off-period, and 2.12. Repeat Prob. 2.11 for obtaining average
power loss during turn-off also peak instantaneous power loss during fall time due to collector
current.
Sketch the instantaneous 𝑃𝑃
2.13. Fig. 2.23 shows the switching characteristics for a power semiconductor device. Derive
the expressions for energy loss during turn-on and turn-of periods, and also for the average
switching loss. Sketch the variation of power loss during turn-on and turn-off periods.

Fig. 2.23. Pertaining to Prob. 2.13.

For 𝑉𝑉𝑠𝑠 = 220 V, 𝐼𝐼𝑎𝑎 = 10 A, 𝑡𝑡1 = 1𝜇𝜇l, 𝑡𝑡2 = 2𝜇𝜇s, 𝑡𝑡3 = 1.5𝜇𝜇s and 𝑡𝑡4 = 3𝜇𝜇s, find the average
value of power-switching loss in the device for a switching frequency of 1kHz.
1 1 1
� Ans, 𝑉𝑉𝑠𝑠 ⋅ 𝐼𝐼𝑎𝑎 (𝑡𝑡1 + 𝑡𝑡2 ), 𝑉𝑉𝑠𝑠 𝐼𝐼𝑎𝑎 (𝑡𝑡3 + 𝑡𝑡4 ), 𝑉𝑉𝑠𝑠 𝐼𝐼𝑎𝑎 𝑓𝑓(𝑡𝑡𝑜𝑜𝑜𝑜 + 𝑡𝑡off ); 7.5 W�
2 2 2
2.14. (a) Explain the constructional details an and bring out the differences between the two.
(b) Discuss transfer and output characteristics of power MOSFEIs.
2.15. (a) Describe the switching characteristics
(b) Compare power MOSFETs with BJTs.
2.16. (a) What is IGBT? What are its other names? Give its basic structural also describe input
and transfer (b) Derive the equivalent
characteristics of an IGBT.
2.17. (a) Explain switching characteristics of an IGBT. (b) Why are IGBTs become
some applications of IGBTs. 2.18. (a) Describe the basic structure of MO c and explain the
turn-on and turn-off processes
Give futuristic applications of MCTs
 Thyristors

THYRISTORS
As stated before, Bell Laboratories were the first to fabricate a silicon-based
semiconductor device called thyristor. Its first prototype was introduced by GEC (USA) in
1957. This company did a great deal of pioneering work about the utility of thyristors in
industrial applications. Later on, many other devices having characteristics similar to that of a
thyristor were developed. These semiconductor devices, with their characteristics identical
with that of a thyristor, are triac, diac, silicon-controlled switch, programmable unijunction
transistor (PUT), GTO, RCT etc. This whole family of semiconductor devices is given the
name thyristor. Thus, the term thyristor denotes a family of semiconductor devices used for
power control in de and ac systems. One oldest member of this thyristor family, called silicon-
controlled rectifier (SCR), is the most widely used device. At present, the use of SCR is so
·vast that over the years, the word thyristor has become synonymous with SCR. It appears that
the term thyristor is now becoming more common than the actual term SCR. In this book, the
term SCR and thyristor will be used at random for the same device SCR. Other members of
thyristor family are also discussed in this chapter. A thyristor has characteristics similar to a
thyratron tube. But from the construction viewpoint, a thyristor (a pnpn device) belongs to
transistor (pnp or npn device) family. The name thyristor', is derived by a combination of the
capital letters from THYRatron and transISTOR, this means that thyristor is a solid-state device
like a transistor and has characteristics similar to that of a thyratron tube. The present-day
reader may not be familiar with thyratron tube as this is not being taught these days. The object
of this chapter is to discuss the thyristor characteristics and other related topics useful for their
industrial applications.
TERMINAL CHARACTERISTICS OF THYRISTORS
Thyristor is a four layer, three-junction, p-n-p-n semiconductor switching device. It has
three terminals; anode, cathode and gate. Fig. 1 (a) gives constructional details of a typical
thyristor. Basically, a thyristor consists of four layers of alternate p-type and n-type silicon
semiconductors forming three junctions 𝐽𝐽1 , 𝐽𝐽2 and 𝐽𝐽3 as shown in Fig. 1(a). The threaded portion
is for the purpose of tightening the thyristor to the frame or heat sink with the help of a nut,
Gate terminal is usually kept near the cathode terminal Fig. l (a). Schematic diagram and circuit
symbol for a thyristor are shown respectively in Figs, 1(b) and (c). The terminal connected to
outer p region is called anode (A), the terminal connected to outer n region is called cathode
and that connected to inner p region is called the gate (G). For large current applications,
thyristors need better cooling; tills is achieved to a great extent by mounting them onto heat
sinks. SCR rating has improved [Link] since its introduction in 1957. Now SCRs of
voltage rating 10 kV and a rms current rating of 3000 A with corresponding power-handling
capacity of 30 MW are available. Such a high-power thyristor can be switched on by a low
voltage supply of about 1 A and 10 W and this gives us an idea of the immense power
amplification capability (= 3𝑥𝑥106 ) of this device. As SCRs are solid state devices, they are
compact, possess high reliability and have low loss. Because of these useful features, SCR is
almost universally employed these days for all high power-controlled devices.

PETER YEGON 1
 Thyristors

Fig. 1. (a) Constructional details (b) Schematic diagram and (c) circuit symbol of a thyristor.
An SCR is so called because silicon is used for its construction and its operation as a
rectifier (very low resistance in the forward conduction and very high resistance in the reverse
direction) can be controlled. Like the diode, an SCR is a unidirectional device that blocks the
current flow from cathode to anode. Unlike the diode, a thyristor also blocks the current flow
from anode to cathode until it is triggered into conduction by a proper gate signal between gate
and cathode terminals. For engineering applications of thyristors, their terminal characteristics
must be known. In this article, their static V-I characteristics, dynamic characteristics during
turn-on and turn-off processes and their gate characteristics are discussed.
4.1.1. Static V-1 Characteristics of a Thyristor
An elementary circuit diagram for obtaining static V-I characteristics of a thyristor is
shown in Fig. 2(a). The anode and cathode are connected to main source through the load. The
gate and cathode are fed from a source Es which provides positive gate current from gate to
cathode.

Fig.2. (a) Elementary circuit for obtaining thyristor V-I characteristics (b) Static V-1
characteristics of a thyristor.

PETER YEGON 2
 Thyristors

Fig. 2(b) shows static V-I characteristics of a thyristor. Here v. is the anode voltage
across thyristor terminals A, K and 𝐼𝐼𝑎𝑎 is the anode current. Typical SCR V-I characteristic
shown in Fig. 2(b) reveals that a thyristor has three basic modes of operation; namely, reverse
blocking mode, forward blocking (off-state) mode and forward conduction (on-state) mode.
These. three modes of operation are now discussed below:
Reverse Blocking Mode. When cathode is made positive with respect to anode with switch S
open, Fig. 2 (a), thyristor is reverse biased as shown in Fig. 3 (a). Junctions 𝐽𝐽1 , 𝐽𝐽3 are seen to
be reverse biased whereas junction 𝐽𝐽2 is forward biased. The device behaves as if two diodes
are connected in series with reverse voltage applied across them. A small leakage current of
the order of a few milliamperes (or a few microamperes depending upon the SCR rating) flows.
This is reverse blocking mode, called the off-state, of the thyristor. If the reverse voltage is
increased then at a critical breakdown level, called reverse breakdown voltage 𝑉𝑉𝐵𝐵𝐵𝐵 , an
avalanche occurs at 𝐽𝐽1 and 𝐽𝐽3 and the reverse current increases rapidly. A large current
associated with 𝑉𝑉𝐵𝐵𝐵𝐵 gives rise to more losses in the SCR. This may lead to thyristor damage as
the junction temperature may exceed its permissible temperature rise. It should, therefore, be
ensured that maximum working reverse voltage across a thyristor does not exceed 𝑉𝑉𝐵𝐵𝐵𝐵 . When
reverse voltage applied across a thyristor is less than 𝑉𝑉𝐵𝐵𝐵𝐵 , the device offers a high impedance
in the reverse direction. The SCR in the reverse blocking mode may therefore be treated as an
open switch.

Note that V-I characteristic after avalanche breakdown during reverse blocking mode
is applicable only when load resistance is zero, Fig. 2 (b). In case load resistance is present, a
large anode current associated with avalanche breakdown at 𝑉𝑉𝐵𝐵𝐵𝐵 would cause substantial
voltage drop across load and as a result, V-I characteristic in third quadrant would bend to the
right of vertical line drawn at 𝑉𝑉𝐵𝐵𝐵𝐵 ·
Forward Blocking Mode: When anode is positive with respect to the cathode, with gate circuit
open, thyristor is said to be forward biased as shown in Fig. 4.3 (b). It is seen from this figure
that junctions 𝐽𝐽1 , 𝐽𝐽3 are forward biased but junction 𝐽𝐽2 is reverse biased. In this mode, a small
current, called forward leakage current, flows as shown in Figs.2 (b) and 3 (b). In case the

PETER YEGON 3
 Thyristors

forward voltage is increased, then the reverse biased junction 𝐽𝐽2 will have an avalanche
breakdown at a voltage called forward breakover voltage 𝑉𝑉𝐵𝐵𝐵𝐵 When forward voltage is less
than 𝑉𝑉𝐵𝐵𝐵𝐵 , SCR offers a high impedance. Therefore, a thyristor can be treated as an open switch
even in the forward blocking mode.
Forward Conduction Mode: In this mode, thyristor conducts currents from anode to cathode
with a very small voltage drop across it. A thyristor is brought from forward blocking mode to
forward conduction mode by turning it on by exceeding the forward breakover voltage or by
applying a gate pulse between gate and cathode. In this mode, thyristor is in on-state and
behaves like a closed switch. Voltage drop across thyristor in the on state is of the order of 1
to 2 V depending on the rating of SCR. It may be seen from Fig. 2 (b) that this voltage drop
increases slightly with an increase in anode current. In conduction mode, anode current is
limited by load impedance alone as voltage drop across SCR is quite small. This small voltage
drop 𝑣𝑣𝑇𝑇 across the device is due to ohmic drop in the four layers.

4.2. THYRISTOR TURN-ON METHODS

With anode positive with respect to cathode, a thyristor can be turned on by any one of
the following techniques:
(a) Forward voltage triggering
(c) dv/dt triggering
(e) Light triggering.
(b) gate triggering
(d) Temperature triggering
These methods of turning-on a thyristor are now discussed one after the other.
(a) Forward Voltage Triggering: When anode to cathode forward voltage is increased with
gate circuit open, the reverse biased junction 𝐽𝐽2 will break. This is known as avalanche
breakdown and the voltage at which avalanche occurs is called forward breakover voltage
𝑉𝑉𝐵𝐵𝐵𝐵 · At this voltage, thyristor changes from off-state (high voltage with low leakage
current) to on-state characterised by low voltage across thyristor with large forward current.
As other junctions 𝐽𝐽1 , 𝐽𝐽3 are already forward biased, breakdown of junction 𝐽𝐽2 allows free
movement of carriers across three junctions and as a result, large forward anode-current
flows. As stated before, this forward current is limited by the load impedance. In practice,
the transition from off-state to on-state obtained by exceeding 𝑉𝑉𝐵𝐵𝐵𝐵 is never employed as it
may destroy the device.
The magnitudes of forward and reverse breakover voltages are nearly the same and both
are temperature dependent. In practice, it is found that 𝑉𝑉𝐵𝐵𝐵𝐵 is slightly more than 𝑉𝑉𝐵𝐵𝐵𝐵 ·
Therefore, forward breakover voltage is taken as the final voltage rating of the device
during the design of SCR applications.

PETER YEGON 4
 Thyristors

After the avalanche breakdown, junction 𝐽𝐽2 loses its reverse blocking capability.
Therefore, if the anode voltage is reduced below 𝑉𝑉𝐵𝐵𝐵𝐵 SCR will continue conduction of the
current. The SCR can now be turned off only by reducing the anode current below a certain
value called holding current (defined later),
(b) Gate Triggering: Turning on of thyristors by gate triggering is simple, reliable and efficient,
it is therefore the most usual method of firing the forward biased SCRs. A thyristor with
forward breakover voltage (say 800 V) higher than the normal working voltage (say 400V)
is chosen. This means that thyristor will remain in forward blocking state with normal
working voltage across anode and cathode and with gate open. However, when turn-on of
a thyristor is required, a positive gate voltage between gate and cathode is applied. With
gate current thus established, charges are injected into the inner p layer and voltage at which
forward breakover occurs is reduced. The forward voltage at which the device switches to
on-state depends upon the magnitude of gate current. Higher the gate current, lower is the
forward breakover voltage. When positive gate current is applied, gate Player is flooded
with electrons from the cathode. This is because cathode N layer is heavily doped as
compared to gate Player. As the thyristor is forward biased, some of these electrons reach
junction 𝐽𝐽2 . As a result, width of depletion layer around junction 𝐽𝐽2 is reduced. This causes
the junction 𝐽𝐽2 to breakdown at an applied voltage lower than forward breakover voltage
𝑉𝑉𝐵𝐵𝐵𝐵 · If magnitude of gate current is increased, more electrons will reach junction 𝐽𝐽2 , as a
consequence thyristor will get turned on at a much lower forward applied voltage.

Fig. 4. Variation of forward breakover voltage with gate current.

Fig..2 (b) shows that for gate current 𝐼𝐼𝑔𝑔 = 0, forward breakover voltage is 𝑉𝑉𝐵𝐵𝐵𝐵 . For 𝐼𝐼𝑔𝑔1 , forward
breakover voltage, or turn-on voltage is less than 𝑉𝑉𝐵𝐵𝐵𝐵 . For 𝐼𝐼𝑔𝑔2 > 𝐼𝐼𝑔𝑔1 , forward breakover voltage
is still further reduced. The effect of gate current on the forward breakover voltage of a thyristor
can also be illustrated by means of a curve as shown in Fig. 4. For 𝐼𝐼𝑔𝑔 < 𝑜𝑜𝑜𝑜, forward breakover
voltage remains almost constant at 𝑉𝑉𝐵𝐵𝐵𝐵 . For gate currents 𝐼𝐼𝑔𝑔1 , 𝐼𝐼𝑔𝑔2 and 𝐼𝐼𝑔𝑔3 , the values of forward
breakover voltages are 𝑜𝑜𝑜𝑜, 𝑜𝑜𝑜𝑜 and 𝑜𝑜𝑜𝑜, respectively as shown. In Fig. 2(𝑏𝑏), the curve marked
PETER YEGON 5
 Thyristors

𝐼𝐼𝑔𝑔 = 0 is actually for gate current less than oa. In practice, the magnitude of gate current is
more than the minimum gate current required to turn on the SCR. Typical gate current
magnitudes are of the order of 20 to 200 mA.

Once the SCR is conducting a forward current, reverse biased junction 𝐽𝐽2 no longer exists. As
such, no gate current is required for the device to remain in on-state. Therefore, if the gate
current is removed, the conduction of current from anode to cathode remains unaffected.
However, if gate current is reduced to zero before the rising anode current attains a value, called
the latching current, the thyristor will turn-off again. The gate pulse width should therefore be
judiciously chosen to ensure that anode current rises above the latching current. Thus, latching
current may be defined as the minimum value of anode current which it must attain during
turn-on process to maintain conduction when gate signal is removed.
Once the thyristor is conducting, gate loses control. The thyristor can be turned-off (or the
thyristor can be returned to forward blocking state) only if the forward current falls below a
low-level current called the holding current. Thus, holding current may be defined as the
minimum value of anode current below which it must fall for turning-off the thyristor. The
latching current is higher than the holding current. Note that latching current is associated with
turn-on process and holding current with turn-off process. It is usual to take latching current as
two to three times the holding current [1]. In industrial applications, holding current (typically
10 mA ) is almost taken as zero.
𝑑𝑑𝑑𝑑
(c) 𝑑𝑑𝑑𝑑 Triggering: A thyristor may be triggered on by a rapid rate of increase of forward anode
to cathode voltage in the presence or absence of gate signal. This can be explained in terms of
anode to gate, and gate to cathode capacitance. A rapidly rising anode voltage produces
transient gate current sufficient to tum on the SCR. This type of tum-on is not used. An
unwanted tum-on may however occur due to spurious spikes of voltages emanating from other
𝑑𝑑𝑑𝑑
equipment. It can be avoided by ensuring that 𝑑𝑑𝑑𝑑
across the thyristor is less than the value at
which it may tum on.

(d) Temperature Triggering: During forward blocking, most of the applied voltage appears
across reverse biased junction 𝐽𝐽_2 This voltage across junction 𝐽𝐽_2 associated with leakage
current may raise the temperature of this junction. With increase in temperature, leakage
current through junction J2 further increases. This cumulative process may turn on the SCR
at some high temperature.
(e) Light Triggering. For light-triggered SCRs, a recess (or niche) is made in the inner
p-layer as shown in Fig. 4.5 (a). When this recess is irradiated, free charge carriers (holes and
electrons) are generated just like when gate signal is applied between gate and cathode. The
pulse of light of appropriate wavelength is guided by optical fibres for irradiation. If the
intensity of this light thrown on the recess exceeds a certain value, forward biased SCR is
turned on. Such a thyristor is known as light-activated SCR (LASCR).

PETER YEGON 6
 Thyristors

LASCR may be triggered with a light source or with a gate signal. Sometimes a combination
of both light source and gate signal is used to trigger an SCR. For this, the gate is biased with
voltage or current slightly less than that required to tum it on, now a beam of light directed at
the inner p-layer junction turns on the SCR. The light intensity required to tum-on the SCR
depends upon the voltage bias given to the gate. Higher the voltage (or current) bias, lower the
light intensity required. Light-triggered thyristors have now been used in high-voltage direct
current (HVDC) transmission systems. In these several SCRs are connected in series-parallel
combination and their light-triggering has the advantage of electrical isolation between power
and control circuits.

Fig. 5(𝑏𝑏) shows cross-section of a conventional centre-gate thyristor. In this figure,

approximate doping densities in number per cubic centimeter are also indicated for all the four
layers. For example, for 𝑝𝑝1 layer, the doping density is 1019 per cm3 .

Fig. 5. (a) Elementary LASCR (b) Structural details of conventional Centre-gate thyristor.
For semiconductor devices, it should be kept in mind that (i) junction with lightly doped layers
(at least on one side of the junction) requires large breakdown voltage, (ii) junction with highly
doped layers on both sides requires low breakdown voltage. When thyristor is in forward
blocking state, junctions 𝐽𝐽1 , 𝐽𝐽3 are forward biased whereas junction 𝐽𝐽2 is reverse biased. As layer
𝑛𝑛 is lightly doped around junction 𝐽𝐽2 , depletion region of junction 𝐽𝐽2 extends mainly into 𝑛𝑛1
layer. Therefore, 𝑛𝑛1 layer is made to have larger width to withstand the high voltage during
forward blocking state.

For reverse voltage on the device; junctions 𝐽𝐽1 , 𝐽𝐽3 are reverse biased and 𝐽𝐽2 is forward biased.
As layers 𝑝𝑝2 , 𝑛𝑛2 across junction 𝐽𝐽3 are heavily doped, 𝐽𝐽3 has low breakdown voltage. Layer 𝑛𝑛1
being lightly doped as compared to layer 𝑝𝑝1, junction 𝐽𝐽1 has large breakdown voltage. As a
consequence, during the reverse blocking of a thyristor, junction 𝐽𝐽1 supports most of the reverse
voltage. Even during blocking, the depletion region extends into the 𝑛𝑛1 layer. This shows that
width of layer 𝑛𝑛1 absorbs most of the voltage during forward blocking mode and also during
the reverse blocking mode of a thyristor.
If positive gate voltage is applied between gate and cathode during the reverse blocking of a
thyristor, blocking property of junction 𝐽𝐽3 disappears as 𝐽𝐽3 has low breakdown voltage. As a

PETER YEGON 7
 Thyristors

result, reverse voltage appears across junction 𝐽𝐽1 . Positive charge carriers are now injected into
the 𝑛𝑛1 layer of reverse biased junction 𝐽𝐽1 . This causes an increase in the reverse leakage current.
The flow of large leakage current associated with high reverse voltage results in increased
power loss across junction 𝐽𝐽1 and heat thus generated may raise the junction temperature above
the allowable maximum and this may destroy the SCR. Such a happening can be avoided if no
positive gate voltage is applied between gate and cathode during the reverse blocking of SCR.
Some manufacturers do specify the maximum positive voltage (usually less than 0.25 V ) that
can exist between gate and cathode during the reverse blocking of a thyristor.

PETER YEGON 8
 DIODE CIRCUITS AND RECTIFIERS

DIODE CIRCUITS AND RECTIFIERS

A rectifier is a circuit that converts ac input voltage to dc output voltage. Semiconductor diodes
are used extensively in power electronic circuits for the conversion of power from ac to dc. A
rectifier employing diodes is called an uncontrolled rectifier, because its average output voltage
is a fixed de voltage. For simplicity, the diodes are considered as ideal switches. An ideal
diode has no forward voltage drop and reverse recovery time is negligible.
SINGLE-PHASE DIODE RECTIFIERS
Rectification is the process of conversion of alternating input voltage to direct output voltage.
As stated before, a rectifier converts ac power to dc. In diode-based rectifiers, the output voltage
cannot be controlled.
In this section, uncontrolled single-phase rectifiers are studied. The diode is assumed ideal.
1.1. Single-Phase Half-wave Rectifier
This is the simplest type of uncontrolled rectifier. It is never used in industrial applications
because of its poor performance. Its study is, however, useful in understanding the principle of
rectifier operation. In a single-phase half-wave rectifier, for one cycle of supply voltage, there
is one half-cycle of output, or load, voltage. As such, it is also called single-phase one-pulse
rectifier.
The load on the output side of rectifier may be R, C, RE, RL or RL with a flywheel diode. These
are now discussed briefly.
(a) 𝐑𝐑 load: The circuit diagram of a single-phase half-wave rectifier is shown in Fig. 1(𝑎𝑎).
During the positive half cycle, diode is forward biased, it therefore conducts from 𝜔𝜔𝜔𝜔 = 0∘ to
𝜔𝜔𝜔𝜔 = 𝜋𝜋. During the positive half cycle, output voltage 𝑣𝑣0 = source voltage 𝑣𝑣𝑠𝑠 and load current
𝑖𝑖0 = 𝑣𝑣0 /𝑅𝑅. At 𝜔𝜔𝜔𝜔 = 𝜋𝜋, 𝑣𝑣0 = 0 and for 𝑅𝑅 load, 𝑖𝑖0 is also zero. As soon as 𝑣𝑣𝑠𝑠 tends to become
negative after 𝜔𝜔𝜔𝜔 = 𝜋𝜋, diode 𝐷𝐷 is reverse biased, it is therefore turned off and goes into
blocking state. Output voltage, as well as output current, are zero from 𝜔𝜔𝜔𝜔 = 𝜋𝜋 to 𝜔𝜔𝜔𝜔 = 2𝜋𝜋.
After 𝜔𝜔𝜔𝜔 = 2𝜋𝜋, diode is again forward biased and conduction begins.
For a resistive load, output current 𝑖𝑖0 has the same waveform as that of the output voltage 𝑣𝑣0 .
Diode voltage 𝑣𝑣𝐷𝐷 is zero when diode conducts. Diode is reverse biased from 𝜔𝜔𝜔𝜔 = 𝜋𝜋 to 𝜔𝜔𝜔𝜔 =
2𝜋𝜋 as shown. The waveforms of 𝑣𝑣𝑠𝑠 , 𝑣𝑣0 , 𝑖𝑖0 and 𝑣𝑣𝐷𝐷 are sketched in Fig. 1(𝑏𝑏). Here source voltage
is sinusoidal i.e., 𝑣𝑣𝑠𝑠 = 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔. 𝐾𝐾𝐾𝐾𝐾𝐾 for the circuit of Fig. 1(𝑎𝑎 ) gives 𝑣𝑣𝑠𝑠 = 𝑣𝑣0 + 𝑣𝑣𝐷𝐷 .

1
 DIODE CIRCUITS AND RECTIFIERS

(a) (b)
Fig. 1. Single-phase half-wave diode rectifier with 𝑅𝑅 load (a) circuit diagram and (b)
waveforms.
Average value of output (or load) voltage,
𝜋𝜋
1
𝑉𝑉0 = �� 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)�
2𝜋𝜋 0
𝑉𝑉𝑚𝑚 𝑉𝑉𝑚𝑚
= | − cos 𝜔𝜔𝜔𝜔|𝜋𝜋0 =
2𝜋𝜋 𝜋𝜋
1 𝜋𝜋 1/2
Rms value of output voltage, 𝑉𝑉𝑜𝑜𝑜𝑜 = �2𝜋𝜋 ∫0 𝑉𝑉𝑚𝑚2 sin2 𝜔𝜔𝜔𝜔 ⋅ 𝑑𝑑(𝜔𝜔𝜔𝜔)�

𝜋𝜋 1/2
𝑉𝑉𝑚𝑚
1 − cos 20)𝑡𝑡
= �� ⋅ 𝑑𝑑(𝜔𝜔𝜔𝜔)�
√2𝜋𝜋 0 2
𝑉𝑉𝑚𝑚
=
2
Here the subscript ' 𝑟𝑟 ' is used to denote rms value.
Average value of load current,
𝑉𝑉0 𝑉𝑉𝑚𝑚
𝐼𝐼0 = =
𝑅𝑅 𝜋𝜋𝜋𝜋
𝑉𝑉𝑎𝑎𝑎𝑎 𝑉𝑉𝑚𝑚
Rms value of load current, 𝐼𝐼𝑜𝑜𝑜𝑜 = =
𝑅𝑅 2𝑅𝑅

Peak value of load, or diode, current

𝑉𝑉𝑚𝑚
=
𝑅𝑅

2
 DIODE CIRCUITS AND RECTIFIERS

Peak inverse voltage, PIV, is an important parameter in the design of rectifier circuits 𝑃𝑃𝑃𝑃𝑃𝑃 is
the maximum voltage that appears across the device (here diode) during its blocking state. In
Fig. 1, PIV = 𝑉𝑉𝑚𝑚 = √2 ⋅ 𝑉𝑉𝑠𝑠 = √2 (rms value of transformer secondary voltage). Power
delivered to resistive load = (rms load voltage) (rms load current)
𝑉𝑉𝑚𝑚 𝑉𝑉𝑚𝑚 𝑉𝑉𝑚𝑚2 𝑉𝑉𝑠𝑠2 2
= 𝑉𝑉𝑜𝑜𝑜𝑜 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜 = ⋅ = = = 𝐼𝐼𝑜𝑜𝑜𝑜 𝑅𝑅
2 2𝑅𝑅 4𝑅𝑅 2𝑅𝑅
Input power factor
Power delivered to load
Input power factor =
Input 𝑉𝑉𝑉𝑉
𝑉𝑉𝑜𝑜𝑜𝑜 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜 𝑉𝑉𝑜𝑜𝑜𝑜 √2𝑉𝑉𝑠𝑠
= = = = 0.707lag.
𝑉𝑉𝑠𝑠 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜 𝑉𝑉𝑠𝑠 2𝑉𝑉𝑠𝑠
(b) L load: Single-phase half-wave diode rectifier with 𝐿𝐿 load is shown in Fig. 2 (a).
When switch 𝑆𝑆 is closed at 𝜔𝜔𝜔𝜔 = 0, diode starts conducting. KVL for this circuit gives
𝑑𝑑𝑖𝑖0
𝑣𝑣𝑠𝑠 = 𝑣𝑣0 = 𝐿𝐿 = 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔
𝑑𝑑𝑑𝑑
or
𝑉𝑉𝑚𝑚
𝚤𝚤ˆ0 = � sin 𝜔𝜔𝜔𝜔 ⋅ 𝑑𝑑𝑑𝑑
𝐿𝐿
𝑉𝑉𝑚𝑚
=− cos 𝜔𝜔𝜔𝜔 + 𝐴𝐴
𝜔𝜔𝜔𝜔
At 𝜔𝜔𝜔𝜔 = 0, 𝑖𝑖0 = 0, ∴
𝑉𝑉𝑚𝑚
0=− + 𝐴𝐴
𝜔𝜔𝜔𝜔
or
𝐴𝐴 = 𝑉𝑉𝑚𝑚 /𝜔𝜔𝜔𝜔
Substitution of the value of 𝐴𝐴 gives
𝑉𝑉𝑚𝑚
𝑖𝑖0 = (1 − cos 𝜔𝜔𝜔𝜔)
𝜔𝜔𝜔𝜔
Output voltage,
𝑑𝑑𝑖𝑖𝑜𝑜 𝑉𝑉𝑚𝑚
𝑣𝑣0 = 𝐿𝐿 = 𝐿𝐿 [sin 𝜔𝜔𝜔𝜔]𝜔𝜔 = 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 = 𝑣𝑣𝑠𝑠
𝑑𝑑𝑑𝑑 𝜔𝜔𝜔𝜔
Source voltage 𝑣𝑣𝑠𝑠 and both output voltage 𝑣𝑣0 and output current 𝑖𝑖0 are plotted in Fig. 2(b).

Average value of output voltage, 𝑉𝑉0 = 0

3
 DIODE CIRCUITS AND RECTIFIERS

(a) (b)
Fig. 2. Single-phase one-pulse rectifier with 𝐿𝐿 load (𝑎𝑎) circuit diagram and (b) waveforms. The
output current 𝑖𝑖0 consists of dc component and fundamental frequency component of frequency
𝜔𝜔.
Peak value of current 𝐼𝐼max occurs at 𝜔𝜔𝜔𝜔 = 𝜋𝜋
𝑉𝑉𝑚𝑚 2𝑉𝑉𝑚𝑚
∴ 𝐼𝐼max ≃ (1 + 1) =
𝜔𝜔𝜔𝜔 𝜔𝜔𝜔𝜔
1 2𝜋𝜋 𝑉𝑉𝑚𝑚
Average value of current, 𝐼𝐼0 = � (1 ∼ cos 𝜔𝜔𝜔𝜔)𝑑𝑑(𝜔𝜔𝜔𝜔)
2𝜋𝜋 0 𝜔𝜔𝜔𝜔
𝑉𝑉𝑚𝑚 1
= = 𝐼𝐼
𝜔𝜔𝜔𝜔 2 max
Rms value of fundamental current, 𝐼𝐼1𝑟𝑟 is given by
1/2
1 𝑉𝑉𝑚𝑚 2 2𝜋𝜋
𝐼𝐼1𝑟𝑟 = � � � ∫0 (cos 𝜔𝜔𝜔𝜔)2 𝑑𝑑(𝜔𝜔𝜔𝜔)�
2𝜋𝜋 𝜔𝜔𝜔𝜔
𝑉𝑉𝑚𝑚 𝑉𝑉𝑠𝑠 𝐼𝐼0
= = =
√2 ⋅ 𝜔𝜔𝜔𝜔 𝜔𝜔𝜔𝜔 √2
Rms value of rectified current

= [𝐼𝐼02 + 𝐼𝐼1𝑟𝑟
2 ]1/2
1/2
𝐼𝐼02
= �𝐼𝐼02 + � = 1.225𝐼𝐼0
2

Voltage across diode, 𝑣𝑣𝐷𝐷 = 0.

(c) C Load: In Fig. 3(𝑎𝑎), when switch 𝑆𝑆 is closed at 𝜔𝜔𝜔𝜔 = 0, the equation governing the
behaviour of the circuit is
𝑑𝑑𝑣𝑣𝑠𝑠 𝑑𝑑
𝑖𝑖0 = 𝐶𝐶 = 𝐶𝐶 (𝑉𝑉𝑠𝑠 sin 𝜔𝜔𝜔𝜔)
𝑑𝑑𝑑𝑑 𝑑𝑑𝑑𝑑
4
 DIODE CIRCUITS AND RECTIFIERS

Fig. 3. Single-phase half-wave diode rectifier with 𝐶𝐶 load (𝑎𝑎) circuit diagram and (𝑏𝑏)
waveforms.
𝑖𝑖0 = 𝜔𝜔𝜔𝜔𝑉𝑉𝑚𝑚 cos 𝜔𝜔𝜔𝜔
Output voltage,
1
𝑣𝑣0 = � 𝑖𝑖𝑖𝑖𝑖𝑖 = 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 = 𝑣𝑣𝑠𝑠 = 𝑣𝑣𝐶𝐶
𝐶𝐶
𝜋𝜋
Capacitor is charged to voltage 𝑉𝑉𝑚𝑚 at 𝜔𝜔𝜔𝜔 = 2
and subsequently this voltage remains constant
at 𝑉𝑉𝑚𝑚 . This is shown as 𝑣𝑣0 = 𝑣𝑣𝐶𝐶 in Fig. 3(𝑏𝑏)
Capacitor current or load current is maximum at 𝜔𝜔𝜔𝜔 = 0. Its value at 𝜔𝜔𝜔𝜔 = 0 is 𝜔𝜔𝜔𝜔𝑉𝑉𝑚𝑚 as shown.
𝜋𝜋 𝜋𝜋
The diode conducts for 2𝜔𝜔
seconds only from 𝜔𝜔𝜔𝜔 = 0 to 𝜔𝜔𝜔𝜔 = 2 . During this interval, diode
voltage is, therefore, zero. After 𝜔𝜔𝜔𝜔 = 𝜋𝜋/2, diode voltage 𝑣𝑣𝐷𝐷 is given by
𝑣𝑣𝐷𝐷 = −𝑣𝑣0 + 𝑣𝑣𝑠𝑠 = −𝑉𝑉𝑚𝑚 + 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔
= 𝑉𝑉(sin 𝜔𝜔𝜔𝜔 − 1)
For Eq, the time origin is redefined at 𝜔𝜔𝜔𝜔 = 𝜋𝜋/2.
3𝜋𝜋
After 𝜔𝜔𝜔𝜔 = 𝜋𝜋/2, diode voltage is plotted as shown in Fig. 3 (b). At 𝜔𝜔𝜔𝜔 = 2
, 𝑣𝑣𝐷𝐷 = −2𝑉𝑉𝑚𝑚 .

Average value of voltage across diode,

1 2𝜋𝜋
𝑉𝑉𝐷𝐷 = � 𝑉𝑉𝑚𝑚 (sin 𝜔𝜔𝜔𝜔 − 1)𝑑𝑑(𝜔𝜔𝜔𝜔)
2𝜋𝜋 0
= 𝑉𝑉𝑚𝑚 = √2𝑉𝑉𝑠𝑠

5
 DIODE CIRCUITS AND RECTIFIERS

Rms value of fundamental component of voltage across diode,

1/2
1 2𝜋𝜋 𝑉𝑉𝑚𝑚
𝑉𝑉1𝑟𝑟 = � � 𝑉𝑉𝑚𝑚2 sin2 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)� =
2𝜋𝜋 0 √2
Rms value of voltage across diode

2
= �𝑉𝑉𝐷𝐷2 + 𝑉𝑉1𝑟𝑟 = 1.225𝑉𝑉𝑚𝑚

Example
A single-phase 230 V, 1 kW heater is connected across single-phase 230 V, 50 Hz supply
through a diode. Calculate the power delivered to the heater element. Find also the peak diode
current and input power factor.
Solution.
2302
Heater resistance, 𝑅𝑅 = 1000 Ω

Rms value of output voltage, from Eq, is

√2 × 230
𝑉𝑉𝑜𝑜𝑜𝑜 =
2
Power absorbed by heater element
𝑉𝑉𝑜𝑜2𝑜𝑜 2 × 2302 1000
= = × = 500 W
𝑅𝑅 4 2302
Peak value of diode current, is given by

√2 × 230
× 1000 = 6.1478 A
2302
𝑉𝑉𝑜𝑜𝑜𝑜 √2×230 1
Input power factor = = × 230 = 0.707rag.
𝑉𝑉𝑠𝑠 2

(d) RE Load: Single-phase half-wave rectifier with load resistance 𝑅𝑅 and load counter emf 𝐸𝐸
is shown in Fig. 4(𝑎𝑎). If the switch 𝑆𝑆 is closed at 𝜔𝜔𝜔𝜔 = 0∘ or when 𝑣𝑣𝑠𝑠 = 0, then diode

(a)

6
 DIODE CIRCUITS AND RECTIFIERS

(b)
Fig. 4. Single-phase half-wave diode rectifier with 𝑅𝑅𝑅𝑅 load.
would not conduct at 𝜔𝜔𝜔𝜔 = 0 because diode is reverse biased until source voltage 𝑣𝑣𝑠𝑠 equals 𝐸𝐸.
When 𝑉𝑉𝑚𝑚 sin 𝜃𝜃1 = 𝐸𝐸, diode 𝐷𝐷 starts conducting and the turn-on angle 𝜃𝜃1 is given by
𝐸𝐸
𝜃𝜃1 = sin−1 � �
𝑉𝑉𝑚𝑚
The diode now conducts from 𝜔𝜔𝜔𝜔 = 𝜃𝜃1 to 𝜔𝜔𝜔𝜔 = (𝜋𝜋 − 𝜃𝜃1 ), i.e. conduction angle for diode is
(𝜋𝜋 − 2𝜃𝜃1 ) as shown in Fig. 4(𝑏𝑏). During the conduction period of diode, the voltage equation
for the circuit is
𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 = 𝐸𝐸 + 𝑖𝑖0 𝑅𝑅
𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 − 𝐸𝐸
or 𝑖𝑖0 =
𝑅𝑅
Average value of this current is given by
𝜋𝜋−𝜃𝜃1
1
𝐼𝐼0 = �� (𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 − 𝐸𝐸)𝑑𝑑(𝜔𝜔𝜔𝜔)�
2𝜋𝜋𝜋𝜋 𝜃𝜃1
1
= [2𝑉𝑉𝑚𝑚 cos 𝜃𝜃1 − 𝐸𝐸(𝜋𝜋 − 2𝜃𝜃1 )]
2𝜋𝜋𝜋𝜋
Rms value of the load current of is
1/2
1 𝜋𝜋−𝜃𝜃1 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 − 𝐸𝐸
𝐼𝐼𝑜𝑜𝑜𝑜 =� � � � ⋅ 𝑑𝑑(𝜔𝜔𝜔𝜔)�
2𝜋𝜋 𝜃𝜃1 𝑅𝑅
𝜋𝜋−𝜃𝜃1 1/2
1
=� � (𝑉𝑉𝑚𝑚2 sin2 𝜔𝜔𝜔𝜔 + 𝐸𝐸 2 − 2𝑉𝑉𝑚𝑚 𝐸𝐸sin 𝜔𝜔𝜔𝜔)𝑑𝑑(𝜔𝜔𝜔𝜔)�
2𝜋𝜋𝜃𝜃 2 𝜃𝜃1
1/2
1 2 2 )(𝜋𝜋 2
=� {(𝑉𝑉 + 𝐸𝐸 )
− 2𝜃𝜃1 + 𝑉𝑉𝑠𝑠 sin 2𝜃𝜃1 − 4𝑉𝑉𝑚𝑚 𝐸𝐸cos 𝜃𝜃1 }�
2𝜋𝜋𝑅𝑅 2 𝑠𝑠
Power delivered to load,
2
𝑃𝑃 = 𝐸𝐸𝐼𝐼0 + 𝐼𝐼𝑜𝑜𝑜𝑜 𝑅𝑅 watts

7
 DIODE CIRCUITS AND RECTIFIERS

Power delivered to load

Power delivered to load
Supply pf =
(Source voltage) (rms value of source current)
2
𝐸𝐸𝐼𝐼0 + 𝐼𝐼𝑜𝑜𝑜𝑜 𝑅𝑅
=
𝑉𝑉𝑠𝑠 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜
It is seen from Fig. 4(𝑎𝑎) that at 𝜔𝜔𝜔𝜔 = 0∘ , 𝑣𝑣𝐷𝐷 = −𝐸𝐸 and at 𝜔𝜔𝜔𝜔 = 𝜃𝜃1 , 𝑣𝑣𝐷𝐷 = 0. During the period
diode conducts, 𝑣𝑣𝐷𝐷 = 0. When 𝜔𝜔𝜔𝜔 = 3𝜋𝜋/2, 𝑣𝑣𝑠𝑠 = −𝑉𝑉𝑚𝑚 and 𝑣𝑣𝐷𝐷 = −(𝑉𝑉𝑚𝑚 + 𝐸𝐸). Thus, PIV for
diode is (𝑉𝑉𝑚𝑚 + 𝐸𝐸).
Example.
A dc battery of constant emf 𝐸𝐸 is charged through a resistor as shown in Fig. 4 (a). For source
voltage of 235 V, 50 Hz and for 𝑅𝑅 = 8Ω, 𝐸𝐸 = 150 V,
(a) find the value of average charging current,
(b) find the power supplied to battery and that dissipated in the resistor,
(c) calculate the supply pf,
(d) find the charging time in case battery capacity is 1000Wh and
(e) find rectifier efficiency and PIV of the diode.
Solution:
(𝑎𝑎) The diode will start conducting at an angle 𝜃𝜃1 , where;
150
𝜃𝜃1 = sin−1 = 27.466∘
√2 × 230
Average value of charging current, is
1 2 × 27.466 × 𝜋𝜋
𝐼𝐼0 = �2 ⋅ √2 × 230cos 27.466∘ − 150 �𝜋𝜋 − ��
2𝜋𝜋 × 8 180
= 4.9676 A
(b) Power delivered to battery
= 𝐸𝐸𝐼𝐼0 = 150 ×× 4.9676 = 745.14 W
Rms value of charging current, is
1 𝜋𝜋
𝐼𝐼𝑜𝑜𝑜𝑜 = � �(2302 + 1502 ) �𝜋𝜋 − 2 × 27.466 × � + 2302 sin 27.466
2𝜋𝜋 × 64 180
−4√2 × 230150cos 27.466∘ �� = 9.2955 A

Power dissipated in resistor

2
= 𝐼𝐼𝑜𝑜𝑜𝑜 𝑅𝑅 = (9.2955)2 × 8 = 691.25 W
(c) the supply pf is

8
 DIODE CIRCUITS AND RECTIFIERS

745.14 + 691.25
𝑝𝑝𝑝𝑝 = = 0.672lag
230 × 9.2955
(d) (Power delivered to battery) (charging time in hours)
= Battery capacity in Wh.
∴ Charging time
(e) Rectifier efficiency
(f) PIV of diode
1000
= = 1.342 h
745.14
= Power delivered to battery
Total input power
745.14
= × 100 = 51.876%
745.14 + 691.25
= 𝑉𝑉𝑚𝑚 + 𝐸𝐸 = √2 × 230 + 150 = 475.22 V
(e) RL Load: A single-phase one-pulse diode rectifier feeding RL load is shown in Fig. 5(𝑎𝑎).
Current 𝑖𝑖0 continues to flow-even after source voltage 𝑣𝑣𝑠𝑠 has become negative; this is because
of the presence of inductance 𝐿𝐿 in the load circuit. Voltage 𝑣𝑣𝑅𝑅 = 𝑖𝑖0 𝑅𝑅 has the same waveshape
as that of 𝑖𝑖0 . Inductor voltage 𝑣𝑣𝐿𝐿 = 𝑣𝑣𝑠𝑠 − 𝑣𝑣𝑅𝑅 is also shown. The current 𝑖𝑖0 flows till the two
areas 𝐴𝐴 and 𝐵𝐵 are equal. Area 𝐴𝐴 represents the energy stored by 𝐿𝐿 and area 𝐵𝐵 the energy
released by 𝐿𝐿. It must be noted that average value of voltage 𝑣𝑣𝐿𝐿 across inductor 𝐿𝐿 is zero.

Fig. 5. Single-phase half-wave diode rectifier with 𝑅𝑅𝑅𝑅 load (a) circuit diagram and (𝑏𝑏)
waveforms.
When 𝑖𝑖0 = 0 at 𝜔𝜔𝜔𝜔 = 𝛽𝛽; 𝑣𝑣𝐿𝐿 = 0, 𝑣𝑣𝑅𝑅 = 0 and voltage 𝑣𝑣𝑠𝑠 appears as reverse bias across diode 𝐷𝐷
as shown. At 𝛽𝛽, voltage 𝑣𝑣𝐷𝐷 across diode jumps from zero to 𝑉𝑉𝑚𝑚 sin 𝛽𝛽 where 𝛽𝛽 > 𝜋𝜋. Here 𝛽𝛽 =
𝛾𝛾 is also the conduction angle of the diode.
Average value of output voltage,

9
 DIODE CIRCUITS AND RECTIFIERS

1 𝛽𝛽
𝑉𝑉0 = � 𝑉𝑉 sin 𝜔𝜔𝜔𝜔 ⋅ 𝑑𝑑(𝜔𝜔𝜔𝜔)
2𝜋𝜋 0 𝑚𝑚
𝑉𝑉𝑚𝑚
= (1 − cos 𝛽𝛽)
2𝜋𝜋
Average value of load or output current
𝑉𝑉0 𝑉𝑉𝑚𝑚
𝐼𝐼0 = = (1 − cos 𝛽𝛽)
𝑅𝑅 2𝜋𝜋𝜋𝜋
A general expression for output current 𝑖𝑖0 for 0 < 𝜔𝜔𝜔𝜔 < 𝛽𝛽 can be obtained as under:
When diode is conducting, KVL for the circuit of Fig. 5(𝑎𝑎) gives
𝑑𝑑𝑖𝑖0
𝑅𝑅𝑖𝑖0 + 𝐿𝐿 = 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔
𝑑𝑑𝑑𝑑
The load, or output, current 𝑖𝑖0 consists of two components, one steady state component 𝑖𝑖𝑠𝑠 and
the other transient component 𝑖𝑖𝑡𝑡 . Here 𝑖𝑖𝑠𝑠 is given by
𝑉𝑉𝑚𝑚
𝑖𝑖𝑠𝑠 = sin (𝜔𝜔𝜔𝜔 − 𝜙𝜙)
�𝑅𝑅𝑡𝑡2 𝑋𝑋 2
𝑋𝑋
where 𝜙𝜙 = tan−1 𝑅𝑅
and 𝑋𝑋 = 𝜔𝜔𝜔𝜔. Here 𝜙𝜙 is the angle by which rms current 𝐼𝐼𝑠𝑠 lags 𝑉𝑉𝑠𝑠 .

The transient component 𝑖𝑖𝑡𝑡 can be obtained from force-free equation

𝑑𝑑𝑖𝑖𝑡𝑡
𝑅𝑅𝑖𝑖𝑡𝑡 + 𝐿𝐿 =0
𝑑𝑑𝑑𝑑
Its solution gives
𝑅𝑅
𝑖𝑖𝑡𝑡 = 𝐴𝐴𝑒𝑒 − 𝐿𝐿 𝑡𝑡
Total solution for current 𝑖𝑖0 is, therefore, given by
Where;
𝑉𝑉𝑚𝑚 𝑅𝑅
𝑖𝑖0 = 𝑖𝑖𝑠𝑠 + 𝑖𝑖𝑡𝑡 = sin (𝜔𝜔𝜔𝜔 − 𝜙𝜙) + 𝐴𝐴𝑒𝑒 − 𝐿𝐿 𝑡𝑡
𝑍𝑍
𝑍𝑍 = �𝑅𝑅𝑡𝑡2 + 𝑋𝑋 2

Constant 𝐴𝐴 can be obtained from the boundary condition at 𝜔𝜔𝜔𝜔 = 0.

At 𝜔𝜔𝜔𝜔 = 0, or at 𝑡𝑡 = 0, 𝑖𝑖0 = 0. Thus,
𝑉𝑉𝑚𝑚
0=− sin 𝜙𝜙 + 𝐴𝐴
𝑍𝑍
𝑉𝑉𝑚𝑚
𝐴𝐴 = sin 𝜙𝜙
𝑍𝑍
Substitution of 𝐴𝐴 in gives

10
 DIODE CIRCUITS AND RECTIFIERS

𝑉𝑉𝑚𝑚 𝑅𝑅
𝑖𝑖0 = �sin (𝜔𝜔𝜔𝜔 − 𝜙𝜙) + sin 𝜙𝜙 ⋅ 𝑒𝑒 − 𝐿𝐿 𝑡𝑡 �
𝑍𝑍
0 ≤ 𝜔𝜔𝜔𝜔 ≤ 𝛽𝛽
for 0 ≤ 𝜔𝜔𝜔𝜔 ≤ 𝛽𝛽
It is also seen from the waveform of 𝑖𝑖0 in Fig. 5(𝑏𝑏) that when 𝜔𝜔𝜔𝜔 = 𝛽𝛽, 𝑖𝑖0 = 0. With this
condition, it gives
𝑅𝑅
sin (𝛽𝛽 − 𝜙𝜙) + sin 𝜙𝜙 ⋅ exp �− 𝛽𝛽� = 0
𝜔𝜔𝜔𝜔
The solution of this transcendental equation can give the value of extinction angle 𝛽𝛽.
(f) RL load with freewheeling diode: Performance of single-phase one-pulse diode rectifier
with 𝑅𝑅𝑅𝑅 load can be improved by connecting a freewheeling diode across the load as shown in
Fig. 6(𝑎𝑎). Output voltage is 𝑣𝑣0 = 𝑣𝑣𝑠𝑠 for 0 ≤ 𝜔𝜔𝜔𝜔 ≤ 𝜋𝜋. At 𝜔𝜔𝜔𝜔 = 𝜋𝜋, source voltage 𝑣𝑣𝑠𝑠 is zero. but
output current 𝑖𝑖0 is not zero because of 𝐿𝐿 in the load circuit. Just afler 𝜔𝜔𝜔𝜔 = 𝜋𝜋, as 𝑣𝑣𝑠𝑠 tends to
reverse, negative polarity of 𝑣𝑣𝑠𝑠 reaches cathode of FD through conducting diode 𝐷𝐷, whereas
positive polarity of 𝑣𝑣𝑔𝑔 reaches anode of 𝐹𝐹𝐹𝐹 direct. Freewheeling (or flywheel) diode FD,
therefore, gets forward-biased. As a result, load current 𝑖𝑖0 is immediately transferred from 𝐷𝐷
to FD as 𝑣𝑣𝑠𝑠 tends to reverse. After 𝜔𝜔𝜔𝜔 = 𝜋𝜋, diode current 𝑖𝑖𝑠𝑠 = 0 and it is subjected to reverse
voltage with PIV equal to 𝑉𝑉𝑚𝑚 .

Fig. 6. Single-phase one-pulse diode rectifier with 𝑅𝑅𝑅𝑅 load and freewheeling diode
(a) circuit diagram and (𝑏𝑏) waveforms.
After 𝜔𝜔𝜔𝜔 = 𝜋𝜋, current freewheels through circuit RL and FD. The energy stored in 𝐿𝐿 is now
dissipated in 𝑅𝑅. When energy stored in 𝐿𝐿 = energy dissipated in 𝑅𝑅, current falls to zero at 𝜔𝜔𝜔𝜔 =
𝛽𝛽 < 2𝜋𝜋. Depending upon the value of 𝑅𝑅 and 𝐿𝐿, the current may not fall to zero even when
𝜔𝜔𝜔𝜔 = 2𝜋𝜋, this is called continuous conduction. But in Fig. 6(𝑏𝑏), load current decays to zero
before 𝜔𝜔𝜔𝜔 = 2𝜋𝜋; load current is therefore discontinuous.

11
 DIODE CIRCUITS AND RECTIFIERS

The effects of using freewheeling diode are as under:

(i) It prevents the output (or load) voltage from becoming negative.
(ii) As the energy stored in 𝐿𝐿 is transferred to load 𝑅𝑅 through 𝐹𝐹𝐹𝐹, the system efficiency is
improved.
(iii) The load current waveform is smoother; the load performance is therefore improved.
The waveforms for 𝑣𝑣𝑠𝑠 , 𝑣𝑣0 , 𝑖𝑖0 , 𝑣𝑣𝐷𝐷 , 𝑖𝑖𝑠𝑠 and 𝑖𝑖𝑓𝑓𝑓𝑓 are drawn in Fig. 6(𝑏𝑏).

The expression for the load current 𝑖𝑖0 can be obtained from Art. 6.1.2 if required. It is seen
from Fig. 6 (b) that
average output voltage,
1 𝜋𝜋 𝑉𝑉𝑚𝑚
𝑉𝑉0 = � 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔) =
2𝜋𝜋 0 𝜋𝜋
and average load current,
𝑉𝑉𝑚𝑚
𝐼𝐼0 =
𝜋𝜋𝜋𝜋
(g) Single-phase full-wave diode rectifier: There are two types of full-wave diode rectifiers,
one is centre-tapped (or mid-point) full-wave diode rectifier and the other is full-wave diode
bridge rectifier. These are now described briefly. (i) Single-phase full-wave mid-point diode
rectifier: Fig. 7 (a) illustrates a single-phase full-wave mid-point rectifier using diodes. The
turns ratio from each secondary to primary is taken as unity for simplicity. When ' 𝑎𝑎 ' is positive
with respect to ' 𝑏𝑏 '; diode D1 conducts for 𝜋𝜋 radians. In the next half cycle, ' 𝑏𝑏 ' is positive with
respect to ' 𝑎𝑎 ' and therefore diode D2 conducts

Fig. 7. Single-phase full-wave mid-point diode rectifier (a) circuit diagram and (𝑏𝑏) waveforms.
The output voltage is shown as 𝑣𝑣0 in Fig. 7(𝑏𝑏). The waveform for output current 𝑖𝑖0 (not shown
in the figure) is similar to 𝑣𝑣0 waveform. When ' 𝑎𝑎 ' is positive with respect to ' 𝑏𝑏 ', diode D2 is
subjected to a reverse voltage of 2𝑣𝑣𝑠𝑠 . In the next half cycle, diode D1 experiences a reverse

12
 DIODE CIRCUITS AND RECTIFIERS

voltage of 2𝑣𝑣𝑠𝑠 . This is shown in Fig. 7(𝑏𝑏). Thus, for diodes D1 and D2, peak inverse voltage
is 2𝑉𝑉𝑚𝑚 . Waveforms of Fig. 7(𝑏𝑏) show that for one cycle of source voltage, there are two pulses
of output voltage. So single-phase full-wave diode rectifier can also be called single-phase two-
pulse diode rectifier.
1 𝜋𝜋 2𝑉𝑉𝑚𝑚
Average output voltage, 𝑉𝑉0 = 𝜋𝜋 ∫0 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔) = 𝜋𝜋
𝑉𝑉0
Average output current, 𝐼𝐼0 = 𝑅𝑅

1 𝜋𝜋 1/2
Rms value of output voltage, 𝑉𝑉𝑜𝑜𝑜𝑜 = �𝜋𝜋 ∫0 𝑉𝑉𝑚𝑚2 sin2 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)�

𝑉𝑉𝑚𝑚
= = 𝑉𝑉𝑠𝑠
√2
𝑉𝑉𝑠𝑠
Rms value of load current, 𝐼𝐼𝑜𝑜𝑜𝑜 =
𝑅𝑅

Power delivered to load

2
= 𝑉𝑉𝑜𝑜𝑜𝑜 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜 = 𝐼𝐼𝑜𝑜𝑜𝑜 ⋅ 𝑅𝑅
Input voltamperes
= 𝑉𝑉𝑠𝑠 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜
∴ Input
𝑉𝑉𝑜𝑜𝑜𝑜 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜
𝑝𝑝𝑝𝑝 = =1
𝑉𝑉𝑠𝑠 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜
(ii) Single-phase full-wave diode bridge rectifier: A single-phase full-wave bridge rectifier
employing diodes is shown in Fig. 8(𝑎𝑎). When ' 𝑎𝑎 ' is positive with respect to ' 𝑏𝑏 ', diodes D1,
D2 conduct together so that output voltage is 𝑣𝑣𝑎𝑎𝑎𝑎 . Each of the diodes D3 and D4 is subjected
to a reverse voltage of 𝑣𝑣𝑠𝑠 as shown in Fig. 8(𝑏𝑏), When ' 𝑏𝑏 ' is positive with respect to ' 𝑎𝑎 ',
diodes D3, D4 conduct together and output voltage is 𝑣𝑣𝑏𝑏𝑏𝑏 . Each of the two diodes D1 and D2
experience a reverse voltage of 𝑣𝑣𝑠𝑠 as shown.

13
 DIODE CIRCUITS AND RECTIFIERS

Fig. 8. Single-phase full-wave diode brdidge rectifier (𝑎𝑎) circuit diagram and (𝑏𝑏) waveforms.
A comparison of Figs. 7(𝑏𝑏) and 8 (b) reveals that a diode in mid-point full-wave rectifier is
subjected to PIV of 2𝑉𝑉𝑚𝑚 whereas a diode in full-wave bridge rectifier has PIV of 𝑉𝑉𝑚𝑚 only.
Three-phase bridge rectifiers using diodes are discussed in Chapter 5. Example 3.7 is
formulated to illustrate the effect of reverse recovery time on the average output voltage.
Example.
In a single-phase full-wave diode bridge rectifier, the diodes have a reverse recovery time of
40𝜇𝜇s. For an ac input voltage of 230 V, determine the effect of reverse recovery time on the
average output voltage for a supply frequency of (a) 50 Hz and (b) 2.5kHz.
Solution.
Single-phase full-wave diode bridge rectifier is shown in Fig. 8(𝑎𝑎) and output voltage 𝑣𝑣0 is
shown in Fig. 8(𝑏𝑏). If reverse recovery time is taken into consideration, the diodes D1 and D2
𝜋𝜋
will not be off at 𝜔𝜔𝜔𝜔 = 𝜋𝜋 in Fig. 8(𝑏𝑏), but will continue to conduct until 𝑡𝑡 = 𝜔𝜔 + 𝑡𝑡𝑟𝑟𝑟𝑟 as depicted
in Fig.9.

Fig. 9. Effect of reverse recovery time on output voltage.

The reduction in output voltage is given by the cross-hatched area. Average value of this
reduction in output voltage is given by
1 𝑡𝑡𝑟𝑟𝑟𝑟
𝑉𝑉𝑟𝑟 = � 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)
𝜋𝜋 0
𝑉𝑉𝑚𝑚
= (1 − cos 𝜔𝜔𝑡𝑡𝑟𝑟𝑟𝑟 )
𝜋𝜋
2√2×230
With zero reverse recovery time, average output voltage, is 𝑉𝑉0 = 𝜋𝜋
= 207.04 V

(a) For 𝑓𝑓 = 50 Hz and 𝑡𝑡𝑟𝑟𝑟𝑟 = 40𝜇𝜇s, the reduction in the average output voltage, is
𝑉𝑉𝑚𝑚
𝑉𝑉𝑟𝑟 = (1 − cos 2𝜋𝜋𝜋𝜋𝑡𝑡𝑟𝑟𝑟𝑟 )
𝜋𝜋
√2 × 230 180
= �1 − cos 2𝜋𝜋 × 50 × 40 × 10−6 × �
𝜋𝜋 𝜋𝜋
= 8.174mV
Percentage reduction in average output voltage

14
 DIODE CIRCUITS AND RECTIFIERS

8.174 × 10−3
= × 100 = 3.948 × 10−3 %
207.04
(b) For 𝑓𝑓 = 2500 Hz, the reduction in the average output voltage, is

√2 × 230 180
𝑉𝑉𝑟𝑟 = �1 − cos 2𝜋𝜋 × 2500 × 40 × 10−6 × �
𝜋𝜋 𝜋𝜋
= 19.77 V
19.77
Percentage reduction in average output voltage = 207.04 × 100 = 9.594%.

It is seen from above that the effect of reverse recovery time is negligible for diode operation
at 50 Hz, but for high-frequency operation of diodes, the effect is noticeable.
Example.
A single-phase full bridge diode rectifier is supplied from 230 V, 50 Hz source. The load
consists of 𝑅𝑅 = 10Ω and a large inductance so as to render the load current constant. Determine
(a) average values of output voltage and output current,
(b) average and rms values of diode currents,
(c) rms values of output and input currents, and supply pf:
Solution.
The circuit diagram and relevant waveforms for this uncontrolled rectifier are shown in Fig.
10.
(a) Average value of output voltage,

2𝑉𝑉𝑚𝑚 2√2 × 230

𝑉𝑉0 = = = 207.04 V
𝜋𝜋 𝜋𝜋
Average value of output current,
𝑉𝑉0 207.04
𝐼𝐼0 = = = 20.704 A
𝑅𝑅 10
(b) Average value of diode current,
𝐼𝐼0 ⋅ 𝜋𝜋 𝐼𝐼0 20.704
𝐼𝐼𝐷𝐷𝐷𝐷𝐷𝐷 = = = = 10.352 A
2𝜋𝜋 2 2
𝐼𝐼 𝜋𝜋 𝐼𝐼0 20.704
Rms value of diode current, 𝐼𝐼𝐷𝐷𝑟𝑟 = � 2𝜋𝜋
0
= = = 14.642 A
√2 √2

15
 DIODE CIRCUITS AND RECTIFIERS

=
Fig. 10. Pertaining to Example (a) circuit diagram and (b) waveforms.
As load, or output, current is ripple free, rms value of output current = average value of output
current = 𝐼𝐼0 = 20.704 A

𝐼𝐼 2 𝜋𝜋
Rms value of source current, 𝐼𝐼𝑠𝑠 = � 0𝜋𝜋 = 𝐼𝐼0 = 20.704 A

Load power = 𝑉𝑉0 𝐼𝐼0 = 207.04 × 20.704 W

Input power = 𝑉𝑉𝑠𝑠 𝐼𝐼𝑠𝑠 cos 𝜙𝜙
∴
230 × 20.704 × cos 𝜙𝜙 = 207.04 × 20.704
207.04
∴ Supply pf = cos 𝜙𝜙 = 230
= 0.90 lagging.

Example.
A diode whose internal resistance is 20Ω is to supply power to a 1000Ω load from a 230 V
(rms) source of supply. Calculate (a) the peak load current (b) the dc load current (c) the dc
diode voltage (d) the percentage regulation from no load to given load.
Solution.
A voltage of 230 V supplying power to 1000Ω, through a single diode, is shown in Fig. 11(𝑎𝑎).
Waveforms for the source voltage, load current 𝑖𝑖0 and diode voltage 𝑣𝑣𝐷𝐷 are shown in Fig.
11(𝑏𝑏).
(a) It is seen from the waveform of 𝑖𝑖0 that peak load current 𝐼𝐼𝑜𝑜𝑜𝑜 is given by

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 DIODE CIRCUITS AND RECTIFIERS

𝑉𝑉𝑚𝑚 √2 × 230
𝐼𝐼𝑜𝑜𝑜𝑜 = = = 0.3189 A
𝑅𝑅 + 𝑅𝑅‾𝐷𝐷 1020
Here 𝑅𝑅 = load resistance and 𝑅𝑅𝐷𝐷 = internal resistance of diode.

Fig. 11. Pertaining to Example (a) circuit diagram and (b) waveforms.
1 𝜋𝜋
(b) DC load current, 𝐼𝐼0 = 2𝜋𝜋 ∫0 𝐼𝐼𝑜𝑜𝑜𝑜 sin 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)

𝐼𝐼𝑜𝑜𝑜𝑜
= = 0.10151 A
𝜋𝜋
1 𝜋𝜋
(c) DC diode voltage, 𝑉𝑉𝐷𝐷 = 𝐼𝐼0 𝑅𝑅𝐷𝐷 − 2𝜋𝜋 ∫0 230√2sin 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)

𝑉𝑉𝑚𝑚 230√2
= 𝐼𝐼0 𝑅𝑅𝐷𝐷 − = 0.10151 × 20 − = −101.5 V
𝜋𝜋 𝜋𝜋
𝑉𝑉𝑚𝑚 √2×230
(d) At no load, load voltage, 𝑉𝑉𝑜𝑜𝑜𝑜 = = = 103.521 V
𝜋𝜋 𝜋𝜋

230√2 1000
At given load, load voltage, 𝑉𝑉01 = × 1020 = 101.491 V
𝜋𝜋
𝑉𝑉𝑜𝑜𝑜𝑜 −𝑉𝑉01 103.521−101.491
∴ Voltage regulation = × 100 = = 1.961%.
𝑉𝑉𝑜𝑜𝑜𝑜 103.521

2. ZENER DIODES
Zener diodes are specially constructed to have accurate and stable reverse breakdown voltage.
Circuit symbol for Zener diode is shown in Fig. 12(𝑎𝑎). When it is forward biased, it behaves
as a normal diode. When reverse biased, a small leakage current flows. If the reverse voltage
across Zener diode is increased, a value of voltage is reached at which reverse breakdown
occurs. This is indicated by a sudden increase of Zener current, Fig. 12(𝑏𝑏). The voltage after
reverse breakdown remains practically constant over a wide range of Zener current. This makes
it suitable for use as a voltage regulator to furnish constant voltage from a source whose voltage
may vary noticeably.

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 DIODE CIRCUITS AND RECTIFIERS

For the operation of Zener diode as a voltage regulator, (𝑖𝑖) it must be reverse biased with a
voltage greater than its breakdown, or Zener, voltage and (ii) a series resistor 𝑅𝑅𝑠𝑠 , Fig. 12 (c) is
necessary to limit the reverse current through the diode below its rated value.

Fig. 12. Zener diode (a) circuit symbol (b) V-I characteristics (c) use as a voltage regulator.
If 𝑉𝑉𝑧𝑧 = voltage across Zener diode, then it is seen from Fig. 12(𝑐𝑐) that source current 𝐼𝐼𝑠𝑠 is
𝑉𝑉𝑠𝑠 − 𝑉𝑉𝑧𝑧
𝐼𝐼𝑠𝑠 =
𝑅𝑅𝑠𝑠
𝑉𝑉𝑧𝑧
Load, or output, current, 𝐼𝐼0 = where 𝑅𝑅 = load resistance. Current through Zener diode,
𝑅𝑅

𝐼𝐼𝑧𝑧 = 𝐼𝐼𝑠𝑠 − 𝐼𝐼0

Power rating of a Zener diode is 𝑉𝑉𝑍𝑍 ⋅ 𝐼𝐼𝑍𝑍 . These are available in a voltage range from few volts
to about 280 V.
Example.
Design a Zener voltage regulator, shown in Fig. 13, to meet the following specifications:
Load voltage = 6.8 V, Source voltage 𝑉𝑉𝑠𝑠 is 20 V ± 20% and load current is 30 mA ± 50%.
The Zener requires a minimum current of 1 mA to breakdown. The diode 𝐷𝐷 has a forward
voltage drop of 0.6 V.

Fig. 13. Pertaining to Example.

Solution.

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 DIODE CIRCUITS AND RECTIFIERS

When source voltage is maximum and load current is minimum, then source resistance should
be maximum.
∴ 𝑉𝑉𝑠𝑠⋅m = 𝑉𝑉𝐿𝐿 + (𝐼𝐼𝐿𝐿⋅m + 𝐼𝐼𝑧𝑧 )𝑅𝑅𝑠𝑠⋅m
(20 × 0.8) − 6.8
∴ 𝑅𝑅𝑠𝑠⋅m = = 1075Ω
[30 × 0.5 + 1] × 10−3
Similarly,
𝑉𝑉𝑠𝑠⋅m = 𝑉𝑉𝐿𝐿 + (𝐼𝐼𝐿𝐿⋅m + 𝐼𝐼𝑧𝑧 )𝑅𝑅𝑠𝑠⋅m
(20 × 0.8) − 6.8
∴ 𝑅𝑅𝑠𝑠⋅m = = 200Ω
[30 × 1.5 + 1] × 10−9
Maximum load resistance,
𝑉𝑉𝐿𝐿 6.8
𝑅𝑅𝐿𝐿⋅m = = = 453.3Ω
𝐼𝐼𝐿𝐿⋅m 30 × 0.5 × 10−3
𝑉𝑉𝐿𝐿 6.8
Minimum load resistance, 𝑅𝑅𝐿𝐿⋅min = 𝐼𝐼 = 30×1.5×10−3 = 151.5Ω The voltage rating or the
𝐿𝐿⋅mex
Zener diode is
6.8 − 0.6 = 6.2 V.
Example
.The complete circuit shown in Fig. 14 (a) represents a 25 V dc voltmeter where 𝐺𝐺 is a PMMC
galvanometer having full-scale deflection current 𝐼𝐼fad = 200 micro-A and resistance 𝑅𝑅𝐺𝐺 =
500ohms, and 𝐷𝐷 is a 20-V Zener diode. Find 𝑅𝑅1 and 𝑅𝑅2 . What is the function of the diode 𝐷𝐷
in this circuit?
Solution.
Current through galvanometer,
Zener voltage
𝐼𝐼𝑓𝑓𝑓𝑓𝑓𝑓 = 𝐼𝐼2 =
𝑅𝑅2 + 𝑅𝑅𝐺𝐺
or
or
20
= 200 × 10−6
𝑅𝑅2 + 500
20 × 106
𝑅𝑅2 = − 500 = 99.5kΩ
200

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 DIODE CIRCUITS AND RECTIFIERS

Fig. 14. Pertaining to Example above.

As Zener diode current is not specified, let it be assumed zero.

∴
𝐼𝐼1 − 𝐼𝐼2 = 𝐼𝐼2 = 0 or 𝐼𝐼1 = 𝐼𝐼2 = 200𝜇𝜇A
Also
25 − 20
𝐼𝐼1 = = 200 × 10−6
𝑅𝑅1
or
5 × 106
𝑅𝑅1 = = 25kΩ
200
Function of Zener diode is to provide a constant voltage to the galvanometer circuit. Whenever
voltage across this diode exceeds 20 V, it conducts and the excess current is shunted away from
galvanometer 𝐺𝐺. So here diode 𝐷𝐷 prevents overloading of the PMMC galvanometer.

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 Phase Controlled Rectifiers | P Yegon

Phase Controlled Rectifiers

Many industrial applications make use of controllable de power. Examples of such
applications are as follows:
(a) Steel-rolling mills, paper mills, printing presses and textile mills employing dc motor
drives.
(b) Traction systems working on dc.
(c) Electrochemical and electrometallurgical processes.
(d) Magnet power supplies.
(e) Portable hand tool drives.
(f) High-voltage de transmission.
Earlier, de power was obtained from motor-generator (MG) sets or ac power was
converted to dc power by means of mercury-arc rectifiers or thyratrons. The advent of thyristors
has changed, the art of ac to de conversion. Presently, phase-controlled ac to de converters
employing thyristors are extensively used for changing constant ac input voltage to controlled
dc output voltage. In an industry where there is a provision for modernization, mercury-arc
rectifiers and thyratrons are being replaced by thyristors.
In phase-controlled rectifiers, a thyristor is turned off as ac supply voltage reverse
biases it, provided anode current has fallen to a level below the holding current. The turning-
off, or commutation, of a thyristor by supply voltage itself is called natural, or line
commutation. In industrial applications, rectifier circuits make use of more than one SCR. In
such circuits, when an incoming SCR is turned on by triggering, it immediately reverses biases
the outgoing SCR and turns it off. As phase-controlled rectifiers need no commutation
circuitry, these are simple, less expensive and are therefore widely used in industries where
controlled de power is required.
In the study of thyristor systems, SCRs and diodes are assumed ideal switches which
means that (i) there is no voltage drop across them, (ii) no reverse current exists under reverse
voltage conditions and (iii) holding current is zero. Trigger circuits are not shown in SCR
circuit for convenience. In this chapter, single-phase and three-phase controlled converters are
described and the effect of source inductance_ on their performance is examined. Basic
operating features of dual converters are also presented.

PRINCIPLE OF PHASE CONTROL

The simplest form of controlled rectifier circuits consists of a single thyristor feeding
dc power to a resistive load ' 𝑅𝑅 as shown in Fig. 1(𝑎𝑎). The source voltage is 𝑣𝑣𝑠𝑠 = 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔,
Fig. 1(𝑏𝑏). An SCR can conduct only when anode yoltage is positive and a gating signal is
applied. As such, a thyristor blocks the flow of load current 𝑖𝑖0 until it is triggered. At some
delay angle 𝛼𝛼, a positive gate signal applied between gate and cathode turns on the SCR,
Immediately, full supply voltage is applied to the load as 𝑣𝑣0 , Fig. 1 (b). At the instant of delay
angle 𝛼𝛼, 𝑣𝑣0 rises from zero to 𝑉𝑉𝑚𝑚 sin 𝛼𝛼 as shown. For resistive load, current 𝑖𝑖0 is in phase with
𝑣𝑣0 . Firing angle of a thyristor is measured from the instant it would start conducting if it were

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 Phase Controlled Rectifiers | P Yegon

replaced by a diode. In Fig. 1, if thyristor is replaced by diode, it would begin conduction at

𝜔𝜔𝜔𝜔 = 0,2𝜋𝜋, 4𝜋𝜋 etc; firing angle is therefore measured from these instants. A firing angle may
thus be defined as the angle between the instant thyristor would conduct if it were a diode and
the instant it is triggered.

Fig. 1. Single-phase half-wave thyristor circuit with R load (a) circuit diagram and (b) voltage
and current waveforms.
. A firing angle may also be defined as follows: A firing angle is measured from the
angle that gives the largest average output voltage, or the highest load voltage. If thyristor in
Fig. 1 is fired at 𝜔𝜔𝜔𝜔 = 0,2𝜋𝜋, 4𝜋𝜋 etc., the average load voltage is the highest; the. firing angle
should thus be measured from these instants. A firing angle may thus be defined as the angle
measured from the instant that gives the largest average output voltage to the instant it is
triggered.
Once the SCR is on, load current flows, until it is turned-off by reversal of voltage at
𝜔𝜔𝑖𝑖 = 𝜋𝜋, 3𝜋𝜋 etc. At these angles of 𝜋𝜋, 3𝜋𝜋, 5𝜋𝜋 etc. load current falls to zero and soon after the
supply voltage reverse biases the SCR, the device is therefore turned off. It is seen from Fig. 1
(b) that by varying the firing angle 𝛼𝛼, the phase relationship between the start of the load current
and the supply voltage can be controlled; hence the term phase control is used for such a method
of controlling the load currents.
A single-phase half-wave circuit is one which produces only one pulse of load current
during one cycle of source voltage. As the circuit shown in Fig. 1 (a) produces only one load

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 Phase Controlled Rectifiers | P Yegon

current pulse for one cycle of sinusoidal source voltage, this circuit represents a single-phase
half-wave thyristor circuit.
In Fig. 1 (b), thyristor conducts from 𝜔𝜔𝜔𝜔 = 𝛼𝛼 to 𝜋𝜋, (2𝜋𝜋 + 𝛼𝛼) to 3𝜋𝜋 and so on. Over the
firing angle delay 𝛼𝛼, load voltage 𝑣𝑣0 = 0 but during conduction angle (𝜋𝜋 − 𝛼𝛼), 𝑣𝑣0 = 𝑣𝑣𝜌𝜌 . As
firing angle is increased from zero to 𝜋𝜋, the average load voltage decreases from the largest
value to zero. The variation of voltage across thyristor is also shown as 𝑣𝑣𝑇𝑇 in Fig. 1 (b).
Thyristor remains on from 𝜔𝜔𝜔𝜔 = 𝛼𝛼 to 𝜋𝜋, (2𝜋𝜋 + 𝛼𝛼) to 3𝜋𝜋 etc., during these intervals 𝑣𝑣𝑇𝑇 = 0
(strictly speaking 1 to 1.5 V). It is off from 𝜋𝜋 to (2𝜋𝜋 + 𝛼𝛼),3𝜋𝜋 to (4𝜋𝜋 + 𝛼𝛼) etc., during these off
intervals 𝑣𝑣𝑇𝑇 has the waveshape of supply voltage 𝑣𝑣𝑠𝑠 . It may be observed that 𝑣𝑣𝑠𝑠 = 𝑣𝑣0 + 𝑣𝑣𝑇𝑇 . As
the thyristor is reverse biased for 𝜋𝜋 radians, the circuit turn-off time is given by
𝜋𝜋
𝑡𝑡𝑐𝑐 = sec
𝜔𝜔
where 𝜔𝜔 = 2𝜋𝜋𝜋𝜋 and 𝑓𝑓 is the supply frequency in Hz.
The circuit turn-off time 𝑡𝑡𝑐𝑐 must be than the SCR turn-off time 𝑡𝑡𝑞𝑞 as specified by the
manufacturers. Average voltage 𝑉𝑉0 across load 𝑅𝑅 in Fig. 1 for the single-phase half-wave
circuit in terms of firing angle 𝛼𝛼 is given by
1 𝜋𝜋 𝑉𝑉𝑚𝑚
𝑉𝑉0 = � 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 ⋅ 𝑑𝑑(𝜔𝜔𝜔𝜔) = (1 + cos 𝛼𝛼)
2𝜋𝜋 𝛼𝛼 2𝜋𝜋

The' maximum value of 𝑉𝑉0 occurs at 𝛼𝛼 = 0∘ .

𝑉𝑉𝑚𝑚 𝑉𝑉𝑛𝑛𝑛𝑛
∴ 𝑉𝑉𝑛𝑛⋅𝑚𝑚 = ⋅2=
2𝜋𝜋 𝜋𝜋
𝑉𝑉0 𝑉𝑉
Average load current, 𝐼𝐼0 = 𝑚𝑚
= 2𝜋𝜋𝜋𝜋 (1 + cos 𝛼𝛼)
𝑅𝑅
In some types of loads, one may be interested in rms value of load voltage 𝑉𝑉or. Examples of
such loads are electric heating and incandescent lamps. Rms voltage 𝑉𝑉or in such cases is
given by
T/2
1 𝜋𝜋
𝑉𝑉𝑜𝑜𝑜𝑜 = � � 𝑉𝑉𝑚𝑚2 sin2 𝜔𝜔𝜔𝜔 ⋅ 𝑑𝑑(𝜔𝜔𝜔𝜔)�
2𝜋𝜋 𝛼𝛼
1/2
𝑉𝑉𝑚𝑚 1
= �(𝜋𝜋 − 𝛼𝛼) + sin 2𝛼𝛼�
2√𝜋𝜋 2

The value of rms current 𝐼𝐼𝑜𝑜𝑜𝑜 is

𝑉𝑉𝑜𝑜𝑜𝑜
𝐼𝐼𝑜𝑜𝑜𝑜 =
𝑅𝑅

Power delivered to resistive load = (rms load voltage) (rms load current)
𝑉𝑉𝑜𝑜2𝑜𝑜 2
= 𝑉𝑉𝑜𝑜𝑜𝑜 𝐼𝐼𝑜𝑜𝑜𝑜 = = 𝐼𝐼𝑜𝑜𝑜𝑜 𝑅𝑅
𝑅𝑅

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 Phase Controlled Rectifiers | P Yegon

Input voltamperes = (rms source voltage) (tatal rms line current)

1/2
√2𝑉𝑉𝑠𝑠2 1
= 𝑉𝑉𝑠𝑠 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜 = �(𝜋𝜋 − 𝛼𝛼) + sin 2𝛼𝛼� .
2𝑅𝑅 √𝜋𝜋 2
Power delivered to load 𝑉𝑉𝑜𝑜𝑜𝑜 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜 𝑉𝑉𝑜𝑜𝑜𝑜
Input power factor = = =
Input VA 𝑉𝑉𝑠𝑠 ⋅ 𝐼𝐼𝑜𝑜𝑜𝑜 𝑉𝑉𝑠𝑠
1/2
1 1
, input 𝑝𝑝𝑝𝑝 = �(𝜋𝜋 − 𝛼𝛼) + sin 2𝛼𝛼�
√2𝜋𝜋 2

1.1. Single-phase Half-wave Circuit with RL Load

A single-phase half-wave, thyristor circuit with 𝑅𝑅𝑅𝑅 load is shown in Fig. 2 (a). Line
voltage 𝑣𝑣𝑠𝑠 is sketched in the top of Fig. 2 (b). At 𝜔𝜔𝜔𝜔 = 𝛼𝛼, thyristor is turned on by gating signal.
The load voltage 𝑣𝑣0 at once becomes equal to source voltage 𝑣𝑣2 as shown. But the inductance
𝐿𝐿 forces the load, or output, current 𝑖𝑖0 to rise gradually. After some time, 𝑖𝑖0 reaches maximum
value and then begins to decrease. At 𝜔𝜔𝜔𝜔 = 𝜋𝜋, 𝑣𝑣0 is zero but 𝑖𝑖0 is not zero because of the load
inductance 𝐿𝐿. After 𝜔𝜔𝜔𝜔 = 𝜋𝜋, 𝑆𝑆𝑆𝑆𝑆𝑆 is subjected to reverse anode voltage but it will not be turned
off as load current 𝑖𝑖0 is not less than the holding current. At some angle 𝛽𝛽 > 𝜋𝜋, 𝑖𝑖0 reduces to
zero and 𝑆𝑆𝑆𝑆𝑆𝑆 is turned off as it is already reverse biased. After 𝜔𝜔𝜔𝜔 = 𝛽𝛽, 𝑣𝑣0 = 0 and 𝑖𝑖0 = 0. At
𝜔𝜔𝜔𝜔 = 2𝜋𝜋 + 𝛼𝛼, SCR is triggered again, 𝑣𝑣0 is applied to the load and load

Fig. 2. Single-phase half-wave circuit with RL load (a) circuit diagram and (b) voltage
and current waveforms.

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 Phase Controlled Rectifiers | P Yegon

current develops as before. Angle 𝛽𝛽 is called the extinction angle and (𝛽𝛽 − 𝛼𝛼) = 𝛾𝛾 is called
the conduction angle.
1.1.2. Single-phase Half-wave Circuit with RL Load and Freewheeling Diode
The waveform of load current 𝑖𝑖0 in Fig. 2(𝑏𝑏) can be improved by connecting a
freewheeling (or fly wheeling) diode across load as shown in Fig. 3 (a). A freewheeling diode
is also called by-pass or commutating diode. At 𝜔𝜔𝜔𝜔 = 0, source voltage is becoming positive.
At some delay angle 𝛼𝛼, forward biased SCR is triggered and source voltage 𝑣𝑣𝑠𝑠 appears across
load as 𝑣𝑣0 . At 𝜔𝜔𝜔𝜔 = 𝜋𝜋, source voltage 𝑣𝑣𝑠𝑠 is zero and just after this instant, as 𝑣𝑣𝑠𝑠 tends to reverse,
freewheeling diode 𝐹𝐹𝐹𝐹 is forward biased through the conducting 𝑆𝑆𝑆𝑆𝑆𝑆. As a result, load current
𝑖𝑖0 is immediately transferred from 𝑆𝑆𝑆𝑆𝑆𝑆 to 𝐹𝐹𝐹𝐹 as 𝑣𝑣𝑠𝑠 tends to reverse. At the same time, SCR is
subjected to reverse voltage and zero current, it is therefore turned off at 𝜔𝜔𝜔𝜔 = 𝜋𝜋. It is assumed
that during freewheeling period load current does not decay to zero until the SCR is triggered
again at (2𝜋𝜋 + 𝛼𝛼). Voltage drop across FD is taken as almost zero, the load voltage 𝑣𝑣0 is,
therefore, zero during the freewheeling period.

Fig. 3. Single-phase half-wave circuit with RL load and a freewheeling diode, (a) circuit
diagram and (b) voltage and current waveforms.
In Fig. 2, load consumes power 𝑝𝑝1 from source for 𝛼𝛼 to 𝜋𝜋 (both 𝑣𝑣0 and 𝑖𝑖0 are positive)
whereas energy stored in inductance 𝐿𝐿 is returned to the source as power 𝑝𝑝2 for 𝜋𝜋 to 𝛽𝛽(𝑣𝑣0 is
negative and 𝑖𝑖0 is positive ). As a result, net power consumed by the load is the difference of
these two powers 𝑝𝑝1 and 𝑝𝑝2 . In Fig. 3, load absorbs power for 𝛼𝛼 to 𝜋𝜋, but for 𝜋𝜋 to (2𝜋𝜋 + 𝛼𝛼),
energy stored in 𝐿𝐿 is delivered to load resistance 𝑅𝑅 through the FD. As a consequence, power
consumed by load is more in Fig. 3. It can, therefore, be concluded that power delivered to
load, for the same firing anglé, is more when FD is used. As volt-ampere input is almost the

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 Phase Controlled Rectifiers | P Yegon

same in both Figs. 2 and 3, the input 𝑝𝑝𝑝𝑝(= power delivered to load/input volt-ampere) with
the use of FD is improved.
It is also seen from Figs. 2(𝑏𝑏) and 3(𝑏𝑏) that load current waveform is improved with FD
in Fig. 3 (b). Thus the advantages of using freewheeling diode are;
(i) input pf is improved
(ii) load current waveform is improved and
(iii) as a result of (ii), load performance is better.
It may be seen from Fig. 3(𝑏𝑏) that freewheeling diode prevents the load voltage 𝑣𝑣0 from
becoming negative. Whenever load voltage tends to go negative, 𝐹𝐹𝐹𝐹 comes into play. As a
result, load current is transferred from main thyristor to 𝐹𝐹𝐹𝐹, allowing the thyristor to regain its
forward blocking capability.
It is seen from Figs. 2(𝑏𝑏) and 3(𝑏𝑏) that supply current 𝑖𝑖𝑠𝑠 taken from the source is
unidirectional and is in the form of dc pulses. Single phase half-wave converter thus introduces
a dc component into the supply line. This is undesirable as it leads to saturation of the supply
transformer and other difficulties (harmonics etc.).
[Link] CONTROLLED CONVERTERS
There is a large variety of SCR controlled converters (or rectifiers). One way of classifying
these ac to de converters is according to the number of supply phases on the input side. As per
this classification, the ac to de converters discussed in Figs. 1 to 3 are single-phase half wave
converters. Three phase-controlled rectifiers, as the name suggests, have three-phase supply on
their input side, these are discussed later in this chapter. The other way of classification is
according to the number of load current pulses per cycle of source voltage.
The disadvantages of single-phase half-wave, or single-phase one-pulse converter, are
minimised by the use of single-phase full wave, or single-phase two pulse, converters. In
practice, there are two basic configurations for full-wave controlled converters. One
configuration uses an input transformer, with two windings for each input phase winding. This
is called mid-point converter. A single-phase two-pulse mid-point SCR converter is shown in
Fig. 4 (a) and a three-phase 6 pulse mid-point converter in Fig. 4 (b).

Fig. 4. (a) Single-phase two-pulse mid-point converter and (b) three-phase six-pulse mid-
point converter.

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 Phase Controlled Rectifiers | P Yegon

The second configuration uses SCRs in the form of a bridge circuit. Single-phase full-wave,
or two-pulse, bridge converter using four SCRs is shown in Fig. 6 (a). A bridge converter has
some advantages over mid-point converter.
SINGLE-PHASE [Link] CONVERTER
Single-phase two-pulse (or full-wave) converters, voltage at the output terminals can
be controlled by adjusting the firing angle delay of the thyristors. Mid-point or bridge-type
circuits may be used for ac to de conversion. In this section, first mid-point and then bridge-
type configurations are discussed with input from single-phase source.
1.3.1. Single-phase Full-wave Mid-point Converter
The circuit diagram of a single-phase full-wave converter using a center-tapped
transformer is shown in Fig. 5(𝑎𝑎). When terminal 𝑎𝑎 is positive with respect to 𝑛𝑛, terminal 𝑛𝑛 is
positive with respect to 𝑏𝑏. Therefore, 𝑣𝑣𝑎𝑎𝑎𝑎 = 𝑣𝑣𝑛𝑛𝑛𝑛 or 𝑣𝑣𝑎𝑎𝑎𝑎 = −𝑣𝑣𝑏𝑏𝑏𝑏 as 𝑛𝑛 is the mid-point of
secondary winding. Equivalent circuit of this arrangement is shown in Fig. 5(𝑏𝑏). It is assumed
here that load, or output, current is continuous and turns ratio from primary to each secondary
is unity.

Fig. 5. Single-phase full-wave mid-point converter (a) circuit diagram (b) equivalent circuit
and (c) various voltage and current waveforms.

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 Phase Controlled Rectifiers | P Yegon

Thyristors T1 and T2 are forward biased during positive and negative half cycles
respectively; these are therefore triggered accordingly. Suppose T2 is already conducting. After
𝜔𝜔𝜔𝜔 = 0, 𝑣𝑣𝑎𝑎𝑎𝑎 is positive, T1 is therefore forward biased and when triggered at delay angle 𝛼𝛼, T1
gets turned on. At this firing angle 𝛼𝛼, supply voltage 2𝑉𝑉𝑚𝑚 sin 𝛼𝛼 reverse biases 𝑇𝑇2, this SCR is
therefore turned off. Here 𝑇𝑇1 is called the incoming thyristor and T2 the outgoing thyristor. As
the incoming SCR is triggered, ac supply voltage applies reverse bias across the outgoing
thyristor and turns it off. Load current is also transferred from outgoing SCR to incoming SCR.
This process of SCR turns off by natural reversal of ac supply voltage is called natural or line
commutation.
3.2. Single-phase Full-wave Bridge Converters
Phase-controlled single-phase, or three-phase, full-wave converters are primarily of
three types; namely uncontrolled converters, half-controlled converters and fully-controlled
converters. An uncontrolled converter or rectifier uses only diodes and the level of de output
voltage cannot be controlled. A half-controlled converter or semi converter uses a mixture of
diodes and thyristors and there is a limited control over the level of de output voltage. A fully-
controlled converter or full converter uses thyristors only and there is a wider control over the
level of dc output voltage.
A single-phase full converter bridge using four SCRs is shown in Fig. 6(𝑎𝑎). The load
is assumed to be of 𝑅𝑅𝑅𝑅𝑅𝑅 type, where 𝐸𝐸 is the load circuit emf. Voltage 𝐸𝐸 may be due to a
battery in the load circuit or may be generated emf of a dc motor. Thyristor pair T1, T2 is
simultaneously triggered and 𝜋𝜋 radians later, pair 𝑇𝑇3, 𝑇𝑇4 is gated together. When a is positive
with respect to 𝑏𝑏, supply voltage waveform is shown as 𝑣𝑣𝑎𝑎𝑎𝑎 in Fig. 6(𝑏𝑏). When 𝑏𝑏 is positive
with respect to 𝑎𝑎, supply voltage waveform is shown dotted as 𝑣𝑣𝑏𝑏𝑏𝑏 . Obviously, 𝑣𝑣𝑎𝑎𝑎𝑎 = −𝑣𝑣𝑏𝑏𝑏𝑏 .
The current directions and voltage polarities shown in Fig. 6(𝑎𝑎) are treated as positive.
Load current or output current 𝑖𝑖0 is assumed continuous over the working range; this
means that load is always connected to the ac voltage source through the thyristors. Between:
𝜔𝜔𝜔𝜔 = 0 and 𝜔𝜔𝜔𝜔 = 𝛼𝛼; 𝑇𝑇1, 𝑇𝑇2 are forward biased through already conducting SCRs 𝑇𝑇3 and T4
and block the forward voltage. For continuous current, thyristors T3, T4 conduct after 𝜔𝜔𝜔𝜔 = 0
even though these are reverse biased. When forward biased 𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆𝑆1, 𝑇𝑇2 are triggered at 𝜔𝜔𝜔𝜔 =
𝛼𝛼, they get turned on. As a result, supply voltage 𝑉𝑉𝑚𝑚 sin 𝛼𝛼 immediately appears across
thyristors T3, T4 as a reverse bias, these are therefore turned off by natural, or line,
commutation. At the same time, load current 𝑖𝑖0 flowing through T3, T4 is transferred to T1,
T2 at 𝜔𝜔𝜔𝜔 = 𝛼𝛼. Note that when T1, T2 are gated at 𝜔𝜔𝜔𝜔 = 𝛼𝛼, these SCRs will get turned on only
if 𝑉𝑉𝑚𝑚 sin 𝛼𝛼 > 𝐸𝐸. Thyristors T1, T2 conduct from 𝜔𝜔𝜔𝜔 = 𝛼𝛼 to 𝜋𝜋 + 𝛼𝛼. At 𝜔𝜔𝜔𝜔 = 𝜋𝜋 + 𝛼𝛼, forward
biased SCRs T3, T4 are triggered. The supply voltage turns off 𝑇𝑇1, 𝑇𝑇2 by natural commutation
and the load current is transferred from T1, T2 to T3, T4.

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 Phase Controlled Rectifiers | P Yegon

Fig. 6. (a) Single-phase full converter bridge with RLE load (b) voltage and current waveforms
for continuous load current.
Voltage across thyristors 𝑇𝑇1, 𝑇𝑇2 is shown as 𝑣𝑣𝑇𝑇1 = 𝑣𝑣𝑇𝑇2 and that across 𝑇𝑇3, T4 as 𝑣𝑣𝑇𝑇𝑇𝑇 =
𝑣𝑣𝑇𝑇4 . Maximum reverse voltage across T1, T2, T3 or T4 is 𝑉𝑉𝑚𝑚 and at the instant of triggering
with firing angle 𝛼𝛼, each 𝑆𝑆𝑆𝑆𝑆𝑆 is subjected to a reverse voltage of 𝑉𝑉𝑚𝑚 sin 𝛼𝛼˙. Source current 𝑖𝑖, is
treated as positive in the arrow direction. Under this assumption, source current is shown
positive when T1, T2 are conducting and negative when T3, T4 are conducting, Fig. 6(𝑏𝑏).
During 𝛼𝛼 to 𝜋𝜋, both 𝑣𝑣𝑠𝑠 and 𝑖𝑖𝑠𝑠 are positive, power therefore flows from ac source to load. During
the interval 𝜋𝜋 to (𝜋𝜋 + 𝛼𝛼), 𝑣𝑣𝑠𝑠 is negative but 𝑖𝑖a is positive, the load therefore returns some of
its energy to the supply system. But the net power flow is from ac source to dc load because
(𝜋𝜋 − 𝛼𝛼) > 𝛼𝛼 in Fig. 6(𝑏𝑏).
The load terminal voltage, or full-converter output voltage, 𝑣𝑣0 is shown in Fig. 6 (b). the
average value of output voltage 𝑉𝑉0 is given by
1 𝜋𝜋+𝛼𝛼 2𝑉𝑉𝑚𝑚
𝑉𝑉0 = � 𝑉𝑉𝑚𝑚 sin 𝜔𝜔𝜔𝜔 ⋅ 𝑑𝑑(𝜔𝜔𝜔𝜔) = cos 𝛼𝛼
𝜋𝜋 𝛼𝛼 𝜋𝜋

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 Phase Controlled Rectifiers | P Yegon

THREE-PHASE FULL CONVERTERS

The conversion from AC to DC and vice-versa is done by using three phase bridge
converters. The configuration of the bridge (also called Graetz circuit) is a six-pulse converter
and the 12-pulse converter is composed of two bridges in series supplied from two different
(three-phase) transformers with voltages differing in phase by 30°.

6-pulse Graetz's bridge converter

CONDUCTION SEQUENCE IN 6-PULSE CONVERTER CONFIGURATION

All modem HVDC systems use either 6-pulse or 12-pulse converters. The 3-phase
bridge shown in Fig. below is the only configuration used in HVDC transmission. The bridge
configuration provides better utilization of converter transformer and a lower peak inverse
voltage across the converter valves when compared with other possible alternatives.
In the figures below conducting valves are indicated by thick lines. The bridge indicates
that two valves are connected to each phase (for example, 1, 4 with phase R). In the upper part
of the bridge, the anodes of the valves 1, 3, 5 are connected to the phase R, Y, B respectively.
Similarly in the lower half of the bridge, the cathodes of valves 4, 6, 2 are connected to the
phases R, Y, B respectively. The figure indicates that at any time two valves will be conducting
in series (6, 1; 1, 2; 2, 3; 3, 4; 4, 5; 5, 6) simultaneously when the source inductance of the
transformer is neglected. This is not considered a drawback in high voltage applications,
particularly with solid state converter, because it is necessary to connect many thyristor units
in series to withstand the voltage levels being used.

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 Phase Controlled Rectifiers | P Yegon

Fig. Sequence of conduction of valve of 3-phase fully controlled 6-pulse bridge converter
(Graetz’s circuit)

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 Phase Controlled Rectifiers | P Yegon

Pulse Number
The pulse number of a converter is defined as the number of pulsations (cycles of ripple)
of direct voltage per cycle of alternating voltage.
The conversion from AC to DC involves switching sequentially different sinusoidal
voltages onto the DC circuit.

A valve can be treated as a controllable switch which can be turned ON at any instant,
provided the voltage across it is positive.
The output voltage Vd of the converter consists of a DC component and a ripple whose
frequency is determined by the pulse number
For the 6-valve bridge, with zero firing delay, the voltage waveforms across the
thyristors are shown in figure below. At any given instant, one thyristor valve on either side is
conducting.

Thyristor voltage waveforms

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 Phase Controlled Rectifiers | P Yegon

d.c. output waveforms. It can be shown that for the 6-valve bridge, the total r.m.s. ripple is of
the order of 4.2% of the d.c. With the 12pulse bridge, the r.m.s. ripple is of the order of 1.03%
of the d.c. value for α = 0 and increases to about 15% at α = π/2.

Control angle (Delay angle)

The control angle for rectification (also known as the ignition angle) is the angle by
which firing is delayed beyond the natural take over for the next thyristor.
Assuming no commutation (2 thyristors on same side conducting simultaneously during
transfer), the voltage waveforms across the thyristors as shown

Commutation angle (overlap angle)

The commutation period between two thyristors on the same side of the bridge is the
angle by which one thyristor commutates to the next. During this period 𝛾𝛾 the voltage at the
electrode follows mean voltage of the 2 conducting thyristors on the same side. This is shown
in figure below

ANALYSIS OF THE IDEAL COMMUTATION PROCESS WITHOUT GATE

CONTROL
Before we understand the operation of a bridge converter it is assumed that the bridge
is connected to an infinite bus of zero source impedance. This eliminates any overlap in the
conduction of the valves and simplifies the operation. With zero source impedance, the transfer
of current (commutation) between the valves on the same side of the bridge takes place
instantaneously. The switching sequence and rectified voltage waveforms are illustrated in Fig.

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 Phase Controlled Rectifiers | P Yegon

(a) and (b) below for an uncontrolled bridge rectifier (i.e. on diode operation) with delay angle
𝛼𝛼 = 0. The valves are numbered according to the sequence of operation. Performance of the 3
-phase bridge circuit or Graetz's circuit under balanced sinusoidal 3-phase operation is
considered with the following assumptions to simplify the analysis.

Fig. Voltage and current waveforms of 6-pulse bridge converter with 𝛼𝛼 = 0

(1) The DC current is constant and ripple free.
(2) The valves can be modelled as ideal switches with zero forward impedance when
conducting and infinite backward impedance when not conducting.
(3) Ignition of the valves is carried out in sequence at equal intervals.
(4) The AC voltages at the converter bus are sinusoidal and remain constant.
The operation of the converter as rectifier can be explained as follows. Considering Fig.
(a), at the instant 𝑃𝑃, the phase voltage 𝑅𝑅 is more positive with respective to other phases and
therefore the valve 1 conducts. Similarly, phase voltage 𝑌𝑌 is more negative w.r.t other phases

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 Phase Controlled Rectifiers | P Yegon

and therefore the valve 6 conducts. This state of operation continues up to the point 𝑄𝑄, after
which the valve 2 is forward biased since the phase voltage 𝐵𝐵 becomes more negative. The
anode of 2, which is directly connected to the anode of 6 becomes more positive, as it is
connected to the phase 𝐵𝐵. Therefore, at the point 𝑄𝑄, the current commutates naturally from the
valve 6 to valve 2. The above discussion indicates that the anode of the valve which is driven
more positive and the cathode of the valve which is driven more negative will be conducting
simultaneously. Therefore, in the region 𝑃𝑃𝑃𝑃, the valves 1,6 and in the region 𝑄𝑄𝑄𝑄, the valves
1,2 conduct.
At the point 𝑅𝑅, the anode of the valve 3 connected to the phase 𝑌𝑌 will begin to be driven
more positive than the anode of the valve 1 connected to the phase 𝑅𝑅, and the current
commutation will take place from the valve 1 to valve 3 . This will be followed by commutation
of the valve 2 to valve 4 at the point 𝑆𝑆 and the valve 3 to valve 5 at the point 𝑇𝑇. Similarly,
commutation of the valve 4 to valve 6 at 𝑈𝑈, and the valve 5 to valve 1 at 𝑉𝑉 takes place. This
completes the switching cycle sequence. In the region 𝑅𝑅𝑅𝑅, the valves 2,3 conduct; and in the
region 𝑆𝑆𝑆𝑆, the valves 3,4 conduct; and so on. The order and the pair of valves conducting at
different periods are also indicated in the figure.
Further analyzing the converters, conduction occurs during the period when anode is
positive with respect to the cathode, and line-to-line voltage is applied between two mid-points
of the series connected valves 1,4 or 3,6 or 5,2. The voltage at any instant is assumed as 𝑉𝑉𝑜𝑜 (𝑡𝑡) =
√3𝑉𝑉𝑚𝑚 cos 𝜔𝜔𝜔𝜔, where 𝑉𝑉𝑚𝑚 is the peak value of the phase voltage with zero reference to the 𝑦𝑦-axis
passing through the peak of 𝑉𝑉𝑜𝑜 (𝑡𝑡).
DC OUTPUT VOLTAGE
The output waveform given in Fig. (a) above indicates voltage variation of the positive
(common cathode) and negative (common anode) poles with respect to the transformer neutral
( 𝑛𝑛 ) on the secondary side. Figure (b) shows the output voltage 𝑉𝑉𝑜𝑜 (𝑡𝑡) between the positive and
negative poles, which is indicated by thick lines. The output voltage 𝑉𝑉𝑜𝑜 (𝑡𝑡) contains ripples of
harmonic frequency, which is six times that of the main frequency because the 𝑉𝑉𝑜𝑜 (𝑡𝑡) contains
six pulses in the cycle of the main voltage. When the valves 1,2 conduct, the output voltage is
𝑉𝑉𝑅𝑅𝑅𝑅 , i.e. line-to-line voltages of the phases 𝑅𝑅 and 𝐵𝐵 (neglecting the drop across the valves).
Similarly, 𝑈𝑈𝑌𝑌𝑌𝑌 is the voltage on the output side when the valves 2,3 conduct. It can be deduced
from Fig. 3.2(b) that the output voltage is the combination of line-to-line voltages. The no-load
DC output voltage across the load without phase control is the average of 𝑉𝑉𝑜𝑜 (𝑡𝑡) and is given by
𝜋𝜋/6
1 3 𝜋𝜋/6
𝑉𝑉𝑑𝑑𝑑𝑑 = � 𝑉𝑉 (𝑡𝑡)𝑑𝑑(𝜔𝜔𝜔𝜔) = � √3𝑉𝑉𝑚𝑚 cos 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)
𝜋𝜋/3 −𝜋𝜋/6 𝑜𝑜 𝜋𝜋 −𝜋𝜋/6

Where, 𝑉𝑉𝑜𝑜 (𝑡𝑡) = 𝑉𝑉𝑅𝑅𝑅𝑅 (𝑡𝑡) in the region 𝑄𝑄𝑄𝑄 when 1,2 conduct. By considering 𝑋𝑋 − 𝑋𝑋 as
𝑦𝑦-axis and 𝑥𝑥 as origin in Fig. 3.2( b), when 𝑉𝑉𝑅𝑅𝑅𝑅 is passing through maximum value, 𝑉𝑉𝑜𝑜 (𝑡𝑡) can
be represented as

𝑉𝑉𝑜𝑜 (𝑡𝑡) = √3𝑉𝑉𝑚𝑚 cos 𝜔𝜔𝜔𝜔, as stated earlier

where 𝑉𝑉𝑚𝑚 = Peak voltage between phase and neutral on the secondary side of the converter
transformer √3𝑉𝑉𝑚𝑚 = Peak voltage between any two phases (lines) on the secondary (valve)
side of the converter transformer

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 Phase Controlled Rectifiers | P Yegon

3 +𝜋𝜋/6 3√3𝑉𝑉𝑚𝑚
𝑉𝑉𝑑𝑑𝑑𝑑 = √3𝑉𝑉𝑚𝑚 [sin 𝜔𝜔𝜔𝜔]−𝜋𝜋/6 =
𝜋𝜋 𝜋𝜋
If 𝑉𝑉𝑠𝑠𝑠𝑠 rms is the voltage the on the secondary side between two phases of the converter
transformer, then

√3𝑉𝑉𝑚𝑚 = √2𝑉𝑉𝑠𝑠𝑠𝑠
3
𝑉𝑉𝑑𝑑𝑑𝑑 = √2𝑉𝑉𝑠𝑠𝑠𝑠 ×
𝜋𝜋
3√3𝑉𝑉𝑚𝑚
1.35𝑉𝑉𝑠𝑠𝑠𝑠 =
𝜋𝜋
The phase current 𝐼𝐼𝑅𝑅 is also shown in Fig. 3.2(c). When the valve 1 conducts, the current
in the phase 𝑅𝑅 enters into the bridge circuit through the valve 𝑉𝑉1 , 𝐿𝐿𝑑𝑑 , 𝑅𝑅𝐿𝐿 and back to the point
𝑛𝑛 as shown in figure. (a) and (b)(Sequence figure above). This current is treated as positive and
𝐼𝐼𝑅𝑅 = 𝐼𝐼𝑑𝑑 . But when the valve 4 conducts, the current in the phase 𝑅𝑅 of the secondary is reversed
as shown in Fig. (c) and flows from the bridge into the secondary windings of the phase 𝑅𝑅 and
is therefore reckoned as negative. The phase current remains constant and is equal to 𝐼𝐼𝑑𝑑 because
of large inductance 𝐿𝐿𝑑𝑑 . The valve currents 𝐼𝐼1 , 𝐼𝐼3 , 𝐼𝐼5 are also shown in Fig. (d).
The valve voltage drop is shown in Fig. (e). During the period when 𝑉𝑉1 conducts, the
voltage across the valve 1 is zero in the interval 𝐶𝐶1 𝐶𝐶3 . When 𝑉𝑉1 is not conducting in the period
𝑅𝑅𝑅𝑅, the line voltage 𝑉𝑉𝑅𝑅𝑅𝑅 appears across 𝑉𝑉1 due to conduction of the valve 3 . Similarly in the
period 𝑇𝑇𝑇𝑇, line voltage 𝑈𝑈𝑅𝑅𝑅𝑅 appears across 𝑉𝑉1 due to conduction of the valve 5 . The valve
voltage in the conducting and nonconducting periods is indicated in thick lines in the interval
𝑃𝑃𝑃𝑃. Maximum voltage across the valve is the maximum of 𝑉𝑉𝑅𝑅𝑅𝑅 (maximum of lineto-line
voltage) and is equal to √3𝑉𝑉𝑚𝑚 .
Peak Inverse Voltage (PIV)
The peak inverse voltage is the maximum voltage that appears across the valve when
the valve is not conducting. From the valve voltage waveforms, the PIV is the maximum line-
to-line voltage across any two phases (maximum of 𝑉𝑉𝑅𝑅𝑅𝑅 or 𝑉𝑉𝑅𝑅𝑅𝑅 ). Therefore, the peak inverse
voltage is

PIV = √3𝑉𝑉𝑚𝑚 = √2𝑉𝑉𝑠𝑠𝑠𝑠

Peak inverse voltage in terms of DC voltage is
𝜋𝜋
= 𝑉𝑉𝑑𝑑𝑑𝑑 ×
3
= 1.047𝑉𝑉𝑑𝑑𝑑𝑑
Peak-to-Peak Ripple Voltage (PPR)
Peak-to-peak ripple voltage is the difference in the voltage at 𝜔𝜔𝜔𝜔 = 0 and 𝜔𝜔𝜔𝜔 = 𝜋𝜋/6;
by taking 𝑋𝑋 − 𝑋𝑋 as the reference axis (𝜔𝜔𝜔𝜔 = 0).

16
 Phase Controlled Rectifiers | P Yegon

�𝑉𝑉𝑜𝑜 (𝑡𝑡)𝜔𝜔𝜔𝜔=0 − 𝑉𝑉𝑜𝑜 (𝑡𝑡)𝜔𝜔𝜔𝜔=𝜋𝜋/6 � = �𝑉𝑉𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅=0 − 𝑉𝑉𝑅𝑅𝑅𝑅𝑅𝑅𝑅𝑅=𝜋𝜋/6 �

𝑃𝑃𝑃𝑃𝑃𝑃 = √3𝑉𝑉𝑚𝑚 (cos 0 − cos 𝜋𝜋/6)
= √3𝑉𝑉𝑚𝑚 (1 − 0.866) = 0.134 × √3𝑉𝑉𝑚𝑚
= 0.134 × 1.047𝑉𝑉𝑑𝑑𝑑𝑑
= 0.1403𝑉𝑉𝑑𝑑𝑑𝑑
Valve Current Relations
The load current in any one phase is carried by two valves in series. One from the upper-
half bridge (valves 1 , 3,5) and the other from the lower-half bridge (valves 2,4,6 ). From Figs.
(c) and (d), each valve conducts during two-third of a half cycle. Assuming that valve current
is a rectangular pulse of value 𝐼𝐼𝑑𝑑 and lasts for a duration of 2𝜋𝜋/3 and considering the first cycle
of the voltage of the phase 𝑅𝑅 :
𝑖𝑖1 =0 0 ≤ 𝜔𝜔𝜔𝜔 ≤ 𝜋𝜋/6
= 𝐼𝐼𝑑𝑑 𝜋𝜋/6 ≤ 𝜔𝜔𝜔𝜔 ≤ 5𝜋𝜋/6
The value current
=0 5𝜋𝜋/6 ≤ 𝜔𝜔𝜔𝜔 ≤ 𝜋𝜋
=0 𝜋𝜋 ≤ 𝜔𝜔𝜔𝜔 ≤ 2𝜋𝜋
The average valve current
1 2𝜋𝜋
𝐼𝐼𝑎𝑎𝑎𝑎1 = � 𝑖𝑖 𝑑𝑑(𝜔𝜔𝜔𝜔)
2𝜋𝜋 0 1
1 2𝜋𝜋
= �0 × 𝜋𝜋/6 + 𝐼𝐼𝑑𝑑 × + 0 × 𝜋𝜋/6�
2𝜋𝜋 3
𝐼𝐼𝑑𝑑
𝐼𝐼𝑎𝑎𝑎𝑎1 =
3
The rms current through the valve 1 is
1 2𝜋𝜋 2 1 2𝜋𝜋
2
𝐼𝐼rms = � 𝑖𝑖1 𝑑𝑑𝑑𝑑 = �0 × 𝜋𝜋/6 + 𝐼𝐼𝑑𝑑2 × + 0 × 𝜋𝜋/6�
2𝜋𝜋 0 2𝜋𝜋 3
𝐼𝐼𝑑𝑑2
=
3
This can be verified since the current lasts for 1/3 of the time and the square of the average cut
is 𝐼𝐼𝑑𝑑2 /3
𝐼𝐼𝑑𝑑
𝐼𝐼rms =
√3

GATE CONTROL (PHASE CONTROL) OF VALVES

In the previous section, natural commutation of SCRs without gate control has been
described. In this process, the transfer of current between the valves takes place at the instant
of crossing of phase voltage (𝐶𝐶1 , 𝐶𝐶2 , 𝐶𝐶3 , 𝐶𝐶4 , 𝐶𝐶5 , 𝐶𝐶6, etc., as shown in Fig. below). By delaying
the firing instants of the valves with respect to the voltage crossings, natural commutation can
be delayed by a definite time interval 𝛼𝛼 and the process is known as phase control. 𝛼𝛼 is called

17
 Phase Controlled Rectifiers | P Yegon

the firing angle, as indicated in Fig. (a) below. The effect of phase control on DC voltage
waveforms is illustrated in Figs. (a) and (b), where 𝛼𝛼 = 30∘ . It should be noted, that the voltage
area under the curve shown in Fig. (b) decreases with increase in the firing angle 𝛼𝛼 and
therefore the mean direct voltage also decreases with increase in 𝛼𝛼.

Fig. Voltage and current waveforms of 6-pulse bridge converter with 𝛼𝛼 = 30∘
Output Voltage with Phase Control
As shown in Fig. (b) above, the output voltage 𝑉𝑉𝑜𝑜 (𝑡𝑡) is the combination of line-to-line
voltages. The DC output voltage, which is the average of 𝑉𝑉𝑜𝑜 (𝑡𝑡) is given by

18
 Phase Controlled Rectifiers | P Yegon

𝜋𝜋
+𝛼𝛼
1 6
𝑉𝑉𝑑𝑑 = � 𝑉𝑉 (𝑡𝑡)𝑑𝑑(𝜔𝜔𝜔𝜔)
𝜋𝜋/3 −𝜋𝜋+𝛼𝛼 𝑜𝑜
6

=� √3𝑉𝑉𝑚𝑚 cos 𝜔𝜔𝜔𝜔𝜔𝜔(𝜔𝜔𝜔𝜔)

−𝜋𝜋
+𝛼𝛼
6
3 𝜋𝜋 𝜋𝜋
= √3𝑉𝑉𝑚𝑚 �sin � + 𝛼𝛼� + sin � − 𝛼𝛼��
𝜋𝜋 6 6
3 𝜋𝜋
= √3𝑉𝑉𝑚𝑚 �2sin cos 𝛼𝛼�
𝜋𝜋 6
3√3𝑉𝑉𝑚𝑚 3√2𝑉𝑉𝑠𝑠𝑠𝑠
= cos 𝛼𝛼 = cos 𝛼𝛼
𝜋𝜋 𝜋𝜋
𝑉𝑉𝑑𝑑 = 𝑉𝑉𝑑𝑑𝑑𝑑 cos 𝛼𝛼
where 𝑉𝑉𝑑𝑑 is the no-load DC voltage of 6-pulse unit with delay angle 𝛼𝛼 and 𝑉𝑉𝑑𝑑𝑑𝑑 is the no-load
direct voltage without phase control (𝛼𝛼 = 0).
The mean DC voltage with phase control can also be obtained as explained in Section
3.3 and is given by the expression
3𝜋𝜋
+𝛼𝛼
1 6
𝑉𝑉𝑑𝑑 = � (𝑉𝑉𝑅𝑅 − 𝑉𝑉𝑌𝑌 )𝑑𝑑(𝜔𝜔𝜔𝜔)
𝜋𝜋/3 𝜋𝜋+𝛼𝛼
6
3𝜋𝜋
+𝛼𝛼
3 6 3√3𝑉𝑉𝑚𝑚
= � √3𝑉𝑉𝑚𝑚 cos (𝜔𝜔𝜔𝜔 − 𝜋𝜋/6)𝑑𝑑(𝜔𝜔𝜔𝜔) = cos 𝛼𝛼
𝜋𝜋 𝜋𝜋+𝛼𝛼 𝜋𝜋
6

The controlled direct voltage at the output side is maximum when 𝛼𝛼 = 0 and decreases
𝜋𝜋
with increase in the firing angle 𝛼𝛼 and becomes zero at 𝛼𝛼 = 2 . The mean DC voltage becomes
𝜋𝜋
negative when 𝛼𝛼 > 2 . In Figs. (c) and (d) above, the phase current 𝐼𝐼𝑅𝑅 and the voltage across
the valve 𝑉𝑉1 are shown. The phase current 𝐼𝐼𝑅𝑅 is shifted by an angle 𝛼𝛼 with respect to the phase
current 𝐼𝐼𝑅𝑅 without phase control. The valve 𝑉𝑉1 conducts during the period 𝑃𝑃𝑃𝑃 and does not
conduct during the period 𝑅𝑅𝑅𝑅. The valve 𝑉𝑉4 conducts during the period 𝑆𝑆𝑆𝑆. The valve voltage
𝑉𝑉𝑣𝑣1 as shown in Fig. (d) is zero during the conducting period 𝑃𝑃𝑃𝑃 of the valve 𝑉𝑉1 and the
nonconducting period 𝑅𝑅𝑅𝑅 and it is characterised by line-to-line voltages 𝑉𝑉𝑅𝑅𝑅𝑅 and 𝑉𝑉𝑅𝑅𝑅𝑅 in the
periods 𝑅𝑅𝑅𝑅 and 𝑇𝑇𝑇𝑇 respectively.
For delay angles above 60∘ , some negative voltage periods begin to appear. If the output
of the bridge were connected to a pure resistance, the bridge's unidirectional current conduction
property would not prevent reverse current flow during these negative voltage periods, and the
operation would then be intermittent with no continuous current flow. However, with the
provision of the large smoothing reactor (𝐿𝐿𝑑𝑑 ), a positive current flow during the negative
periods is maintained, and energy is transferred from reactor magnetic field to the AC system.
The voltage waveforms for delay angle 𝛼𝛼 = 90∘ are illustrated in Figs(a) and (b) below. 𝑃𝑃,
𝑄𝑄, 𝑅𝑅, 𝑆𝑆, 𝑇𝑇 are the instants when the valves 1,2,3,4,5,6 are fired. The valve 1 conducts during
the period 𝑃𝑃𝑃𝑃 and the valve 2 conducts during RF, and so on. The output DC voltage 𝑉𝑉𝑜𝑜 (𝑡𝑡)
contains equal positive and

19
 Phase Controlled Rectifiers | P Yegon

Fig. Voltage and current waveforms of 6-pulse bridge converter with 𝛼𝛼 = 90∘ negative regions
(indicated by the shaded areas) and the mean direct voltage 𝑉𝑉𝑑𝑑 is zero. The phase current 𝐼𝐼𝑅𝑅
and valve voltage drops 𝑉𝑉𝑣𝑣1 are also shown in Figs. (c) and (d) respectively.

Inverter Operation
For firing angles ' 𝛼𝛼 ' greater than 90∘ , output voltage waveforms, phase current 𝐼𝐼𝑅𝑅 and
valve voltage drops are illustrated in Fig. below. The bridge operation can only be maintained
in the presence of a DC power supply in place of the DC load. This supply must be connected
such that positive polarity to the common anodes and negative polarity to the common cathodes
so that it overcomes negative voltage and forces the current to conduct in the same direction in
opposition to the induced emf in the converter transformer. This suggests that power is being
supplied from the DC to the AC system. The converter is operating as an inverter.

20
 Phase Controlled Rectifiers | P Yegon

Fig Voltage and current waveforms of 6 -pulse bridge converter with 𝛼𝛼 = 120∘
In Fig.a, 𝑃𝑃1 , 𝑃𝑃2 , 𝑃𝑃3 , etc., correspond to the instant when valves 1,2,3, etc., are fired.
𝑆𝑆1 , 𝑆𝑆2 , 𝑆𝑆3 are the instant when valves 1,2,3, etc., stop conduction respectively. In the rectifier
operation, valves 1,3,5 will conduct when their anodes are driven more positive and valves
4,6,2 will conduct when their anodes are driven more negative. However, in the inverter
operation, valves 1,3,5 will conduct when their cathodes are driven more negative and valves
4,6,2 will conduct when their anodes are driven more positive with respect to others in the
same group. Figures (a) and (b) below illustrate the voltage waveforms on full inversion with
𝛼𝛼 = 180∘ .

21
 Phase Controlled Rectifiers | P Yegon

Fig. Voltage and current waveforms of 6-pulse bridge converter with 𝛼𝛼 = 180∘
The conduction period of valves 1,3,5 is shifted by 180∘ when compared to the voltage
waveforms without phase control. Valve voltage drop 𝑉𝑉𝑣𝑣1 is positive on full version and is
negative with zero phase control. Three conditions required for power flow from the DC side
to an AC source during inversion are
(1) An active AC voltage source which provides commutating voltage waveforms
(2) Provision of firing angle control to delay commutations beyond 𝛼𝛼 = 90∘
(3) A DC power supply in place of the DC load, as indicated in the Fig. (a) below

22
 Phase Controlled Rectifiers | P Yegon

Fig. (a) 6-pulse bridge connection-inverter operation

23
 DC to AC Conversion
(INVERTER)

• General concept
• Single-phase inverter
• Harmonics
• Modulation
• Three-phase inverter

1
 DC to AC Converter (Inverter)
• DEFINITION: Converts DC to AC power by
switching the DC input voltage (or current) in a
pre-determined sequence so as to generate AC
voltage (or current) output.

• General block diagram

IDC Iac

+ +

VDC Vac

− −

• TYPICAL APPLICATIONS:
– Un-interruptible power supply (UPS), Industrial
(induction motor) drives, Traction, HVDC

2
 Simple square-wave inverter (1)

• To illustrate the concept of AC waveform

generation

SQUARE-WAVE
INVERTER

Tl T3
Dl D3

+ VO -
VDC
I0
T4 T2
D2 D4

EQUIVALENT
CIRCUIT

S1 S3

S4 S2

3
 AC Waveform Generation

S1,S2 ON; S3,S4 OFF for t1 < t < t2

vO

S1 S3 VDC

VDC t
+ vO − t1 t2
S4 S2

S3,S4 ON ; S1,S2 OFF for t2 < t < t3

vO

S1 S3

VDC t2 t3
+ vO − t

S4 S2
-VDC

4
 AC Waveforms
INVERTER OUTPUT VOLTAGE

Vdc

π 2π

-Vdc

FUNDAMENTAL COMPONENT
V1
4VDC
π

3RD HARMONIC
V1
3

5RD HARMONIC
V1
5

5
 Harmonics Filtering
DC SUPPLY INVERTER (LOW PASS) FILTER LOAD
L
+ +
C
vO 1 vO 2
−
−

BEFORE FILTERING AFTER FILTERING

vO 1 vO 2

• Output of the inverter is “chopped AC voltage with

zero DC component”. It contain harmonics.

• An LC section low-pass filter is normally fitted at

the inverter output to reduce the high frequency
harmonics.

• In some applications such as UPS, “high purity” sine

wave output is required. Good filtering is a must.
• In some applications such as AC motor drive,
filtering is not required.
6
 Variable Voltage Variable
Frequency Capability

Vdc2 Higher input voltage

Higher frequency

Vdc1 Lower input voltage

Lower frequency

• Output voltage frequency can be varied by “period”

of the square-wave pulse.

• Output voltage amplitude can be varied by varying

the “magnitude” of the DC input voltage.

• Very useful: e.g. variable speed induction motor

drive
7
 Output voltage harmonics/
distortion

• Harmonics cause distortion on the output voltage.

• Lower order harmonics (3rd, 5th etc) are very

difficult to filter, due to the filter size and high filter
order. They can cause serious voltage distortion.

• Why need to consider harmonics?

– Sinusoidal waveform quality must match TNB
supply.
– “Power Quality” issue.
– Harmonics may cause degradation of
equipment. Equipment need to be “de-rated”.

• Total Harmonic Distortion (THD) is a measure to

determine the “quality” of a given waveform.

8
Total Harmonics Distortion (THD)
Voltage THD : If Vn is the nth harmonic voltage,
∞
I (Vn,RMS )2
THDv = n=2
V1,RMS

V2,RMS 2 + V3,RMS 2 + .... + V2,RMS 2

=
V1,RMS
If the rms voltage for the vaveformis known,
∞
I (VRMS )2 − (V1,RMS )2
THDv = n=2
V1,RMS
Current THD :
∞
I (In,RMS )2
THDi = n=2
I1,RMS
V
In = n
Zn
Z n is the impedance at harmonic frequency.

9
 Fourier Series

• Study of harmonics requires understanding of wave

shapes. Fourier Series is a tool to analyse wave
shapes.

Fourier Series
1 2π
ao =
π f f (v)dθ ("DC" term)
0

1 2π
an =
π f f (v) cos(nθ )dθ ("cos" term)
0

1 2π
bn =
π f f (v) sin(nθ )dθ ("sin" term)
0
Inverse Fourier
∞
1
f (v) = a o + I (an cos nθ + bn sin nθ )
2 n=1
where θ = ωt

10
 Harmonics of square-wave (1)

Vdc

θ=ωt
π 2π

-Vdc

rπ 2π l
1
ao = If Vdc dθ + f − Vdc dθ I = 0
πI Iu
L0 π
Vdc rπ 2π l
an = If cos(nθ )dθ − fcos(nθ )dθ I = 0
π I Iu
L0 π
Vdc rπ 2π l
bn = If sin(nθ )dθ − fsin(nθ )dθ I
π I I
u
L0 π

11
Harmonics of square wave (2)

Solving,
V
[ π
bn = dc −cos(nθ ) 0 + cos(nθ )π
nπ
2π
]
V
= dc [(cos 0 − cos nπ ) + (cos 2nπ − cos nπ )]
nπ
V
= dc [(1− cos nπ ) + (1 − cos nπ )]
nπ
2V
= dc [(1− cos nπ )]
nπ

When n is even, cos nπ = 1

bn= 0
(i.e. even harmonics do not exist)

When n is odd, cos nπ = −1

4V
bn= dc
nπ
12
 Spectra of square wave
Normalised
Fundamental
1st

3rd (0.33)

5th (0.2)
7th (0.14)
9th (0.11)
11th (0.09)
1 3 5 7 9 11
n

• Spectra (harmonics) characteristics:

– Harmonic decreases with a factor of (1/n).
– Even harmonics are absent
– Nearest harmonics is the 3rd. If fundamental is
50Hz, then nearest harmonic is 150Hz.
– Due to the small separation between the
fundamental an harmonics, output low-pass
filter design can be very difficult.
13
 Quasi-square wave (QSW)

Vdc

2π

-Vdc

Note that an = 0. (due to half - wave symmetry)

r 1 π −α
bn = 2 I
π
IL α
f dc
V sin(nθ )dθ
l 2V
I =
Iu nπ
[
dc −cos nθ π −α
α
]
2Vdc
= [cos(nα )− cos n(π − α )]
nπ
Expanding :
cos n(π − α ) = cos(nπ − nα )
= cos nπ cos nα + sin nπ sin nα = cos nπ cos nα
2Vdc
⇒ bn = [cos(nα ) − cos nπ cos nα ]
nπ
2Vdc
= cos(nα )[1− cos nπ ]
nπ
14
 Harmonics control
If n is even, ⇒ bn = 0,
4Vdc
If n is odd, ⇒ bn = cos(nα )
nπ
In particular, amplitude of the fundamental is :
4Vdc
b1 = cos(α )
π

Note :
The fundamental , b1, is controlled by varying a
Harmonics can also be controlled by adjusting α ,

Harmonics Elimination :
For example if α = 30o , then b3 = 0, or the third
harmonic is eliminated from the waveform. In
general, harmonic n will be eliminated if :
90o
α=
n
15
 Example
A full - bridge single phase inverter is fed by square wave
signals. The DC link voltage is 100V. The load is R = 10R
and L = 10mH in series. Calculate :
a) the THDv using the "exact" formula.
b) the THDv by using the first three non - zero harmonics
c) the THDi by using the first three non - zero harmonics
Repeat (b) and (c) for quasi - square wave case with α = 30
degrees

16
 Half-bridge inverter (1)

S1 ON
Vdc S2 OFF
+
S1 2
VC1
-
− V +
Vdc o
G 0
t
RL
+
VC2 S2
- Vdc
−
2 S1 OFF
S2 ON

• Also known as the “inverter leg”.

• Basic building block for full bridge, three phase

and higher order inverters.

• G is the “centre point”.

• Both capacitors have the same value. Thus the DC

link is equally “spilt” into two.

• The top and bottom switch has to be

“complementary”, i.e. If the top switch is closed
(on), the bottom must be off, and vice-versa.
17
 Shoot through fault and
“Dead-time”
• In practical, a dead time as shown below is required
to avoid “shoot-through” faults, i.e. short circuit
across the DC rail.

• Dead time creates “low frequency envelope”. Low

frequency harmonics emerged.

• This is the main source of distortion for high-quality

sine wave inverter.

S1
signal
+ S1 (gate)
Ishort

Vdc G
S2
RL
signal
− (gate)
S2

"Shoot through fault" . td td

Ishort is very large
"Dead time' = td

18
 Single-phase, full-bridge (1)
• Full bridge (single phase) is built from two half-
bridge leg.

• The switching in the second leg is “delayed by 180

degrees” from the first leg.

VRG
Vdc
2
LEG R LEG R' 2π t
+
Vdc Vdc
−
2 S1 S3 VR'G 2
+ - Vdc
+ Vo - 2
Vdc R R'
G 2π t
-
+ Vdc
−
2
Vdc S4 S2 Vo
2
Vdc
-
2π t
Vo = V RG − VR 'G
G is " virtual groumd"

− Vdc

19
 Three-phase inverter

• Each leg (Red, Yellow, Blue) is delayed by 120

degrees.

• A three-phase inverter with star connected load is

shown below

+Vdc
+
Vdc/2 S1 S3 S5

−
G R Y B
iR iY iB
+
S4 S6 S2
Vdc/2
−

ia ib
ZR ZY ZB

20
 Three phase inverter waveforms
Inverter Phase
Voltage VDC/2
(or pole switching
waveform)
VRG -VDC/2

12 00
VDC/2
VYG

-VDC/2
2400
VDC/2
VBG

-VDC/2
VDC
lIne-to -ine
Voltage
VRY
-VDC

2VDC/3
Six-step
Waveform VDC/3
VRN

-VDC/3
-2VDC/3

Interval 1 2 3 4 5 6
Positive device(s) on 3 3,5 5 1,5 1 1,3
Negative device(s) on 2,4 4 4,6 6 2,6 2

Quasi-square wave operation voltage waveforms

21
 Pulse Width Modulation (PWM)
Modulating Waveform Carrier waveform
+1
M1

−1

Vdc
2

0 t 0 t1 t 2 t3 t 4 t 5

Vdc
−
2

• Triangulation method (Natural sampling)

– Amplitudes of the triangular wave (carrier) and
sine wave (modulating) are compared to obtain
PWM waveform. Simple analogue comparator
can be used.

– Basically an analogue method. Its digital

version, known as REGULAR sampling is
widely used in industry.

22
 PWM types
• Natural (sinusoidal) sampling (as shown
on previous slide)
– Problems with analogue circuitry, e.g. Drift,
sensitivity etc.
• Regular sampling
– simplified version of natural sampling that
results in simple digital implementation
• Optimised PWM
– PWM waveform are constructed based on
certain performance criteria, e.g. THD.
• Harmonic elimination/minimisation PWM
– PWM waveforms are constructed to eliminate
some undesirable harmonics from the output
waveform spectra.
– Highly mathematical in nature
• Space-vector modulation (SVM)
– A simple technique based on volt-second that is
normally used with three-phase inverter motor-
drive
23
 Modulation Index, Ratio
Modulating Waveform Carrier waveform
+1
M1

−1

Vdc
2

0 t 0 t1 t 2 t 3 t 4 t5

Vdc
−
2

Modulation Index (Modulation Depth) = M I :

Amplitude of the modulating waveform
MI =
Amplitude of the carrier waveform

Modulation Ratio (Frequency Ratio) = MR (= p)

Frequency of the carrier waveform
MR = p =
Frequency of the modulating waveform
24
 Modulation Index, Ratio
Modulation Index deterrmines the output
voltage fundamental component

If 0 < MI < 1,
V1 = MI Vin
where V1, Vin are fundamental of the output
voltage and input (DC) voltage, respectively.
−−−−−−−−−−−−−−−−−−−−−−−−−−−−
Modulation ratio determines the incident (location)
of harmonics in the spectra.

The harmonics are normally located at :

f = kMR ( fm )
where fm is the frequency of the modulating signal
and k is an integer (1,2,3...)

25
 Regular sampling

t1 t2 Sinusoidal modulating
Carrier, vc(t)
waveform, vm(t)

2π
t

Regular sampling waveform, vs (t)

t'1 t'2

vpwm t

Regular sampling PWM

26
Asymmetric and symmetric
regular sampling

T
+1 M1 sinωmt
sample
point

t
T 3T 5T π
4 4 4 4

−1

Vdc
2 asymmetric
sampling

t
t0 t1 t2 t3
symmetric
sampling
V
− dc
2

Generating of PWM waveform regular sampling

27
 Bipolar Switching

Modulating Waveform Carrier waveform

+1
M1

−1

Vdc
2

0 t0 t1 t2 t 3 t 4 t5

Vdc
−
2

28
 Unipolar switching

A Carrier waveform B

(a)

S1

(b)

S3

(c)

Vpwm

(d)

Unipolar switching scheme

29
Bipolar PWM switching: Pulse-
width characterization

∆ δ=∆ modulating carrier

4 waveform waveform

2π

kth
pulse

2π
δ1k
δ 2k

αk

30
 The kth Pulse

∆
δ0 δ0 δ0 δ0
+ Vdc
2
δ 2k
δ1k

+ Vdc
2
αk

The kth PWM pulse

31
Determination of switching angles
for kth PWM pulse (1)
AS2
v Vmsin(θ )
AS1

+ Vdc
2

Ap1 Ap2

V
− dc
2

Equating the volt - second,

As1 = Ap1
As2 = Ap 2

32
 PWM Switching angles (2)
The Volt - second during the first half cycle
of the PWM pulse is given as :

Ap1 = ( dc l(δ1k ) − ( dc l(2δo − δ1k )

V V
2 2
= (Vdc )(δ1k − δo )
Similarly for the second half,

Ap2 = ( dc l(δ 2k ) − ( dc l(2δo − δ 2k )

V V
2 2
= (Vdc )(δ2k − δo )
The volt - second supplied by the sinusoid,
αk
As1 = fVm sinθdθ = Vm [cos(αk − 2δo ) − cosαk ]
αk −2δo
= 2Vm sin δo sin(αk − δo )
Similarly,
As2 = 2δoVm sin(αk + δo )

33
 Switching angles (3)
For small angle δo
sin δo → δo ,
⇒ As1 = 2δoVm sin(αk − δo )
⇒ As2 = 2δoVm sin(αk − δo )
To derive the modulation strategy,
Ap1 = As1;
A p2 = As2
Hence, for the the first half cycle of PWM pulse,
(Vdc )(δ1k − δo ) = 2δoVm sin(αk − δo )
2Vm
⇒ (δ1k − δo ) = (δo sin(αk − δo )
Vdc
By definition, the Modulation Ratio,
Vm
MI = is known as modulation
(Vdc 2 )
Thus, the pulse width for the first half cycle
of the PWM waveform is given by :
⇒ δ1k = δo [1+ M I sin(αk − δo )]

34
 PWM switching angles (4)
Thus the leading edge switching angle of
the kth pulse is :
αk − δ1k

Using similar method, pulse width of the

second half cycle of PWM waveform:
δ 2k = δo [1+ M I sin(αk + δo )]
And the trailing edge angle :
αk + δ 2k

The above equation is valid for Asymmetric

Modulation, i.eδ1k and δ 2k are different.

For Symmetric Modulation,

δ1k = δ 2k = δ k
Hence
⇒ δ k = δo [1+ M I sinαk ]
35
 Example
• For the PWM shown below, calculate the switching
angles pulses no. 2.

carrier
2V
waveform
1.5V

2π
modulating
waveform

1 2 3 4 5 6 7 8 9

t13 t15 t17

t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t14 t16 t18 2π

α1

36
 Harmonics of bipolar PWM
∆

Assuming the PWM δ0 δ0 δ0 δ0

+ Vdc
waveform is half 2
δ 2k
wave symmetry, δ1k

harmonic
content of each
(kth) PWM pulse + Vdc
2
can be computed as : αk

( 1T l
I
bnk = 2 f f (v) sin nθdθ I
I I
\π 0 )

2/r αk −δ1k l/
( Vdc l
= � f I− I sin nθdθ t
π / α −2δ \ 2 ) /J
lk o

2/r αk +δ 2k l/
( Vdc l
+ � f I I sin nθdθ t
π / α −δ \ 2 ) /J
l k 1k
2/r αk +2δ o l/
( Vdc l
+ � f I− I sin nθdθ t
π /α +δ \ 2 ) /
l k 2k J
37
 Harmonics of Bipolar PWM
Which can be reduced to :
V
bnk = − dc {cos n(αk − 2δo ) − cos n(αk − δ1k )
nπ
+ cos n(αk + δ 2k ) − cos n(αk − δ1k )
+ cos n(αk + δ 2k ) − cos n(αk + 2δo )}
Yeilding,
2Vdc
bnk = [cos n(αk − δ1k ) − cos n(αk − 21k )
nπ
+ 2 cos nαk cos n2δo ]
This equation cannot be simplified
[Link] Fourier coefficent for the
PWM waveform isthe sum of bnk for the p
pulses over one period, i.e. :
p
bn = I b n k
k =1
Next slide shows the computation of this equation.

Power Electronics and 38

Drives (Version 3-2003):
Dr. Zainal Salam UTM-JB
 PWM Spectra

M I = 0.2

Amplitude

M I = 0.4
1.0

0.8
M I = 0.6

0.6
Modulation
Index
0.4 M I = 0.8

0.2

0 M I = 1 .0
p 2p 3p 4p

Fundamental
NORMALISED HARMONIC AMPLITUDES FOR
SINUSOIDAL PULSE-WITDH MODULATION

39
 PWM spectra observations
• The harmonics appear in “clusters” at multiple of
the carrier frequencies .
• Main harmonics located at :
f = kp (fm); k=1,2,3....

where fm is the frequency of the modulation (sine)

waveform.

• There also exist “side-bands” around the main

harmonic frequencies.

• Amplitude of the fundamental is proportional to the

modulation index.
The relation ship is given as:
V1= MIVin

• The amplitude of the harmonic changes with MI.

Its incidence (location on spectra) is not.

• When p>10, or so, the harmonics can be

normalised. For lower values of p, the side-bands
clusters overlap-normalised results no longer apply.

40
Tabulated Bipolar PWM Harmonics

0.2 0.4 0.6 0.8 1.0

n
MI
1 0.2 0.4 0.6 0.8 1.0
MR 1.242 1.15 1.006 0.818 0.601
MR +2 0.016 0.061 0.131 0.220 0.318
MR +4 0.018

2MR +1 0.190 0.326 0.370 0.314 0.181

2MR +3 0.024 0.071 0.139 0.212
2MR +5 0.013 0.033

3MR 0.335 0.123 0.083 0.171 0.113

3MR +2 0.044 0.139 0.203 0.716 0.062
3MR +4 0.012 0.047 0.104 0.157

3MR +6 0.016 0.044

4MR +1 0.163 0.157 0.008 0.105 0.068

4MR +3 0.012 0.070 0.132 0.115 0.009

4MR+5 0.034 0.084 0.119

4MR +7 0.017 0.050

41
 Three-phase harmonics

• For three-phase inverters, there is significant

advantage if MR is chosen to be:

– Odd: All even harmonic will be eliminated

from the pole-switching waveform.
– triplens (multiple of three (e.g. 3,9,15,21, 27..):
All triplens harmonics will be eliminated from
the line-to-line output voltage.

• By observing the waveform, it can be seen that with

odd MR, the line-to-line voltage shape looks more
“sinusoidal”.

• As can be noted from the spectra, the phase voltage

amplitude is 0.8 (normalised). This is because the
modulation index is 0.8. The line voltage amplitude
is square root three of phase voltage due to the
three-phase relationship

42
 Effect of odd and “triplens”
Vdc 2π
2 VRG

Vdc
−
2
Vdc
2 VYG

Vdc
−
2
Vdc
VRY

− Vdc
p = 8, M = 0.6
Vdc
2
VRG

Vdc
−
2
Vdc
2
VYG

Vdc
−
2

Vdc
VRY

− Vdc
p = 9, M = 0.6
ILLUSTRATION OF BENEFITS OF USING A FREQUENCY RATIO
THAT IS A MULTIPLE OF THREE IN A THREE PHASE INVERTER

43
 Spectra: effect of “triplens”

Amplitude

0.8 3 (Line to line voltage)

1.8

1.6

1.4

1.2

1.0

0.8

0.6
B
0.4
41 43 61 65 83 85
19 23 37 47 59 67 79 89
0.2

0 A
21 63
83 85
19 23 41 43 61 65 81 87
39 45 59 67 79 89
37 47 57 69 77 91 Harmonic Order
Fundamental
COMPARISON OF INVERTER PHASE VOLTAGE (A) & INVERTER LINE VOLTAGE
(B) HARMONIC (P=21, M=0.8)

44
 Comments on PWM scheme
• It is desirable to have MR as large as possible.

• This will push the harmonic at higher frequencies

on the spectrum. Thus filtering requirement is
reduced.

• Although the voltage THD improvement is not

significant, but the current THD will improve
greatly because the load normally has some current
filtering effect.

• However, higher MR has side effects:

– Higher switching frequency: More losses.
– Pulse width may be too small to be constructed.
“Pulse dropping” may be required.

45
 Example
The amplitudes of the pole switching waveform harmonics of the red
phase of a three-phase inverter is shown in Table below. The inverter
uses a symmetric regular sampling PWM scheme. The carrier frequency
is 1050Hz and the modulating frequency is 50Hz. The modulation
index is 0.8. Calculate the harmonic amplitudes of the line-to-voltage
(i.e. red to blue phase) and complete the table.
Harmonic Amplitude (pole switching Amplitude (line-to
number waveform) line voltage)
1 1
19 0.3
21 0.8
23 0.3
37 0.1
39 0.2
41 0.25
43 0.25
45 0.2
47 0.1
57 0.05
59 0.1
61 0.15
63 0.2
65 0.15
67 0.1
69 0.05

46
 DC-DC Converter
Chapter 3 (Chopper)
DEFINITION:
DC to DC CONVERTER Converting the unregulated DC input to a
controlled DC output with a desired
(CHOPPER) voltage level.

• General
• General block diagram:
• Buck converter
• Boost converter
DC supply
• Buck-Boost converter (from rectifier-
DC output LOAD
filter, battery,
• Switched-mode power supply fuel cell etc.)

• Bridge converter
Vcontrol
• Notes on electromagnetic compatibility (derived from
feedback circuit)
(EMC) and solutions.

• APPLICATIONS:
– Switched-mode power supply (SMPS), DC
motor control, battery chargers
1

Linear regulator Switching Regulator

• Transistor is operated
in linear (active) • Transistor is operated
mode. in switched-mode:
+ Vce − IL
+ VCEce − IL
– Switch closed:
+ Fully on (saturated) +
– Switch opened: RL
• Output voltage Vin
RL Vo Vin Vo
Fully off (cut-off)
−
−

Vo = Vin − Vce – When switch is open,

SWITCHING REGULATOR

LINEAR REGULATOR no current flow in it IL

– When switch is
closed no voltage SWITCH
• The transistor can be drop across it. RL
+
Vin Vo
conveniently + Vce −
−
IL
modelled by an • Since P=V.I, no losses
RT
equivalent variable +
occurs in the switch.
RL Vo
resistor, as shown. Vin – Power is 100% EQUIVALENT CIRCUIT
− transferred from Vo
source to load. Vin
• Power loss is high at – Power loss is zero
EQUIVALENT (ON) (OFF) (ON)
high current due to: (for ideal switch): closed open closed
CIRCUIT
DT T
Po = I L 2 × RT
• Switching regulator is OUTPUT VOLTAGE
or the basis of all DC-DC
Po = Vce × I L converters

3 4
 Buck (step-down) converter Switch is turned on (closed)
• Diode is reversed + vL -
S L biased.
S iL
+ +
Vd D C RL +
Vo Vd C RL Vo
• Switch conducts VD
− −
− inductor current

CIRCUIT OF BUCK CONVERTER vL

iL • This results in
positive inductor Vd − Vo
S + vL −
+ voltage, i.e: opened opened
Vo closed closed
Vd D RL
t
−
v L = Vd − Vo
CIRCUIT WHEN SWITCH IS CLOSED
• It causes linear −Vo
S iL increase in the iL
+ vL − inductor current
+ iLmax
di IL
Vd
D RL Vo vL = L L iLmin
dt
−
1
CIRCUIT WHEN SWITCH IS OPENED
Ÿ iL = ³ v L dt DT T
t
L
5 6

Switch turned off (opened) Analysis

+ vL - When the switch is closed (on) :
• Because of inductive
di
energy storage, iL S iL v L = Vd − Vo = L L vL
+ dt
continues to flow. C Vo
Vd D RL diL Vd − Vo Vd− Vo
−
Ÿ = closed
dt L t
• Diode is forward Derivative of i L is a positive
biased vL [Link] iL must
increased linearly. iL
Vd−Vo
• Current now flows opened opened
From Figure iL max
(freewheeling) closed closed
diL ΔiL ΔiL Vd − Vo
through the diode. t = = = IL Δi L
dt Δt DT L
§ Vd − Vo ·
Ÿ (ΔiL )closed = ¨
iL min
¸ ⋅ DT
• The inductor voltage © L ¹ t
DT T
can be derived as: −Vo For switch opened,
iL
di
v L = −Vo = L L
dt
vL = −Vo iLmax
IL di − Vo
iLmin Ÿ L=
dt L
(1-D)T diL ΔiL ΔiL − Vo
∴ = = =
t dt Δt (1 − D)T L
DT T
§ −V ·
Ÿ (ΔiL )opened = ¨ o ¸ ⋅ (1 − D)T
© L ¹
7 8
 Steady-state operation Average, Maximum and
Minimum Inductor Current
iL iL
Unstable current
Imax
t ΔiL
IL

iL Decaying current Imin

t
t
Average inductor current = Average current in R L
iL Steady-state current V
Ÿ IL = IR = o
R
t Maximum current :
ΔiL Vo 1 § Vo ·
Steady - state operation requires that iL at the I max = I L + = + ¨ (1 − D )T ¸
2 R 2© L ¹
end of switching cycle is the same at the
§ 1 (1 − D ) ·
begining of the next cycle. That is the change = Vo ¨ + ¸
©R 2 Lf ¹
of iL over one period is zero, i.e : Minimum current :
(ΔiL )closed + (ΔiL )opened = 0 Δi L § 1 (1 − D ) ·
I min = I L − = Vo ¨ − ¸
§ Vd − Vo · § − Vo ·
2 ©R 2 Lf ¹
¨ ¸ ⋅ DTs − ¨ ¸ ⋅ (1 − D)Ts = 0 Inductor current ripple :
© L ¹ © L ¹
ΔiL = I max − I min
Ÿ Vo = DVd
9 10

Continuous Current Mode (CCM) Output voltage ripple

iL KCL, Capacitor current :
ic = iL + iR L iL iR
Imax
The charge can be witten as : +
iC
Q = CVo Vo

t
Ÿ ΔQ = CΔV −
Imin
0
ΔQ
Ÿ o ΔVo =
C i m ax
iL
From previous analysis, Use triangle area formula :
i L= IR
1 § T ·§ Δi ·
Δi L § 1 (1 − D) · ΔQ = ¨ ¸¨ L ¸ V o/R i m in
I min = I L − = Vo ¨ − ¸ 2 © 2 ¹© 2 ¹
2 ©R 2 Lf ¹ T Δi L iC
=
For continuous operation, I min ≥ 0, 8
Ripple voltage (Peak - to peak)
§ 1 (1 − D) · TΔiL (1 − D )
Vo ¨ − ¸≥0 ∴ ΔVo = =
©R 2 Lf ¹ 8C 8 LCf 2
(1 − D) So, the ripple factor,
Ÿ L ≥ Lmin = ⋅R ΔVo (1 − D )
2f r= =
Vo 8 LCf 2
This is the minimum inductor current to
Note : Ripple can be reduced by :
ensure continous mode of operation. 1) Increasing switching frequency
Normally L is chosen b be >> Lmin 2) Increasing inductor size
3) Increasing capacitor size.
11 12
 Basic design procedures Examples
SWITCH
A buck converter has an input of 6 V and an output of 1.5 V. The load resistor is
L
3 Ω, the switching frequency is 400 kHz, L = 5 μH, and C =10 μF. Determine (a)
Lmin= ? the duty ratio (b) the average and peak inductor currents (c) the average source
L = 10Lmin
RL
Po = ?
current, (d) the peak and average diode current.
Vd D
f=? C Io = ?
(input
D=? ripple ?
spec.)
TYPE ?

• Calculate D to obtain required output voltage.

• Select a particular switching frequency (f) and device

– preferably f>20KHz for negligible acoustic noise
– higher fs results in smaller L and C. But results in higher losses.
Reduced efficiency, larger heat sink.
– Possible devices: MOSFET, IGBT and BJT. Low power MOSFET can • A buck converter is supplied from a 50V battery source. Given
reach MHz range. L=400uH, C=100uF, R=20 Ohm, f=20KHz and D=0.4.
• Calculate Lmin. Choose L>>10 Lmin Calculate: (a) output voltage (b) maximum and minimum
• Calculate C for ripple factor requirement. inductor current, (c) output voltage ripple.
– Capacitor ratings:
• must withstand peak output voltage
• must carry required RMS current. Note RMS current for • A buck converter has an input voltage of 50V and output of
triangular w/f is Ip/3, where Ip is the peak capacitor current given 25V. The switching frequency is 10KHz. The power output is
by ΔiL/2.
125W. (a) Determine the duty cycle, (b) value of L to limit the
• ECAPs can be used
peak inductor current to 6.25A, (c) value of capacitance to limit
the output voltage ripple factor to 0.5%.
• Wire size consideration:
– Normally rated in RMS. But iL is known as peak. RMS value
for iL is given as: • Design a buck converter such that the output voltage is 28V
2 when the input is 48V. The load is 8Ohm. Design the converter
§ Δi 2 ·
2
I L, RMS = I L + ¨ L ¸ such that it will be in continuous current mode. The output
© 3 ¹ voltage ripple must not be more than 0.5%. Specify the
frequency and the values of each component. Suggest the power
13
switch also.

14

Boost (step-up) converter Boost analysis:switch closed

L D
iL
L D
+ vL −
Vd C + +
S
Vd C vo
RL Vo S
−
−
CIRCUIT OF BOOST CONVERTER
iL L D
+ vL −

Vd C
+ v L = Vd Vd
S RL Vo
di
− =L L v L
CLOSED
dt
t
CIRCUIT WHEN SWITCH IS CLOSED di V
L
Ÿ L= d Vd− Vo
D dt L
+ vL - diL ΔiL ΔiL
+ = = i L
ΔiL
Vd
S C RL
Vo dt Δt DT
di V
− Ÿ L = d
dt L DT T t
CIRCUIT WHEN SWITCH IS OPENED V DT
(ΔiL )closed = d
15 16
 Switch opened Steady-state operation
iL
D
+ vL - (ΔiL )closed + (ΔiL )opened = 0
+
Vd DT (Vd − Vo )(1 − D )T
Vd C vo
S
- + =0
L L
Vd
v L = Vd − Vo Ÿ Vo =
1− D
di
=L L Vd
dt • Boost converter produces output voltage that is
diL Vd − Vo vL greater or equal to the input voltage.
Ÿ = OPENED

dt L t • Alternative explanation:
diL ΔiL Vd− Vo – when switch is closed, diode is reversed. Thus
=
dt Δt output is isolated. The input supplies energy to
inductor.
Δi L ΔiL
= iL
– When switch is opened, the output stage
(1 − D )T
receives energy from the input as well as from
( 1-D )T
the inductor. Hence output is large.
t
diL Vd − Vo DT T
– Output voltage is maintained constant by
Ÿ = virtue of large C.
dt L
(Vd − Vo )(1 − DT )
Ÿ (ΔiL )opened =
L
17 18

Average, Maximum, Minimum L and C values

Inductor Current
For CCM,
Input power = Output power I min ≥ 0 Vd
vL
V 2 Vd V DT
Vd I d = o 2
− d ≥0
R (1 − D ) R 2L
2
§ Vd · D (1 − D )2 TR
¨ ¸ Lmin = V d −V o
(1 − D ) ¹ Vd 2
Vd I L = ©
2 Imax
=
(1 − D ) 2 R D(1 − D ) R
2
R iL
= Imin
Average inductor current : 2f
Vd
Ÿ IL = iD
(1 − D ) 2 R Ripple factor Imax

Maximum inductor current : §V · Imin

ΔQ = ¨ o ¸ DT = CΔVo
Δi Vd V DT ©R¹
Ÿ I max = I L + L = 2
+ d V DT Vo D
Io=Vo / R
2 (1 − D) R 2L ΔVo = o =
RCf RCf ic
Minimum inductor current :
ΔVo D
Δi Vd V DT r= =
Ÿ I min = I L − L = 2
− d Vo RCf
2 (1 − D ) R 2L ΔQ

DT T
19 20
 Examples
Buck-Boost converter
A boost converter has parameter Vs =20 V, D =0.6, R =12.5 Ω, L=10 μH, C =40
μF, and the switching frequency is 200 kHz. Determine (a) the output voltage (b)
the average, maximum, and minimum inductor currents. (c)the average current in
S
the diode .Assume ideal components. D
+

Vd C
L RL Vo
−

CIRCUIT OF BUCK-BOOST CONVERTER

S D
+ +

Vd iL vL Vo
− −

CIRCUIT WHEN SWITCH IS CLOSED

• The boost converter has the following parameters: Vd=20V,
D=0.6, R=12.5ohm, L=65uH, C=200uF, fs=40KHz. Determine S D
(a) output voltage, (b) average, maximum and minimum + +
inductor current, (c) output voltage ripple. Vd iL vL
Vo
−
• Design a boost converter to provide an output voltage of 36V −
from a 24V source. The load is 50W. The voltage ripple factor
must be less than 0.5%. Specify the duty cycle ratio, switching CIRCUIT WHEN SWITCH IS OPENED
frequency, inductor and capacitor size, and power device.

21 22

Buck-boost analysis Output voltage

Vd Steady state operation :
Switch closed vL
Δ iL (closed ) + Δ iL (opened ) = 0
di
v L = Vd = L L V DT Vo (1 − D)T
dt Ÿ d + =0
diL Vd L L
Vd−Vo
Ÿ = Output voltage :
dt L Imax

ΔiL ΔiL Vd iL § D ·
= = Imin Ÿ Vo = −Vs ¨ ¸
Δt DT L ©1 − D ¹
V DT
Ÿ (ΔiL ) closed = d Imax • NOTE: Output of a buck-boost converter either be
L iD
higher or lower than input.
Switch opened Imin
– If D>0.5, output is higher than input
di
v L = Vo = L L Io=Vo / R – If D<0.5, output is lower input
dt
di V
Ÿ L= o i c • Output voltage is always negative.
dt L
ΔiL Δi L V ΔQ
= = o • Note that output is never directly connected to load.
Δt (1 − D )T L DT T
V (1 − D)T • Energy is stored in inductor when switch is closed
Ÿ (ΔiL ) opened = o
L and transferred to load when switch is opened.

23 24
 Average inductor current
L and C values
Max and min inductor current,
Δi Vd D V DT
Assuming no power loss in the converter, Ÿ I max = I L + L = 2
+ d
power absorbed by the load must equal
2 R (1 − D ) 2L
Δi L Vd D V DT
power supplied the by source, i.e. Ÿ I min = I L − = 2
− d
Po = Ps 2 R (1 − D ) 2L
For CCM
Vo2
= Vd I s
R Vd D V DT
+ d =0 2
But average source current is related to R(1 − D ) 2L
average inductor current as :
(1 − D) 2 R
Is = ILD Ÿ Lmin =
2f
V2 Output voltage ripple,
Ÿ o = Vd I L D
R §V ·
Substituting for Vo , ΔQ = ¨ o ¸ DT = CΔVo
©R¹
Vo2 P Vd D V DT Vo D
Ÿ IL = = o = ΔVo = o =
Vd RD Vd D R(1 − D ) 2 RC RCf
ΔV D
r= o =
Vo RCf
25 26

Example
A buck-boost converter has parameters Vs=12 V, D=0.6, R=10 Ω, L =10 μH, C
=20 μF, and a switching frequency of 200 kHz. Determine (a) the output voltage
(b) the average, maximum, and minimum inductor currents, and (c) the average
value of input current.
Solution

S Buck − Boost
Vo D
D + =−
V C Vo
Vd 1− D
L RL
d
− ΔVo D
=
Vo RCf
(1 − D) 2 R
Lmin =
2f

Control of DC-DC converter:

Converters in CCM: Summary pulse width modulation (PWM)
Vo (desired)
Buck + Vcontrol Switch control
signal
Vo Vo (actual) Comparator
S L =D -
V + Vd Sawtooth
D C RL
Vo ΔV D Waveform Sawtooth
1−
d
Waveform
− Voo = 8 LCf 2
( − D)R
Lmin = Vcontrol 1
1 2f
Vcontrol 2

L Boost
D
Vo 1
= Switch
V + Vd 1 − D control
C Vo ton 2
S ΔV D signal
=
d
RL − Voo RCf
ton 1
D( − D)2 R
L = T
min 1 2f

27 28
 Isolated DC-DC Converter Linear and SMPS block diagram
Basic Block diagram of linear power supply
• Isolated DC-DC requires isolation transformer
C E
• Two types: Linear and Switched-mode Vce=Vd-Vo +Vo DC Regulated
DC Unregulated
B +
• Advantages of switched mode over linear power +
supply Vd
Base/gate
Drive
RL Vo
Line
-Efficient (70-95%) Input
- -
1φ / 3φ
-Weight and size reduction Rectifier/ Error Vo
50/60 Hz Filter Amp.
Isolation
Transformer
• Disadvantages Vref
-Complex design
-EMI problems
Basic Block diagram of SMPS
• However above certain ratings,
DC-DC CONVERSITION AND
SMPS is the only feasible choice DC ISOLATION
DC
Unregulated Regulated
High
• Types of SMPS RECTIFIER Frequency
EMI
AND
-Flyback FILTER
FILTER
rectifier Vo
and
-forward filter
-Push-pull Vref
-Bridge (half and full)
Base/
PWM error
gate
Controller Amp
drive

29 30

High frequency transformer Flyback Converter

Basic function :
1) Input - output electrical isolation
+
2) step up/down time - varying voltage C R Vo
Vd LM
−
Basic input - output relationship
v1 N1
= ;
v2 N 2 Flyback converter circuit
i1 N 2
=
i2 N1
iD
Models : iS i 1 N1 N2
+
+ − + vD −
i1 i2 iLM v2 iC iR Vo
N1 N2 v1
Vd
+ + − + −
+ vSW − i2
V1 V2 Ideal model
− −
Model with magnetising
i1 N1 N2 i2
inductance
+ +
Lm Model used for
V1 V2
−
most PE application
−

31 32
 Operation: switch closed Switch opened
iD
0 N1 N2 N1 N2
is=iLM
+ + +
+ − −
v2 iLM v1 v 2 = − VS Vo
iLM v1 Vo Vs
Vd + − + −
− −
+ vSW −
v1=Vs 0

§N ·
diLm v1 = −Vo ¨¨ 1 ¸¸
v1 = Vd = Lm © N2 ¹
dt
But v2 = −Vo
diLm ΔiLm ΔiLm Vd
= = = §N · §N ·
dt dt DT Lm Ÿ v1 = v2 ¨¨ 1 ¸¸ = −Vo ¨¨ 1 ¸¸
© 2¹
N © N2 ¹
Ÿ ΔiLm ( V DT
= d ) di §N ·
closed Lm v1 = Lm L m = −Vo ¨¨ 1 ¸¸
dt © N2 ¹
On the load side of the transformer,
diL m ΔiL m ΔiL m − Vo § N1 ·
§N · §N · = = = ¨ ¸
v2 = v1 ¨¨ 2 ¸¸ = Vd ¨¨ 2 ¸¸ dt dt (1 − D )T Lm ¨© N 2 ¸¹
© N1 ¹ © N1 ¹ V (1 − D )T § N1 ·
Ÿ (ΔiL m )open = − o ¨¨ ¸¸
§N · Lm © N2 ¹
v D = −Vo − Vd ¨¨ 2 ¸¸ < 0, i.e. diode turned off
© N1 ¹ Voltage across the switch :
Therefore, §N ·
vSW = Vd + Vo ¨¨ 1 ¸¸
i2 = 0 and i1 = 0 © N2 ¹
33 34

Flyback waveforms
Output voltage
Ps = P0 Vs
For steady - state operation, 2
( )closed ( )opened V v1
ΔiLm + ΔiLm =0 Vd I s = 0
R
V DT Vo (1 − D )T § N1 · I s is related to I Lm as : -V(N 1 /N 2 )

Ÿ d − ¨¨ ¸¸ = 0
Lm Lm © N2 ¹ Is = m
I L DT
T
( )
= I Lm D
i Lm
Δ iL

§ D ·§ N 2 ·
Ÿ Vo = Vd ¨ ¸¨¨ ¸¸ Solving for I Lm
© 1 − D ¹© N1 ¹
is
V2
( )
Vd I Lm D = 0
R
• Input output relationship is similar to buck-boost
t
converter. V0 2
Ÿ I Lm =
Vd DR iD
• Output can be greater of less than input,depending
upon D. I Lm can written as :
2 iC
Vd D § N2 ·
• Additional term, i.e. transformer ratio is present. I Lm = ¨
2 ¨N ¸
¸
(1 − D ) R © 1 ¹
− V o/ R
V0 § N 2 ·
DT T t
= ¨ ¸
(1 − D ) R ©¨ N1 ¸¹

35 36
 Max, Min inductor current Example
ΔiLm The Flyback converter has these specifications:
I Lm = I Lm + DC input voltage: 40V
,max 2 Output voltage: 25V
2
Vd D§ N 2 · V d DT Duty cycle: 0.5
= ¨¨ 2
¸¸ + Rated load: 62.5W
(1 − D ) R © N1 ¹ 2 Lm Max peak-peak inductor current ripple:
25% of the average inductor current.
ΔiLm
I Lm ,min = I Lm − Maximum peak-peak output voltage: 0.1V
2 Switching frequency: 75kHz
2
§ N 2 · Vd DT
Vd D Based on the abovementioned specifications, determine
= ¨
2 ¨N ¸
¸ − a) Transformer turns ratio
(1 − D ) R © 1 ¹ 2 Lm
b) Value of magnetizing inductor Lm.
For CCM, I Lm , min = 0 c) Maximum and minimum inductor current.
d) Value of capacitor C.
2
§ N2 ·
Vd D V DT Vd D
¨
2 ¨N ¸
¸ = d =
(1 − D ) R © 1 ¹ 2 Lm 2 Lm f
2
V (1 − D) 2 R § N1 ·
Ÿ ( Lm )min = d ¨¨ ¸¸
2f © N2 ¹
Ripple calculation is similar to boost,
ΔV0 D
r= =
V0 RCf
37 38

Full-bridge converter Full bridge: basic operation

• Switch “pair”: [S1 & S2];[S3 & S4].
SW1 SW3
Lx
+ + + • Each switch pair turn on at a time as shown. The
NS vx Vo other pair is off.
C R
− −
vp
VS

−
NS • “AC voltage” is developed across the primary.
Then transferred to secondary via high frequency
SW4 SW2 transformers.

SW1,SW2 • On secondary side, diode pair is “high frequency

full wave rectification”.
DT T
SW3,SW4
• The choke (L) and (C ) acts like the “buck
T T
converter” circuit.
+ DT
VP 2 2
VS
• Output Voltage

-VS
§N ·
Vo = 2Vs ¨ s ¸ ⋅ D
¨ ¸
Vx
§N ·
VS ¨¨ S ¸¸
© NP ¹
©Np ¹
DT T T T
+ DT
2 2

39 40
Snubber Circuits

Protection of switching devices and circuits: Switching devices and circuit components
may fail due to the following reasons.

1. Overheating – thermal failure

2. Overcurrent
3. Overvoltage – usually happens during turn-off
di
4. Excessive
dt
dv
5. Excessive
dt
6. Switching loss –excessive switching loss is a major contributing factor of
overheating.

Power electronic circuits and their switching devices and components can be
protected from overcurrent by placing fuses at suitable locations. Heat sinks, fins and
fans are used to take the excess heat away from switching devices and other components.
di dv
Snubber circuits are required to limit , and overvoltage during turn-on and turn-
dt dt
off. Some typical snubber circuits are described below.

RC Snubber Circuits
RC snubber circuits are normally connected across a switching device to limit the
dv
. An RC snubber circuit can be polarized or unpolarized. A forward-polarized RC
dt
snubber circuit shown in Figure 1 is appropriate when a thyristor or a transistor is
dv
connected with an anti-parallel diode. R limits the forward and R1 limits the
dt
discharge current of the capacitor when Q1 is turned on.

Figure 1. A forward polarized snubber circuit.

Page 1 of 8
 A reverse polarized snubber circuit as shown in Figure 2 is used to limit the
dv
reverse . R1 limits the discharge current of the capacitor.
dt

Figure 2. A reverse polarized snubber circuit.

An unpolarized snubber circuit as shown in Figure 3 should be used when a pair

of switching devices is connected in anti-parallel.

Figure 3. An unpolarized snubber circuit.

Diode Snubbers
Snubbers are needed in diode circuits to minimize overvoltages. Overvoltages
usually occur during turn-off process. Figure 4 shows a diode with a snubber circuit.

Page 2 of 8
 Figure 4. Diode, D with its snubber circuit

The voltage, v across the diode (D) during turn-off can be expressed as:
di
v = V − L . The voltage rises above V due to the fact that during turn-off of D the
dt
di
current through the stray inductance is decreasing and hence making the negative.
dt

BJT Snubbers

A Bipolar junction transistor (BJT) experiences high stresses at turn-on and turn-
off when both its voltage and current are high simultaneously, thus causing a high
instantaneous power dissipation. Transistors require turn-off, turn-on and overvoltage
snubbers.

Turn-off snubbers

A Turn-off snubber as shown in Figure 5 is used to provide a zero voltage across

the transistor while the current turns off. At turn-off in the presence of this snubber, the
di
transistor current iC decreases with a constant and ( I O − iC ) flows into the capacitor
dt
through the snubber diode DS. Figure 6 shows the voltage rise across the snubber
capacitor CS.

Page 3 of 8
 Figure 5. A turn-off snubber for a transistor.

Figure 6. Voltage across the snubber capacitor.

Turn-on snubber

A turn-on snubber as shown in Figure 7 is used to reduce voltage across the BJT
while the current builds up. The reduction in the voltage across the transistor during turn-
on is due to the voltage drop across the snubber inductance LS. When the transistor turns
off, the energy stored in the snubber inductance, 0.5 LS I O2 will be dissipated in the
snubber resistance RS.

Page 4 of 8
 Figure 7. A turn-on snubber.

Overvoltage snubber

The overvoltage at turn-off due to stray inductance can be minimized by means of

the overvoltage snubber circuit shown in Figure 8. At turn-off, assuming the BJT current
fall time to be small, the current through the stray inductance, Lσ is essentially IO and the
output current then free-wheels through the free-wheeling diode.

Figure 8. An overvoltage snubber.

When the load current free-wheels through Df, the equivalent circuit is (Figure 9):

Page 5 of 8
 + L

DOV ROV

COV

Figure 9. Equivalent overvoltage snubber during free-wheeling.

During the free-wheeling of Df, the energy stored in the stray inductance gets
transferred to the overvoltage capacitor through the diode DOV and the overvoltage ∆VCE
across the transistor can be obtained by
2
C OV ∆VCE , max Lσ I O2
= ...................................... (1)
2 2
Equation (1) shows that a large value of COV will minimize the overvoltage
2
∆V . Once the current through Lσ has decreased to zero, it can reverse its direction
CE , max

due to the resistor ROV, and the overvoltage on the capacitor decreases to V through the
resistor ROV.

Power MOSFETS

A small RC turn-off snubber as shown in Figure 10 can be used to prevent voltage

spikes and voltage oscillations across a MOSFET during device turn-off. The large peak
current handling capability of the MOSFET and the fact that its switching speed can be
easily controlled by controlling the gate current eliminates the need for a turn-on snubber
in most cases.

Figure 10. A turn-off snubber for a MOSFET.

Page 6 of 8
Thyristors
di dv
Thyristors need protection during turn-on and protection during turn-off.
dt dt
Figure 11 shows a thyristor circuit with its turn-on and turn-off snubbers. Typical values
for C are between 0.01 to 1 µF, for R between 10 to 1000 Ω and for L between 50 to 100
µH.

Figure 11. A thyristor circuit with turn-on and turn-off snubbers.

Gate-Turn-Off Thyristors
di dv
A gate-turn-off thyristor needs and protections. During turn-off, the
dt dt
anode current falls rapidly. The current ( I O − i A ) flows through the snubber capacitor CS
which is fairly large in GTO applications. Usually the peak current conduction capability
in a GTO is much larger than in a BJT.

Page 7 of 8
 +

IO Df

V
LS Turn-on
Snubber

RS DS
GTO
Turn-off
CS Snubber
-
iA

Figure 12. A GTO with its snubbers.

THE END

Page 8 of 8