EEE 212 Analog Electronics I
FET Questions
1. In the circuits shown in Fig. P5.55, transistors are characterized by │Vt│=1 V, k’(W/L) = 4 mA/V2,
and λ = 0.
(a) Find the labeled voltages V1 through V7.
(b) In each of the circuits, replace the current source with a resistor. Select the resistor value to
yield a current as close to that of the current source as possible.
2. For each of the circuits in Fig. P5.56, find the labeled node voltages. For all transistors, k’n(W/L)
= 0.5 mA/V2, Vt= 0.8 V, and λ = 0.
The MOSFET in the circuit given below has Vt = 1 V, k’n(W/L) = 1 mA/V2, and VA = 40 V.
(a) (10 points) Find the values of RS and RD, so that VDS is chosen as one-third of VDD power
supply, and the DC power dissipated on RS is limited to 1 mW. Find also the maximum possible
swing at the drain.
(b) (15 points) If terminal Z is grounded, terminal X is connected to a signal source having a
resistance of 1MΩ, find the voltage gain from signal source to Y, input and output resistances with
Y open-circuited.
(c) (10 points) If terminal Y is grounded, find the voltage gain from X to Z with Z open-circuited.
What is the output resistance of the source follower?
(d) (15 points) If terminal X is grounded, terminal Z is connected to a signal source having a
resistance of 100 Ω, find the voltage gain from signal source to Y, input and output resistances with
Y open-circuited. Ignore early effect for this step.
+12 V
RD
10 MW ꝏ
Y
ꝏ
X ꝏ
Z
Rs
0.5 mA
ꝏ
-12 V
a) Parameters of the MOS transistor in the circuit below are given as VTN=0.24V, k’n(W/L)=2.2
mA/V2, λ=0. Assuming that the transistor is operating in saturation region, design the circuit as
R1+R2=50 kΩ and VGS=0.5V and VDS=2.5V.
b) Find voltage gain, vO/vi, input and output resistances of the amplifier.