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The document outlines the end-of-semester examination details for the Digital Electronics course at the Uganda Institute of Information and Communications Technology for the academic year 2024/2025. It includes instructions for the exam format, sections, and types of questions, along with specific topics covered in the exam. The examination consists of objective questions, short answer questions, and detailed problems requiring logical circuit designs and simplifications.

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0% found this document useful (0 votes)
3 views7 pages

Content

The document outlines the end-of-semester examination details for the Digital Electronics course at the Uganda Institute of Information and Communications Technology for the academic year 2024/2025. It includes instructions for the exam format, sections, and types of questions, along with specific topics covered in the exam. The examination consists of objective questions, short answer questions, and detailed problems requiring logical circuit designs and simplifications.

Uploaded by

dickmaena
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

UGANDA INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY

END OF SEMESTER TWO EXAMINATIONS


ACADEMIC YEAR 2024/2025
DEPARTMENT: ICT

SEMESTER: TWO

PROGRAMME(S): DIPLOMA IN ELECTRICAL AND ELECTRONICS ENGINEERING


DIPLOMA IN ELECTRONICS AND COMMUNICATIONS ENGINEERING
YEAR OF STUDY: ONE

COURSE: DIGITAL ELECTRONICS

COURSE CODE : EEE 121


DATE: FRIDAY 27TH JUNE 2025

TIME: 9AM- 12PM

DURATION: 3 HOURS

INSTRUCTIONS:
(i) This paper contains two Sections: A (40 marks) & B (60 marks).
(ii) Attempt ALL questions in Section A, and ONLY THREE questions in Section B.
(iii) All questions in Section B carry equal marks.
(iv) Credit will be given for use of relevant examples and illustrations.
(v) Begin each number in Section B on a new page of the answer sheet.
(vi) DO NOT write on this question paper
SECTION A – (40 Marks)
Part I: Objective Questions (1 mark each – 20 marks)
Choose the most correct answer.
1. The binary equivalent of decimal 13 is:
A) 1100
B) 1101
C) 1011
D) 1001
2. Which code is used in digital clocks?
A) Gray code
B) BCD
C) ASCII
D) Excess-3
3. Which gate gives a HIGH output only when all inputs are LOW?
A) NOR
B) NAND
C) AND
D) XOR
4. What is the 2’s complement of binary 1010?
A) 0101
B) 0110
C) 1010
D) 0111
5. Which logic family consumes the least power?
A) TTL
B) ECL
C) DTL
D) CMOS
6. In Boolean algebra, A + A = ?
A) 0
B) A
C) 1
D) A̅
7. What does SOP stand for in logic expressions?
A) Sum of Products
B) System of Protocols
C) Simplified Output Power
D) Serial Output Processor
8. A full adder has how many inputs and outputs?
A) 2 inputs, 1 output
B) 3 inputs, 2 outputs
C) 3 inputs, 1 output
D) 2 inputs, 2 outputs
9. Which flip-flop toggles its output?
A) SR
B) JK
C) D
D) T
[Link] component is used to store a single bit of data?
A) Counter
B) Multiplexer
C) Flip-Flop
D) Decoder
11. A 4-bit counter can count up to:
A) 8
B) 16
C) 32
D) 64
12. What is fan-out in logic families?
A) Output voltage
B) Number of inputs a gate can drive
C) Noise level
D) Power rating
D) Select memory
[Link]-circuit counter chips are used in numerous applications including:
A. timing operations, counting operations, sequencing, and frequency multiplication
B. timing operations, counting operations, sequencing, and frequency division
C. timing operations, decoding operations, sequencing, and frequency multiplication
D. data generation, counting operations, sequencing, and frequency multiplication

[Link] counters eliminate the delay problems encountered with asynchronous


counters because the:
A. input clock pulses are applied only to the first and last stages
B. input clock pulses are applied only to the last stage
C. input clock pulses are not used to activate any of the counter stages
D. input clock pulses are applied simultaneously to each stage

15.A full adder requires how many logic gates for its complete logic circuit?
A. 3 logic gates
B. 4 logic gates
C. 5 logic gates
D. 6 logic gates4
16. Which of the following is a combinational circuit?
A) Flip-Flop
B) Counter
C) Multiplexer
D) Latch
17. De Morgan’s Theorem states:
A) (A + B)’ = A’ + B’
B) (A + B)’ = A’ · B’
C) (A · B)’ = A + B
D) None of the above
18. Which storage element is edge-triggered?
A) Latch
B) D Flip-Flop
C) Multiplexer
D) Decoder
[Link] number of output lines in a 3-to-8 decoder is:
A) 3
B) 8
C) 6
D) 5
20. What does BCD stand for?
A) Binary Coded Decimal
B) Binary Controlled Decoder
C) Bit Counted Data
D) Base Conversion Decoder

PART II: SHORT ANSWER QUESTIONS (20 MARKS)


1. Convert the decimal number 125 into:
a) Binary
b) Octal
c) Hexadecimal
2. State two advantages of digital over analog systems.
3. Define the following terms:
a) Fan-in
b) Noise margin
c) Logic level
4. Simplify the logic expression:
F = AB + A'B + AB'
5. Write the truth table for a 2-input XOR gate.
6. List any two storage elements used in sequential circuits and describe their function.
7. What is the role of Gray code in encoder circuits?
8. Compare synchronous and asynchronous counters.

SECTION B
Attempt any three questions- each is 20 marks
Question 1
a) Explain how the 1’s and 2’s complement methods are used for binary subtraction. (6 marks)
b) Convert (-27) into 8-bit 2’s complement form. (4 marks)
c) Differentiate between Gray code and BCD code with examples. (6 marks)
d) Convert 101101 to decimal and hexadecimal. (4 marks)
Question 2
a) Draw the logic diagram for F = (A + B)(A’ + C) using basic gates. (6 marks)
b) Use Boolean algebra to simplify: F = A + AB. (4 marks)
c) Use K-map to simplify F(A,B,C) = Σ(0,1,2,5,6). (6 marks)
d) Define SOP and POS with two examples each. (4 marks)
Question 3
a) List four characteristics of logic families. (4 marks)
b) Compare TTL and CMOS in terms of speed and power dissipation. (6 marks)
c) What is meant by fan-in and fan-out? Give examples. (4 marks)
d) With a diagram, show how two IC families are interfaced. (6 marks)
Question Four (20 marks)
Following a country-wide voting that took place in a certain country, digital students
were tasked to design a digital system that would transfer poling results from twenty-one
polling stations to the central office using a single line. It was agreed to design the system
around the multiplexer with binary counter selector switches.
a) How many flip flops and types are needed? (5 marks)
b) Draw the truth table of the counter selectors. (5 marks)
c) With the help of truth table, draw the logic circuit diagram of the MUX
selector switches connecting to the counter. (10 marks)

Question Five (20 marks)


a) Given that function F (A, B, C) = Σ (0, 1, 2, 5, 6). Determine its logic circuit. (5 marks)
b) Given the Boolean equation:

(i) Draw the k-map of the equation. (5 marks)


(ii) Using the k-map, simplify the equation. (5 marks)
(iii) Draw the logic diagram of the simplified equation. (5 marks)

END

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