MODULEl :

Steady state review :

Block diagram of a switching converter .
Input command

~
1
floor

input power
switching output power
converter

M
- elevator response

control input

P = IV feedforward > controller < feedback

Introduction to power processing 1

electrical components reference

power Electronics composed of
-
electrical power (F & U) electrical devices

feedback -

where the output of a system is

·

switching converter process * O error measured and used to adjust the

power electronic system

input , so that the system can

switching correct any errors or disturbances .

Power converteras
powera
in put can be 1
-feedforward -

where the input of a system

I Or v
is modified based on the
control
in put
expected output or disturbance

power electronic systems could perform :

so that the system can anticipate
different level of voltage
·

PC +O D) Converter =- and prevent any errors.

switch mode converter/power sys .
-

magnitude could be lower or higher than the I in other

semiconductors used as
voltages
a
,

switch
it is desired that the switching
N
input voltage (different magnitudes converter has a high power efficiency and good
capacitor inductor transformers ,
, ,

ACTO DC converter cactode rectifier) exidiode output voltage regulation . and semiconductive devices
↓
·
DC TO AC converter (actoac inversion) - inverter
·

Reasons for the desired high power efficiency are :

controllable magnitude and frequency ac save

energy
- -

output voltage
-

minimize the cost

AC To Ac converter downupvolaersion -minimize the power dissipated by the system

switching converter + main circ of the power system so that a minimum amount of heat is generated
contains components used to convert the do or
by the system .
-

ac input into another do or ac output/s . "n The heat generated by the system must be

the controller contains the characteristics of the removed from it, and this could require

output which could include the magnitude of the large and expensive cooling system if the

output voltage ,
maximum allowed output current power efficiency is low , and the system is

or frequency of an ac output voltage .

generating a lot of heat because of large

where you place info
N input
-

the controller uses a reference value , the feedback amount of power dissipated by the system .

signal and possibly removed

P
,
a feed forward signal to If the heat is not from the systems,

adjust the characteristics of the output to the the components could become defective ,
and

desired values or range of values . the performance and reliability of the

system could be compromised .

 *
The higher the power efficiency ,
the ·

The characteristic curve for the output side

higher is the allowable density of come Of a BJT common emitter transistor config .

ponents , and the smaller is the size

Y
Active region Y

PC VCEIC

·
and weight of the system .
=

power dissipated
by transistor
The reasons for the desired good output
.
·

* dissipated power
voltage regulation are to protect the load ,
will be small .

the system , and the source of the in put

power .

to achieve high power efficiency for swir

-

tching converters capacitive and induce legends :

-

, ,

five elements (capacitors inductors , ,

and VCE-collector current Voltage (output)
-

transformers) and semiconductor devices Ec-collector current (output)

which operate as a switch , are commonly Ib-base current (inputs

used ICEO -
collector leakage for common

Ideal capacitors inductors and trans emitter configuration

-

,
,

formers do not dissipate power ,

and real

capacitors , inductors and transformers

(i) ACTIVE (ii) CUT-OFF (iii) SATURATION

dissipate a relatively low amount of power

-semiconductor devices operated in their on . : C

IC = BID O

0
Off state (as a switch) dissipate a very small amount of I :

=
IE
.
/B 0open be E
FB =

power compared to when they are operated in their B .

B .

* VCE = 0
active regions . IE =
g

I :
-

As an example , Bris practically have no current E short cap prox .

between [ & E

at cutoff , and practically has O

voltage between *
NPN

and thus There is IC

collector , and emitter at saturation ,
* & UCE

dissipate significantly less amount of power

NAN PNP
When operated as a switch in these regions .
In BJT ,
* cutoff-O collector current
· *
↑
saturated-shortcurrent , o
( collector -

emitters
-

VCE = 0

As another example , the voltage between

>
- ON : VES = O

drain To turn channel JFEt can be made

the & source of FETs is
approximately On an n Vas
-
,

o volt when the FET is On , and the drain equal to 0 .

Drain current will flow if JFET is On ,

current Of FETs is Off ,

thUS the FET power and voltage between the drain and source is

dissipation is
very small when it is used small : resulting to small power dissipation .
as a switch .
 DI
-

To turn off an n channel JFET ,

veS is made A
pinch off voltage 7

i
↓

equal to or more negative than Up or Vesoff. Input

supply
AC

output DC signal
i
Ideally , drain current is 0 When the JFET is off ,
...

resulting to very low power dissipation . However ,

a small leakage current (Incoff)) is present conventional power supply

Gregulator
active region ; not as a switch
* half wave DI
when the JFET is off
Q
between the gate and drain .

D vo
=
output voltage
So it FE vo
7
Vo = FER *
goes up ,
Ac in put goes up so it becomes
Ideally 0 or small value R
*
v2 VBE + Vo regulated

·
Voltage [I
=

p vps
(sine wave -

= =
voltage across zener
* operates in diode
reversed bias
=
power dissipated by FET KVL :
VotVBE-VD2 = 0

↓ T
VD2 =
Vo + VBE
+
VPP soit vo down ,

Ip
↑ VBEgoes goes up to
RD IDRD
reversea bigseestant
balance
V
if its
current flowing
on

D
G -open if its off
~
. no I .
constant value

"Output butthereis
-
1 ~ inter a

VES Ups = VDD-IPRD

Input (vi)

when the base-emitter junction of a BJT becomes

-

V Vv

value increases
-

Gate to source : more forward biased , base , collector ,

and emitter
V Q , is on
Q2 is off current increases .
o +
the base emitter junction of BJT becomes
W
When a
-

< Vpor Ves(off)

(pinch Off Voltage)
Input (VEs(
Cnegative voltage less forward biased , base , collector and emitter

voltage across drain & source current decreases .

isoff UPD-IP(Off)R
Alison Q2
~ VCE : /V
,

:Oemite
V
IB (4A)
VDp IpCon) RDS
-
=
Cons
O
internal
Output (Vps) v
> reverse biased inition is
KVL :
Upp-IDRD-Ups = O forward bids
VDS =
VDD-IDRD

VBE(V)
7
# resist or dissipates power 0 2
.
0 .
4 0 . 60 .

* If VBE increases
Resistive components are minimized because they
,
·

1B will also increases

dissipate power .

transformers , regulator rectifier ,

) they use transistor , transistor maintains out put v

·

For conventional power supplies such as those using common Emittor transistor configuration
Ordinary rectifiers with Bipolar Junction Transistor input characteristic curve

(BJTs) used for voltage regulation . The BJts are not

↑ 44
used as a switch but it operates in the active Ic :
BIB

region which to higher power dissipation IE IC

FB
, results = + IE = I

Ac Input waveform :
in micro A
by the device
+ Vmax = 12 V

I Diode OV
- r ·
Vmax = 12V

inst
-
-

vout

Resultant output waveform

T * full wave easier to be a rectifier

ripple voltage
00 + VmaX

VDC
Ov equivalent
Ideal pulse wave-form characteristics Buck switching converter

A buck
switching converter is used to convert a d
-

* OFF - ON (0 - 1) * &C to &C

OFF >
-
ON input voltage (ug) to another ac Output voltage (VO)
ON -OFF
trailing edge
Leading edge (failing edge lagging edge/
is switched
,

Crising edge/positive
-

negative going edges -

-

The semiconductor switch on and off

going edges 1

on
Y Pulse Amplitude
off " W
to provide a pulse output at its right side .

f - Hz - cycle/sec
period (T) Unitsi
-

the peak of the output voltage of the switch (Vp)

T - Sec
same
Pulse

eases
width

is ideally equal to its ac input voltage (Vg)

formulas : 110(1 are used to filter the output of the semi-
-

·
Pulse Repetition Frequency (PRF) conductor switch to produce a de voltage with

Or Pulse Repetition Rate (PRR) some ripple (smallac) at the output .

PRF =
period" -

simplified Diagram of a Buck switching

·

Duty Cycle converter system

:
useWidth
up = Vg
D .
W . vg(dC) Pulse output Vo
3

O volt
V amplitude is equal
O vOIt

semiconductor
output Voo
D
*
=

based
1 -
D
on the SW if its OFF
v >

switch
* transistor
~
CFilter sind
and small A

ripple voltage
(regulated

space ratio
N +
Mark to
·

t
x

One
usewidI
=
MSR
V9 o Reloads
~
D1
--

Pulse input to switch

there is a controller + uses pulses to on and off

DC or Average voltage
·

the semiconductor switch

Cows-20)Csw s
Width
po Vg-
=
nise
vg(dC) Pulse output vo =
(vg)(p)(dc)
source of Q1
O volt O Volt

3 vo = output voltage
D ①I Sv
Amplitude) (Duty Cregulated
> W
:
(Pulse cycle
L1
t
Example 1 :
t G
T
I (
* R
V9 Driver VV
,
~
Di
--

10-1 9
sensors
=

,
- t (MS)
81 10 II will get
smal
> HV
Determine D , PRF , D' , MSR , and DC voltage if VC
Va
Pulse width Ec(s) -
modulator
Vp
=
4V Pulse input to compensator vref
* The pulse will create an
gate of Q output from error signal
=
work
Vp =
4V D = 0 1 or 10 %
.

* semiconductor device (Q1) used as as witch the errora to get the

difference
* Q1 is switched on and off to provide a pulse output
sW = a ms of the sensed
at its source
voltage To ance
PW = 1 MS PRE
== 100HZ * The peak of the output voltage of Q1 is ideally equal
Voltage
to its ac in put Voltage (Ug)

T =
10 mS

msr = =. 0 -

The pulse output of Q1 is filtered by 21 and C1 to provide

a DC output voltage across loadR , which is ideally equal to

DC =
(Vp)(p) =
(4V)(0 . 1) the de voltage of the pulse output of Q1 .

=
0 4V.
-

A sample of the output voltage across R is taken

and compared with a reference voltage (Vref) , and

the difference between two produces an error

signal . The error

signal is used by the compensator

to generate a signal fed to the input of the pulse

width modulator (PWM) , so that the duty cycle of the

PWM output can be controlled .

The output of the pulse width modulator are pulses

whose width varies depending on the error signal .

↑ D= +
N Vpc+ =
vgDt
The wider is the pulse the longer will be the
-

time that Q1 will be on ,

and the higher will be

the dc output voltage of the The shorter

system .

is the pulse , the lower will be the output voltage .

The output voltage across R is controlled by

-

varying the time that Q , is on .

·
When Q1 is on , the voltage at its source (up) is

practically equal to the voltage at drain (vg) .

-
The efficiency of the system could be relatively high .

lowers the DC voltage

the buck converter reduces the DC input voltage to

-

a lower value

Example 2 : A buck converter has an input of or and

an output of 1 5 V
. .
Determine the duty Cycle .

Inputu =
vg =
up =
GV

Output V =
Vp =
Vpc =
1 5V
.

Vpc =
(Vp) (D)

==
D =
0 25.

vO(t) Vripple (H
vp = Vg
vg(dc) >
Pulsea Voda -
O volt

>
V voCt output
semiconductor
~ :

~ ug , voltage (regulated)
switch
L1
M
t t
Vo(t) =
vo(dc) (for a good
C R
filters
vo (dc1 =
component of
de
output voltage Pulse
input to ~ ~

switch