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Chapter 4

Chapter Four of the document covers Output Stages and Power Amplifiers, detailing classifications such as Class A, B, AB, and C output stages. It explains the operation of power amplifiers, their efficiency, and the use of tuned amplifiers for specific frequency bands. Additionally, it discusses push-pull circuits and their application in Class B amplifiers, highlighting the conduction characteristics and circuit configurations.

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0% found this document useful (0 votes)
6 views17 pages

Chapter 4

Chapter Four of the document covers Output Stages and Power Amplifiers, detailing classifications such as Class A, B, AB, and C output stages. It explains the operation of power amplifiers, their efficiency, and the use of tuned amplifiers for specific frequency bands. Additionally, it discusses push-pull circuits and their application in Class B amplifiers, highlighting the conduction characteristics and circuit configurations.

Uploaded by

user7mayor
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Electronic Devices and Circuits Chapter Four

[Subject Code: EX 501]


Output Stages and Power Amplifiers
Information and 9 hours, 14 marks
Communication Engineering, Electrical Engineering Course Outline:-
and Computer Engineering 4.1. Classification of Output Stages
(IInd Year Ist Part) 4.2. Class A Output Stage
Chapter Four 4.3. Class B Output Stage
4.4. Class AB Output Stage
Output Stages and Power Amplifiers 4.5. Biasing the Class AB Stage
Session 1 4.6. Power BJTs
by: 4.7. Transformer-Coupled Push-Pull Stages
Bikal Adhikari 4.8. Tuned Amplifiers
(B.E., [Link]. Engg.)

Date:- 7th July, 2021


2

POWER AMPLIFIERS OUTPUT STAGES


Power amplifiers are those amplifiers which dissipate The portion of the amplifier circuit whose main purpose
high power in the output circuit. is to deliver a certain amount of signal power into a load
In this context high power means power greater than 1W. with acceptably low levels of signal distortion is known
as output stage.
The output stage should have as low resistance as
possible so as to effectively transfer the entire output
signal to the load without any drop in its output circuit.
That is output stage should deliver required amount of
power to the load in an efficient manner.

3 4
CLASSIFICATION OF OUTPUT STAGES CLASSIFICATION OF OUTPUT STAGES
Output Stages are classified on the basis of output
current waveform that results in the transistor when
input signal is applied.
Output stages are classified based on the waveform of
collector current that results when an input signal is
applied. Following are the different output stages used
in power amplifiers:- Class A output waveform Class B output waveform

Class A output stage


Class B output stage
Class AB output stage
Class C output stage
Class D output stage etc

5 Class A B output waveform 6 Class C output waveform

CLASS A OUTPUT STAGE SERIES FED CLASS A POWER AMPLIFIER


The conduction angle is 360 . VCC
Output current flows for full
cycle of input signal.
IC
The bias current for Class A is
RC
IC. The peak current is much RB Cout
less than the bias current. Cin vo
The amplifiers utilizing class IB
A output stage are known as vi
class A amplifiers.

Class A output waveform Figure shows the circuit diagram of series fed class A
amplifier. The name derives from the fact
that the resistor RC forms a series load of this amplifier.
7 8
DC operating condition: Thus, dc load line can be constructed by joining
Applying KVL in the input loop: (0, VCC/RC) and (VCC, 0) on the iC vs vCE characteristics
VCC - IB RB -VBE = 0 of the transistor.
VCC - VBE iC
IB = RB VCC
RC
IC B
ICQ IBQ
Applying KVL in the output loop, we get,
VCC -IC RC -VCE = 0
VCE = VCC IC RC vCE
VCC VCEQ VCC
When VCE =0, IC = R
C
Figure: DC load line and output characteristics curve
When IC =0, VCE =VCC
9 10

Output Input Voltage


vi(t) Input Power:
Current
iC
ic(t) The dc input power to the amplifier is given by:
VCC
RC Pin DC = ICQ VCC
ICQ
VCC
From the figure ICQ = 2R
C

vCE VCC
IP VCEQ VCC Pin DC = 2R VCC
C
VP
VCC2
Output Voltage
Pin DC = 2R (i)
C
vce Min
vo(t)

vce P-P vce Max


11 12
From figure we may write,
vce P-P = vce Max vce Min
Output Power:
VCC = vce Max + vce Min
The ac output power from the amplifier is given as:
Substituting these values in equation (iii), we will get general efficiency:
vce P-P ic P-P 1 (vce Max - vce Min)2
PO AC = VCE RMS IC RMS =
2 2 2 2 4 (vce Max + vce Min)2
vce P-P2 vce P-P (vce Max - vce Min)2
PO AC = ( ic P-P = )
8RC RC (vce Max + vce Min)2
General Efficiency: Maximum Efficiency:
The efficiency is given by the ratio of output ac power to input dc power. By looking at the figure, we can say that the maximum peak- peak value
of output voltage, vce P-P Max is VCC
P O AC
Pin DC Using equation (iii), the maximum efficiency, max, is given by:
VCC2 1
max =
4VCC 4 = 0.25 = 25%
=
vce P-P2 2
8RC
VCC2 max = 25%

2RC Hence the maximum efficiency of class A amplifier is only 25%. This
vce P-P2 relatively low efficiency makes class A amplifier unattractive in designing
4VCC2 audio and power amplifiers.
13 14

TRANSFORMER COUPLED CLASS A POWER


AMPLIFIER
In this amplifier a transformer is used to couple the output to the load
VCC resistor RL. The output resistance as seen by the transistor at collector is
RL . Let N1(N2), I1(I2),V1(V2) be the number of turns, current and voltage at
N1:N2 primary(secondary) coil of the transformer.
vo V1 N1
Then, we know, =
V2 N2
RB V1 V2 RL Similarly,
I1 N 2
=
I2 N 1
Combining above relations, we get,
Cin
V1 V2 N12
=
vi I1 I 2 N2 2
RL 2 RL
N1
Where, N2 is called turn ratio of transformer

15 16
Input Voltage Input Power:
Output
The input power to the amplifier is given by:
Current vi(t)
iC Pin DC = ICQ VCC
ic(t) 2VCC VCC
RL' From the figure ICQ =
R L'
ICQ VCC
Pin DC = R ' VCC
L
AC load line
VCC2
Pin DC = R ' (i)
L

IP vCE
VCEQ 2VCC
Output Power:

DC load line The output ac power from the amplifier is given as:
VP
Output Voltage VCE RMS 2
PO AC = RL
vce Min vo(t)
vce P-P2
PO AC = 8R
L
vce Max
vce P-P 17 18

General Efficiency: From the figure we can clearly see,


Efficiency is given by the ratio of output ac power to input dc power. vce P-P = vce Max vce Min
PO AC 2VCC = vce Max + vce Min
Pin DC Substituting these values in equation (iii), we will get general efficiency:
1 (vce Max - vce Min)2
vce P-P2 8 4 (vce Max + vce Min)2
8 RL
= V 2 (vce Max - vce Min)2
5 (v
ce Max + vce Min)
CC 2
R L'
Maximum Efficiency:
vce P-P2 By looking at the figure, we can say that the maximum peak- peak value
= 8V 2 ii) of output voltage, vce P-P Max is 2VCC
CC
From the figure we can clearly see, Using equation (iii), the maximum efficiency, max, is given by:
vce P-P = vce Max vce Min 4VCC2 1
max =
2VCC = vce Max + vce Min 8VCC2 = 2 = 0.5 = 50%
Substituting these values in equation (iii), we will get general efficiency: max = 50%
1 (vce Max - vce Min)2
8 4 (vce Max + vce Min)2
(vce Max - vce Min)2
5 (v
ce Max + vce Min)
2
19 20
CLASS A TUNED AMPLIFIERS
Tuned amplifiers are those amplifiers which amplify The output current iO can be written as:
specific band of frequency or narrow band of frequency. iO =Y vO
Tuned amplifier makes use of tuned circuit.
Where, Y is the admittance of parallel RLC circuit.
Because of the resonance phenomenon in tuned circuit,
1 1
tuned amplifier is capable of selecting a particular band Y = R + j(wC - wL)
of frequency for amplification.
The circuit diagram of class A tuned amplifier utilizing 1 1
iO = {R + j(wC - wL)} vO
n-channel E-MOSFET is given below:
D iO = (G+ j B)vO .(i)
vO
1
G Where, G = R

L C and
R
vI S 1
B =(wC - wL) iii)

21 22

At resonant frequency wO, B = 0. As a result Y is least and vO is largest. From equation (v) and (iii) at wC
Thus at resonance frequency, we have, 1
B= 0 (wC C - w L) =
C

1 At lower cutoff frequency wC1,


or, wOC - w L = 0
O
1
1 (wC1 C - w L) =
wO = .. v) C1
LC
At upper cutoff frequency wC2,
Similarly, at cutoff frequency of wC (3-dB points)
1 1
|B|=|G| (wC2 C - w L) = R
C2
or, B2 = G2
Solving equations (vi) and (vii), we get,
or, B = ± G
-1 1 2 1
wC1 = 2RC + (
2RC
) + LC

1 1 2 1
wC2 = 2RC + (
2RC
) + LC
23 24
Therefore bandwidth is given by:
BW = wC2 wC1
1
BW = RC

The quality factor (Q) is given by:


wO
Q = BW

Q = wO RC
Lastly, the frequency response curve (Gain Vs w) of the circuit is given
below:
Gain (dB)
Thank You !!!
3dB
B

0 w
wC1 25
wO wC2 26

Electronic Devices and Circuits Chapter Four


[Subject Code: EX 501]
Output Stages and Power Amplifiers
Information and 9 hours, 14 marks
Communication Engineering, Electrical Engineering Course Outline:-
and Computer Engineering 4.1. Classification of Output Stages
(IInd Year Ist Part) 4.2. Class A Output Stage
Chapter Four 4.3. Class B Output Stage
4.4. Class AB Output Stage
Output Stages and Power Amplifiers 4.5. Biasing the Class AB Stage
Session 2 4.6. Power BJTs
by: 4.7. Transformer-Coupled Push-Pull Stages
Bikal Adhikari 4.8. Tuned Amplifiers
(B.E., [Link]. Engg.)

Date:- 9th July, 2021


2
PUSH PULL CIRCUITS CLASS B OUTPUT STAGE
Two signals of opposite polarity are known as push pull signals. Push pull Class B output stages are those output stage in which for each transistor the
signals are widely used in the input of class B amplifiers. collector current flows for the half cycle of the applied input signal.
The circuits which produce push pull signals are also known as phase splitters. The amplifiers utilizing class B at the output stage are known as class B
Different methods of generating push pull signals are as follows: amplifiers.
Using Transformer: Thus, the conduction angle for class B output stage is 180 degrees.
iC IP
Push Pull
signals

wt
Using Transistor: Fig: Collector current waveform of a transistor operating in Class B
VCC
Push Pull Class B output stage generally use two transistors to conduct for positive and
R1 RC signals
C2 negative half cycles of the applied input signal.
C1
The currents from both the transistors are then combined to form the load
current.
C3
The class B amplifiers are generally used in RF amplifiers in which the output
of the amplifier circuit is fed to the transmitting antenna.
R2 RE

3 4

BASIC CIRCUIT FOR CLASS B O/P STAGE


Figure shows the basic circuit diagram for class B output stage. It consists of When vi is zero:
two complementary types of transistor (i.e. pnp and npn transistors) connected In this case both transistors QN and QP will be off.
in push pull fashion. When vi is positive:
It is called so because transistor QN pushes (or sources) current to the load and In this case transistor QN will be on and transistor QP will be off. If vi is
transistor QP pulls (or sinks current) from the load. This circuit is so designed beyond 0.5 V and transistor QN is fully on. Then the output voltage is:
that only one transistor can be at a time. vO VCC VCENsat
VCC
VCC
+ The corresponding input voltage is:
QN VCENsat
QN + - vI vO VBEN
vI VBEN vO
vI vO - vI VCC VCENsat VBEN
RL
RL QP
QP
-VCC
-VCC
Fig: Basic circuit for Class B output stage
5 6
TRANSFER CHARACTERISTICS OF
When vi is negative: CLASS B OUTPUT STAGE
In this case transistor QN will be off and transistor QP will be on. If vi is
beyond -0.5 V and transistor QP is fully on. Then the output voltage is: vO

VCC - VCENsat
Slope = 1
VCC vO VCC VECPsat
-VCC + VECPsat -VEBP - 0.5V
vI
The corresponding input voltage is: + 0.5V VCC - VCENsat +VBEN
QN
Slope = 1
vI vO VEBP - VCC + VECPsat
vI vO
+ vI VCC VECPsat VEBP Dead Band
VEBP +
- RL
QP VECPsat
- Figure shows the transfer characteristics of class B output stage. From the
figure we can see that within 0.5V on the either side, none of the two
-VCC transistors is on. This region is known as dead band. This region will give
rise to the cross over distortion as discussed next.

7 8

CROSS OVER DISTORTION IN CLASS B O/P STAGE


Cross over distortion occurs in class B amplifiers as a result of one transistor VCC
cutting off before the other transistor starts conducting. The region shown by
dotted circles denotes cross over distortion in output waveform.
vO QN

t vO
vI RL
QP
Cross over distortion can be eliminated by removing dead band in the transfer
characteristics.
Dead band can be removed by applying a slight forward bias to base emitter -VCC
junction of both transistors forming the output stage.
This is exactly what will be done in class AB amplifiers, which is to be Fig: Using op-amp to reduce cross over distortion in class B output stage.
discussed next.
The use of op-amp reduces the dead band from 0.5 V to vO/A
But before leaving this topic, there is another way to reduce cross over
distortion in class B amplifiers.
It is by using high gain op- amp in the negative feedback configuration as
shown in the circuit in the next slide. 9 10
TRANSFORMER COUPLED
CLASS B PUSH PULL AMPLIFIER iC
I1
VCC
DC Load Line
Q1 RL
VCC IL
AC Load Line
R1 R2 Input
vi N1
VCC
N2 Q Voltage signal
N1

Q2
I2 0
VCC IC = 0 vCE
Phase splitting Output
Push Pull circuit Push Pull output Load
network connection Transformer Current signal Output
Voltage signal
Figure shows the circuit diagram of transformer coupled class B push pull
amplifier. The name push pull derives from the fact that the input transformer VP
supplies push pull signals to the bases of two npn transistors Q1 and Q2. In this
context transformer is also known as phase splitter. Since the push pull signals are
180 out of phase, two transistors cannot be at the same time. Also the
transistors are biased such that in the absence of input signal both transistor Figure: Input output waveforms of a transistor operating in class B
remains in cut off mode and conduct no 11
current. 12

Thus under no signal condition transistor dissipate negligible power. In this way,
I1 Figure shows the current waveforms in class B
efficiency is increased. Let VP and IP be the peak voltage and peak current flowing
transformer coupled amplifier. The direction of
through the load.
0 I1 and I2 are different but the direction of load
When the input vi is positive: I2 current IL is same. Thus load current IL is a full
In this case, transistor Q1 2 1 flows 0 wave rectified sine wave as shown in the figure.
through the circuit in the direction indicated. Load current IL flows through the
Since the current waveform at load is in the
load. IL form of full wave rectified sine wave, the rms
When the input vi is negative: IP value, IRMS, and average value or dc value, Iav,
In this case, transistor Q2 1 2 flows
of the load current IL are given as:
through the circuit in the direction indicated. Load current IL flows through the 0
load. t IP 2I P
I RMS and I av
In both case the direction of the load current is same. 2
Output AC power(Pout AC):
VP IP VP VP
Pout AC VRMS I RMS
2 2 2 2 RL
VP2
Pout AC (i)
2 RL
13 14
Input DC power(Pin DC): Maximum Efficiency( max):

PinDC I av VCC max at VP VCC


2I PVCC
PinDC (ii) VP
or, max
4 VCC at VP VCC
Efficiency( ):
VP2 max 0.785 78.5%
4
Pout AC 2 RL
Condition for Maximum Loss/Maximum Power Dissipation:
PinDC 2I PVCC
The expression for the power dissipation (PD) is given by:

VP2 2VPVCC VP2


or, PD Pin DC Pout AC
VP RL 2 RL
4R VCC
L
RL For maximum power loss/maximum power dissipation,
dPD
VP 0
(iii) dVP
4 VCC
d 2VPVCC VP2
or, 0
15 dVP RL 2 RL 16

COMPLEMENTARY SYMMETRY
PD
CLASS B PUSH PULL AMPLIFIER
min = 50 %
PDmax

QN VCC1 The main disadvantage of transformer


PDmin max = 78.5 %
Cin coupled class B push pull amplifier is the
RL
vi costly and bulky transformer.
Complementary class B push pull
Fig: Power Dissipation vs amplifier eliminates the need of
QP VCC2
0 Peak voltage transformer.
VP
2VCC VCC

2VCC When the input vi is positive:


2VCC 2VP min at VP
or, 0 In this case transistor QN is on and transistor QP is off. Output current flows
RL 2 RL through the load resistor.
VP
2V 2VP or, min When the input vi is negative:
or, CC 4 VCC at VP
2VCC
In this case transistor QP is on and transistor QN is off. Output current flows
RL 2 RL
through the load resistor.
2VCC 2VCC
VP In both cases, the direction of load current is same.
min 0.5 50%
4 VCC 17 18
BASIC CIRCUIT OF CLASS AB OUTPUT STAGE BIASING IN CLASS AB OUTPUT STAGE
VCC The voltage VBB required for class AB output stage as discussed can be done in
two ways. They are as follows:
i. Biasing using Diodes:
QN
IBIAS VCC
VBB
iN
2
QN
vI vO D1 +
VBB iP iL VBB vO
D2
2 RL -
vI QP RL
QP

-VCC

-VCC In this scheme, the bias voltage VBB is generated by passing current IBIAS
through two diodes D1 and D2 as shown in the figure. Thus, VBB in this case
will be equal to two diode drops.

19 20

COMPLEMENTARY SYMMETRY
ii. Using VBE Multiplier: Neglecting the base current of CLASS AB AMPLIFIER
transistor Q1, we can write,
Figure shows the circuit diagram of
VCC VBE1
IR complementary symmetry class AB
IBIAS VCC
R1 amplifier. The name complementary
QN
VBB I R ( R1 R2 ) comes from the fact that the circuit uses
R1 two transistors of complementary types:
R2 IR
VBE1 NPN NPN and PNP. Two diodes D1 and D2
+ IC1 or, VBB ( R1 R2 )
R1 Cin D1 Cout along with resistors R1 and R2 are used
Q1 vI vO to bias the transistors. The diodes D1
VBB + vO R2
VBB VBE1 1 and D2 are also called biasing diodes.
- VBE1 D2
R1 - RL
R1 PNP RL These diodes in effect provide slight
forward bias to the bases of NPN and
Since, the voltage VBB so R2
PNP transistors. The result is that cross
vI QP produced is obtained by
over distortion is eliminated.
multiplying base emitter voltage
drop of transistor Q1 with the VCC 2VD
-VCC factor (1+R2/R1), this circuit has The bias current for the circuit is: I BIAS
R1 R2
got the name VBE multiplier.
Note: IBIAS supplies current IR Where, VD = diode voltage drop in forward bias condition = 0.7 V for Si
21 and IC1 based diodes. 22
Electronic Devices and Circuits
[Subject Code: EX 501]
Information and
Communication Engineering, Electrical Engineering
and Computer Engineering
(IInd Year Ist Part)

Thank You!!! Chapter Four


Output Stages and Power Amplifiers
Session 3
by:
Bikal Adhikari
(B.E., [Link]. Engg.)

Date:- 14th July, 2021


23

POWER BJTS
Chapter Four Power BJTs are the transistors which are designed to handle relatively large
Output Stages and Power Amplifiers currents in the range of amperes and to withstand power dissipation in the
watts and tens of watts ranges. Their physical structure, packaging and
9 hours, 14 marks specification are different from that of small signal transistors.
Course Outline:- Junction Temperature: Power transistors dissipate large amount of
4.1. Classification of Output Stages power in their collector base junction. The dissipated power raises the
4.2. Class A Output Stage temperature of junction. The temperature at the junction is denoted as Tj. The
junction temperature should not exceed the maximum limit Tjmax, otherwise the
4.3. Class B Output Stage
junction may be permanently damaged. For silicon based transistors maximum
4.4. Class AB Output Stage junction temperature is in the range of 150 C to 200 C.
4.5. Biasing the Class AB Stage Thermal Resistance: Let us consider a BJT operating in free air
4.6. Power BJTs condition. The heat dissipated by the junction is conducted away to the
4.7. Transformer-Coupled Push-Pull Stages transistor case and from the case into the surrounding at ambient condition. Let
4.8. Tuned Amplifiers us assume BJT is dissipating power PD watts when its junction temperature is
Tj. Let TA denote ambient temperature. Then, the temperature rise of the
junction relative to the ambient temperature is expressed as:
TJ TA JA PD

2 3
Where, JA is the thermal resistance between the junction and ambience. Power Derating Curve:
It has a unit of degree Celsius per watt. Thermal resistance gives the increase in The graphical relationship between the maximum allowable power dissipation
the temperature of the junction for each watt of power dissipated. and the ambient temperature of a transistor is called as power derating curve.
Since, the junction temperature should not exceed the maximum value Tj max, Power derating curve is generally given in the datasheets by the manufacturers.
thermal resistance of the transistor should be as low as possible so as to prevent This curves shows that transistor can dissipate power PD0 safely within the
the increase in junction temperature when large amount of power is dissipated ambient temperature TA0.
in the transistor. The value of thermal resistance is usually specified in the However if the temperature is increased beyond TA0 the power dissipation in
data sheets. the transistor must be derated accroding to the straignt line as shown in the
The thermal conduction process can be thought of as electrical circuit as shown figure.
below in which power dissipated is analogous to current, thermal resistance is
analogous to resistor and the node voltages are analogous to temperature of 1 PD (T1 ) PD (T0 )
PD max
junction and ambient condition respectively. JA T1 T0
PD0 -1
TJ Slope = 1
JA or, PD (T1 ) PD (T0 ) (T1 T0 )
PD (T0 ) JA

PD (T1 ) PD (T0 ) (T1 T0 ) derating factor


PD JA
PD (T1 )
TA TA
TA0 T0 T1 Tj max
Figure: Electrical analogy of thermal conduction process
4 Figure: Power derating curve of BJT 5

Where, JA is the thermal resistance between the junction and ambience. Contd
Apart from derating curve, if PD(T0) is the power dissipation at temperature T0 Heat is conducted from the junction of the semiconductor material towards the
and PD(T1) is the power dissipation at temperature T1. Then we can use case and into the surrounding air. It is radiated from the surface of the case. To
following relation to find PD(T1) when PD(T0) is known. improve conduction good physical contact is made between the junction and the
PD(T1) = PD(T0) - (T1 T0) derating factor metal case. In many power transistor collector is in direct contact with the
Transistor Case and heat sinks:- case. To improve the conduction and radiation of heat from the case to the
surrounding, power devices are often equipped with heat sink. These are attached
to the device to be cooled and conduct the heat outwards. To enhance the cooling
operation one can use cooling fans at the surface of the heat sink of the case.
The total junction to ambient thermal resistance ( JA) can be expressed as
JA = JC + CS + SA
Where,
JC = junction to case thermal resistance
CS = case to heat sink thermal resistance
SA = heat sink to ambient thermal resistance

Image Sources:
[Link]
[Link] 6 7
NUMERICALS
When heat sink is used the electrical equivalent circuit for the thermal conduction Q1. A class B audio amplifier is providing 20V peak sine wave signal to 8
process is given as follows: speaker with power supply of 25V (=VCC). At what efficiency is it operating?
TJ 2068 Chaitra
Solution:
JC Given data are:
VP = 20 V
TC VCC = 25 V
= ?
CS
PD We know, for class B amplifier,
TS VP
4 VCC
SA
20
TA or, .
4 25
Figure: Electrical analogy of thermal conduction process when heat sink is used
0.6282 62.82%

8 9

Q2. A transformer coupled class A large signal amplifier has maximum and Q3. For class B amplifier providing 20V peak signal to 16 load (speaker)
minimum values of collector- emitter voltages of 25V and 2.5V. Determine its and a power supply of VCC =30 V, determine the input power, output power
collector efficiency. and circuit efficiency.
Solution: Solution:
Given data are: Supply voltage, VCC = 30V
vce Max = 25 V Peak output, VP = 20 V
vce Min = 2.5 V Load resistance RL
= ? Now,
We know, for transformer coupled class A amplifier, 2VPVCC 2 20 30
2
Input Power ( Pin DC ) 23.87 Watts
RL 16
vce Max vce Min
0 .5
vce Max vce Min VP2 202
Output Power ( Pout AC ) 12.5 Watts
2 2 RL 2 16
25 2.5
or, 0 .5
25 2.5 Pout AC 12.5
Efficiency( ) 100 100 52.37 %
0.3347 33.47% Pin DC 23.87

10 11
Q4. For a class B amplifier using a supply of VCC = 30V and driving a load of Q5. Determine what maximum dissipation will be allowed for an 80-W silicon
16 determine the maximum input power, output power and transistor transistor (rated at 25 C) if derating is required above 25 by a derating
dissipation. factor of 0.5 at a case temperature of 125 .
Solution: Solution:
We have, 2
VCC 302 T0
Load resistance, RL P out AC max 28.125Watts T1
2 RL 2 16
Supply voltage VCC = 30V derating factor
We know, for class B amplifier, We know,
Now, Power Dissipation in two transistors, PD(T1) = PD(T0) (T1 T0) derating factor
2VPVCC P2Q Pin DC max Pout AC max = 80 (125 - 25)0.5
Input Power ( PinDC )
RL PD
35.81 28.125
VP2
Output Power ( Pout AC ) 7.685Watts
2 RL
Power Dissipation in single transistors,
For maximum input and output power, P2Q
VP = VCC PQ 3.84 Watts
2
Therefore,
2
2VCC 2 302
Pin DC max 35.81Watts
RL 16
12 13

Q6. A silicon power transistor is operated with a heat sink ( SA =1.5 . Q7. A BJT is specified to have maximum power dissipation PD0 of 2 watts at
The transistor rated at 150W (25 has JC = 0.5 and the mounting an ambient temperature of 25 and a maximum temperature TJ max of
insulation has CS = 0.6 . What maximum power can be dissipated if the 150 . Find the following:
ambient temperature is 40 and TJ Max = 200 ? i. The thermal resistance JA
Solution: ii. The maximum power that can be safely dissipated at an ambient
We know, temperature of 50
JA = SA + JC + CS iii. The junction temperature if the device is operating at TA = 25 and is
JA = 1.5 + 0.5 dissipating 1 W.
Also we know, Solution:
TJ TA = JAPD TJ TA = JAPD
or, TJ Max TA = JAPD Max
or, 200 40 = 2.6 PD Max
TJ max TA 0 150 25
PD Max = 61.5 Watts i. JA 62.5 C / W
PD 0 2

TJ max TA0 150 50


ii. PD max 1.6W
JA 62.5

iii. TJ TA JA DP 87.5 C
14 15
Thank You!!!

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